SU1264208A1 - Multiplying device - Google Patents

Abstract

The invention relates to electrical computing devices and can be used in analog computers. The aim of the invention is to expand the field of application of the device. The multiplying device contains a comparison element, the first input of which is the input of the first signal multiplier, a pulse counter, a period-code converter, the input of which is an input of the second signal multiplier, a zero-organ, a block-fixing of the extremum moment, a reference voltage source The first and second digital-to-analog converters, the block of elements And, the outputs of which are the outputs of the device. The device allows you to multiply one signal, presented in private form, by the amplitude value of the second signal. 2il. (L with

Description

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The invention relates to electrical computing devices and can be used in analog computers.

The aim of the invention is to expand the field of application of the device.

Fig. 1 is a functional block diagram of the multiplier; in fig. 2 - time diagrams.

The device contains input 1 of the first signal multiplier, reference element 2, pulse counter 3, first and second digital-to-analog converters 4 and 5, reference voltage source 6, period-code converter 7, input 8 of the second multiplier signal, zero authority 9, block 10 fixing the moment of extremum, the block of elements And 11, the codes 12.

The multiplier operates as follows.

In the initial state, the counter of 3 pulses is set to zero. At the output of the comparison element 2, a high potential (1) 4 At the output of the second digital-to-analog converter 5, a signal is generated

and,.

(one)

- N

where V is the voltage at the output of the source 6 of the reference voltage;

N - code from the output of the converter 7 period-code;

n, is the number of bits of the second. digital-to-analog converter 5..

The multiplier signal from input 8 is converted into code using a period-code converter: 7

(2)

where K,

conversion factor;

t g period and the frequency of the second ("" Ix signal-multiplier from input 8.

As soon as the value of the first signal factor at input 1 becomes: equal to one discrete (Fig. 2 a), a zero signal is generated at the output of the comparison element 2 (Fig. 2 b). A difference of 1 on O is perceived by the counter of 3 pulses as an impulse on

his counting input. Pulse counter 3 changes its state. At the output of the first digital-to-analog converter 4, one voltage is generated (Fig. 2a), under the action of which the output signal of the comparison element 2 becomes equal (Fig. 2b). With a further increase in the magnitude of the first signal from the input 1, the described processes are repeated. A code equivalent change occurs as long as there is a change in the signal at the first input of reference 2.

At the moment of extremum (amplitude value), the block of 10 fixing the moment of extremum forms a pulse (Fig. 2a, t), by which the code equivalent arrives at output 12.

At the moment of changing the phase of the first signal of the multiplier (Fig. 2 a, t), the zero-body 9 generates a pulse, setting the counter 3 pulses to the initial state.

Output code equivalent is

UL

(3)

5/2

where DD is the amplitude value of the first signal-multiplier; n, j is the number of bits of the counter 3 pulses and the first digital-analog converter 4.

In view of (1) and (2), expression (3) takes the form

(four)

N

y.-f.

UOH- K,

From (4) it follows that the device implements the multiplication operation.

Claims (1)

Invention Formula The multiplying device containing the comparison element, the first input of which is the input of the first signal-multiplier of the device, is a pulse counter, the period-code converter, the input of which is the input of the second signal-multiplier of the device, characterized in that device, it entered the block fixing the moment of extremum. null-Organ, first and second digital-to-analog converters, I block, source of reference voltage, with the first input of the comparison element connected to the inputs of the null organ and the block of fixing the moment of extremum, the output of which is connected to the control input of the block of I elements, the output of the zero-organ is connected to the setup input of the pulse counter, the counting input of which is connected to the output of the comparison element, to the second input of which the output of the first digital-to-analog converter is connected, the discharge inputs of which are connected They are connected to the corresponding outputs of the pulse counter, the outputs of the period-code converter are connected to the bit inputs of the second digital-to-analog converter, the output of which is connected to the dialog input of the first digital-to-analog converter, the output of the reference voltage source is connected to the information input of the second digital-analog converter, the outputs of the pulse counter are connected to the group the inputs of the block of elements And whose outputs are the discharge outputs of the device. 12 eleven fpuz, 1 but ) 7 ABOUT % L . IG