SU1259209A1 - Sampled-data regulator - Google Patents

Abstract

The invention relates to the field of automatic control and can be applied when using executive devices having gaps in kinematic transmissions. The purpose of the invention is to increase the reliability of the controller. The regulator contains a voltage amplifier, an integrator, a power amplifier, a three-position relay unit and a time relay, the time relay containing a D-flip-flop. The time relay circuit allows you to avoid the regulator malfunctioning with certain element parameters. 2 Il. (Ls

Description

one

The invention relates to automatic control, namely to automatic pulse controllers, in which the output signal is a discontinuous function of the input signal deviation from a predetermined value, and can be applied in automatic control systems of various objects when using electric actuators constant as actuators. speeds, including those with backlash in kinematic transmissions.

The aim of the invention is to increase the reliability of the controller by simplifying the design.

FIG. I shows the functional diagram of the regulation; Fig. 2 shows diagrams of the stresses of the regulator blocks during the development of the control action.

The controller contains a voltage amplifier 1, an integrator 2, a power amplifier 3, a three-position relay block 4, an actuator mechanism 3, a threshold element 6, a D-flip-flop 7 first. 8 and the second 9 elements And, the element OR 10 and the element 11 of the delay. The threshold element contains the first 12 and second 13 detectors, invertor 1A and the element OR 15.

The time relay 16 includes a threshold element 6, a trigger 7, elements AND 8 and 9, element OR 0, and element 11 of delay.

The regulator works as follows.

The input to the voltage amplifier 1 is a signal equal to the difference between the set and actual values of the controlled variable. From the output of the preamplifier I voltage, the signal U, KU, is fed to the input of the integrator 2. The signal and, integrated by the integrator 2, and when the signal U reaches the output of the amplifier 3, exceeds the dead band of the three-position relay unit 4, the latter is triggered.

The signal and, is fed to the input of the executive mechanism 5 of the automatic control system and the threshold element 6 of the time relay 16 arrives at the input of the threshold element 6.

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Horn element 6. In case the error signal is greater than zero, while amplifier 1 and integrator 2 invert the input signals when relay unit 4 is triggered, a signal and 4 positive polarity appear at its output. In this case, the signal passes through the detector 13 to the first input of the input OR 15 and as a signal Ug to the first input of the element AND 9. From the input of the element OR 13, the signal arrives at the clock input from the D-flip-flop 7 and to the information input of the delay element 11.

 5 We will consider the operation of the regulator from the moment when at its output at least the second positive control pulse is formed. Since the switching of the D-flip-flop occurs with a delay of one clock cycle, in this case, the flip-flop 7 is in a position where at its direct output the signal Ug is absent and on the inverse is present

 signal and,. When a positive polarity control pulse U4 occurs at the output of the element And 9, the signal Ufl appears at the first input of the element OR 10. This removes the signal U from its output and, accordingly, from the control input of the delay element I1. The circuit of the delay element 11 in the above example is constructed in such a way that, in the absence of a control action, an increase in the time delay occurs at its control input, and a decrease in the opposite one.

Thus, while maintaining the positive value of the error signal Ujj at the controller input, a frequency-modulated sequence of control pulses U arriving at the actuator is formed at its output. When the error sign changes, the sign of the signal at the output of the integrator 2 changes and when the signal U reaches the threshold of the relay unit 4, the latter triggers when a negative polarity signal is generated at the output of the relay unit 4. In this case, the signal U is fed through the detector 12 and the inverter 14 to the second input of the element OR 15 and to the D input of the D flip-flop 7. At the first impulse after the polarity change

There is no switch to D-flip-flop 7. At the output of the elements And 8 and 9, the signals are absent and there is a signal. U, at the output of the element OR 10. Thus, the first impulse of control, after changing the mismatch polarity, is reduced. During the second negative control pulse at the output of the regulator, the D-flip-flop 7 is switched and the signal U appears at the output of the And 8 element, since the signals U and Ug arrive at both of the last inputs.

In the future, the process repeats until a stable self-oscillating regime arises in the system, operating with the number of pulses in a half period equal to 1. The amplitude of the self-oscillations at the output of the object will be determined by the response of the control object to the pulse after the polarity change. management, i.e. will have a significantly smaller value than with an unchanged control pulse duration.

The considered adjustment process is shown in Fig. 2, where in addition to the diagrams of signal changes of the blocks of the actual controller, there is a plot of the signal change of the output of the automatic control system actuator.

In case the system actuator has gaps in the kinematic transmission, the duration of the first pulse after changing the polarity of the error signal can be taken longer than the subsequent ones, since the backlash sample occurs with each change of direction.

movement of the actuator, which is determined by the change in polarity of the control to the cich pulses. In this case, for the simplest solution, a signal can be applied and, to the control input of the delay element 1I, not from the inverse, but from the direct output of the element OR 10.

Claims (1)

Invention Formula A pulse controller containing a series-connected voltage amplifier, an integrator, a power amplifier, a three-position relay unit and an actuator, a threshold element connected by an input to the output of a three-position relay unit, the first and second elements AND, the OR element, and a delay element connected by the output with an integrator control input, characterized in that, in order to increase reliability by simplifying the design of the controller, a D-trigger is inserted into it, with the first output of the threshold element connected to the D-input of the D-flip-flop and k. the first input of the first element I, the third output to the first input of the second element I, and the third output to the C input of the D flip-flop and to the information input of the delay element, the first output of the D flip-flop connected to the second input of the first element I, and the second the output is connected to the second input of the second element AND, the outputs of the first and second elements AND are connected respectively to the first and second inputs of the OR element, and the output of the 11PI element is connected to the control input of the delay element.