SU1257656A1 - Interface for linking digital computer with peripheral unit - Google Patents

Abstract

The invention relates to the field of computer technology and can be used in the construction of information and computing systems. The aim of the invention is to reduce hardware costs. The device contains a communications register, a command switch, a breaker trigger, and a suspend trigger and operates in interrupt, programmed, and unprogrammed exchange modes. silt u1

Description

The invention relates to computing and can be used in the construction of information and computing systems.

The aim of the invention is to reduce hardware costs.

The drawing shows the block diagram of the device.

The device contains a communications register 1, input 2 of which is connected to an informational input-output of a digital computer, a switch (switch) 3 commands, an interrupt trigger 4 and a suspension trigger 5, informational input 6 and an output 7 of external device commands, output 8 of the digital computer command, the second information switch mode 9 switch 9 input, mode setting output 10 and digital computer command input 11, outputs 12 and 13 of interrupt requests and unprogrammed exchange of an external device, output 14; reset of requests, inputs 15 and 16 of interrupt and suspend requests, information input 17 and output 18 si Digital clock synchronization, output 19, external device synchronization input 20, information output 2 Ц digital computer, external device 22, digital converter 23, including processor 24, memory 25, command register 26., bus 27, memory 25.

The device operates in the following modes: interrupt mode, programmed and unprogrammed exchange modes.

In interrupt mode, the device operates as follows.

In the absence of interrupt signals arriving at trigger 4 from device 22 through output 12, trigger 4 is in the zero state and the digital computer 23 operates according to the current program stored in memory 25. In this case, the program commands are received from the information output of memory 25 through bus 27 of the memory to the input-output 21. The switch 3. control signal process. Copy 24 on output 10 is open on input 9. The command passes to input II and is written to register 26. Then, if trigger 4 is not received. An interrupt request, the processor opens switch 3 with a signal from output 10 and a command from register 26 through output 8 enters the input 11 in the processor 24 for execution. The processor 24 outputs to the address inputs of the memory 25 the address of the next program command, and the device operation cycle repeats.

If the external device 22, in accordance with the priority relations implemented in it, issues a request from the selected subscriber to interrupt through the output 12 of the device in

the trigger 4, the trigger 4 is set to one and, at input 15, an interrupt request is sent to the processor 24. The processor 24 through

output 10 opens the third input of switch 3 and external device 22 through output 7 issues a command to unconditionally switch to an interrupting program. Unconditional team

5 transition has the same format as the command of DVM 23, while in the address part of the command the address of the first command of the interrupting program is indicated. The unconditional transfer command is received via input I1 to processor 24 for execution. The processor 24, by the output signal 14, resets the trigger 4 to the zero state. Execute the unconditional branch command,

5, the DVR 23 transfers control to the interrupt program.

In the programmed exchange mode, the device operates as follows. Programmed exchange with an external device 22. The DVR 23 performs

0 using two consecutive I / O commands. The first command (output command) is to output the address word to the external device 22. The second command (command and input, if it is necessary to enter an information word, or an output command, if it is necessary to perform an output of an information word) is entered into the digital computer 23 s

Q external device 22 of the information word or output from DVM.23 to the external device 22 of the information word. Thus, during a programmed exchange from memory 25, via bus 27, input 2 of register I receives an address word containing the address of the external device 22 and the subscriber's address in the external device 22. The address word is received in register 1 and then transmitted to input 6 of the external device 22. At the same time, the processor 24, via one of the output buses 18, delivers the synchronization signal to the external device 22 to the input 20. By the synchronization signal, the subscriber of the external device 22, whose address is specified in the address word, connects its input register for ema information

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words to input 6, if output is made, or connects the output register to output 19, if input is made. If the next program command is an output command, then this command sends the information word from memory 25 to register 1, which is then transmitted via input 6 to the input register of the subscriber of the external device 22. At the same time, the processor 24 outputs through output 18 to the external input 20 the device 22 is a synchronizing signal that arrives at the receiving input of the input register of the selected subscriber and writes an information word into it.

If the program following the command is an input command, the processor 24 sends the synchronization signal to the input 20 of the external device 22 (the signal that is used to remove the information word from the subscriber’s output register and transmit it via output 19 to the register G.) Register 1 information word through the input 17 is recorded in the memory 25 at the address specified in the command input.

In the unprogrammed exchange mode, the device operates as follows.

The external device 22, in accordance with the priority relations implemented in it, submits a request from the selected subscriber for an unprogrammed exchange to the outputs 13. The trigger 5 is set to one state and sends a request on input 16 to the processor 24. Processor 24, writing the next program command to the register 26 commands, opens the switch 3 on the third information input. The subscriber of the external device 22, who initiated the exchange, issues an input command at output 7 (if an input is made) or an output command (if an output is made. These commands have the same format as the DVM 23 commands. If you want to output an information word from Memory 25 then the output command goes to output 7 via switch 3 and input 11 to processor 24. In this case, the subscriber who initiated the exchange connects his input register to input 6. Processor 24 executes an output command. whose address is listed in Ande output informatsion576564.

The word is transmitted via bus 27 to register 1. The word is then fed to external device 22 to the input register of the subscriber who was initiated by the exchange. At the same time, the processor 24 sends a synchronizing signal to the external device 22 at the input 20 of the device. Sync signal. arrives at the control input of the subscriber's 10 input register, and this register records the information word from input 6..

If you need to enter an information word in memory 25,

15 then the input command comes from the subscriber in the same way as the output command. In this case, the subscriber who became the initiator of the exchange connects its output register to output 19, processor 24

20 execute the input command and issue

through the output 18 to the external device 22, a synchronizing signal, which is used to remove the information word from the subscriber’s output register.

25 The word enters output 19 and is recorded in register I. Thereafter, from register 1, the word is fed through output 17 to the information inputs of memory 25, where it is written to the address

30 specified in the input command.

After the input or output command is executed, the processor 24 resets the trigger 5 to the zero state and opens the switch of 3 commands on the first, first input. The next instruction, the transmission of which to the processor 24 has been suspended for the time of the unprogrammed exchange, being located in register 26, is transmitted to the processor 24

 through switch 3 for execution.

Thus, the device with reduced hardware overhead provides the operation. in all modes provided.

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Claims (1)

Invention Formula A device for interfacing a digital computer with an external a device containing an interrupt trigger and a pause trigger, the installation inputs of which are connected respectively to the interrupt request and unprogrammed exchange outputs of the external device, the reset inputs to the reset output of digital computer requests, and the outputs to the interrupt input, respectively: 5I vania and pause input of a digital computer, the communication register VELHOD is connected to information inputs of an external device and a digital computer, and input to an information output of an external device and information input-output of a digital computer, and a switch of commands whose address input is connected to output task operation mode digital one     . . IS sixteen eleven 1B gd /four Compiled by V. Vertlib Editor M. NedoluzheNko Tekhred L. Serdyukova Proofreader S. Cherni ; Order 4958/48 Circulation 671 Subscription VNIIPI USSR State Committee on Cases of inventions and discoveries 1) 3035, Moscow ,. Zh-35, Raushsk nab. 4/5 Production and printing company, Uzhgorod, st. Project, 4 57656 computer, characterized in that, in order to reduce the hardware costs of the device, the first, second and third information inputs of the command switch are connected respectively to the command output and information output of the digital computer and the command output of the external device, and output 10 of the command switch - with the input of digital computer commands, 7 f3 ten eight 2f 17 t Ultrasound 27 26