SU1254431A1 - Electronic timepiece - Google Patents

Abstract

The invention relates to instrumentation engineering and allows improving the accuracy and efficiency of controlling the clock. The entry of the start time is done by sequentially dialing the dialer corresponding to the hours and minutes. Positive polarity pulses arrive at the information input of the trigger, synchronized by the generator signal 1. The trigger output 20 is triggered by the trigger 21 and the valve 15 is controlled. The shift register 17 is operated by the pulses from the dialer 14 output, after the next digit has been dialed. The signal from the output of the shift register 17 through the encoder 18 controls the division ratio of the divider 19 with the variable division ratio. After entering the start time using switch 10, trigger 12 translates B into a single state and the clock operates in counting mode. 1 il. ((L with: you ate 4 OS

Description

1254431

The invention relates to instrumentation on any part of a device. si you ti

swiveling, namely, an electronic clock to indicate the time.

The purpose of the invention is to improve the accuracy and efficiency of control of the clock.

The drawing shows a functional diagram of the electronic clock.

The electronic clock contains a generator 1 connected through a serially connected first valve 2 and a frequency divider 3 to the first input of the element OR 4 connected by an output through serially connected counters of 5-8 units — minutes, tens of minutes, hours and tens of hours to the block inputs 9, switch 10, switched between common bus 11 and inputs of the first trigger 12 connected by the first output to the control inputs of the first valve 2 and frequency divider 3, button 13 connected between the common bus 11 and control inputs E 5-8 meters, the generator 14 set the time, the second valve 15 and a potential bus 16. Furthermore, the electronic watch comprise serially connected shift register 17, encoder 18, a divider 19 dividing the variable gain and the second 20 and third 21 flip-flops. The generator 14 set the time in the form of a dialer, and the second valve 15 is connected to the first input connected to each other. The generator 1 and the synchronization input of the second trigger 20, the output to the interconnected second input of the element 1SH 4 and the input of the divider 19 with a variable division factor and the second input to the output of the third trigger 21 connected by the information input to the second output of the first trigger 12, set input - to the output of the divider 19 with a variable division factor and a synchronizing input - to the output of the second trigger 20, connected by an information input to the first output of the time setting generator 14, connected torym output to the input of shift register 17 connected to data input bus 16 and the potential control input - with the control inputs of the counters 5 - 8.

In the initial state, the potential 1 from the output of the first trigger 12 permits resolution of the signal from the output

Nerator 1 to the input of the divider 3 frequency. Counters 5-8 through the element OR 4 receive a signal from the output of the divider 3 frequencies, and the result of the counting is indicated by the indicator 9. Dp is set. the start time using switch 10, the first trigger 12 is set to O, the 3 frequency divider is reset to O, and potential 1 arrives at the information input of the third trigger 21. When the button 13 is pressed, counters 5-8 and shift register 17 are set to O. The start time is entered by sequentially dialing the dialer with 14 digits, corresponding to hours and minutes, for example, 1-3-4-6 (13h 46 min). At the same time, the information input of the second flip-flop 20 receives positive polarity pulses, which are synchronized by the output signal of the generator 1. The output signal from the second flip-flop 20 through the third flip-flop 21 controls the second valve 15, the number of pulses at the output of which is determined by the division factor of the divider 19 s variable division ratio. The operation of the shift register 17 is carried out by pulses from the second output of the dialer .14, formed after dialing the next digit. The signal from the output of the shift register 17 through the encoder 18 controls the division ratio of the divider 19, with a variable division factor. After entering the start time using the switch 10, the second trigger 12 is switched to one and the clock operates in the counting mode.

Form la invention

An electronic clock containing a generator connected through a serially connected first valve and a frequency divider to the first input of an OR element connected by an output through series-connected counters of units of minutes, tens of minutes, units of hours and hours of clock to inputs of the display unit, a switch connected between the common bus and inputs of the first trigger connected by the first output to the control inputs of the first valve and frequency divider, a button connected between the common bus and control inputs from the pickers, A time setting controller, a second valve and a potential bus, characterized in that, in order to beat the accuracy and speed of control of the clock, they included sequentially connected shift register, incrementor and divider / variable of 1 division, second and third triggers, and the time setting generator is made in the form of a dialer, the second valve being connected by the first input to the generator output connected to each other and the synchronization input of the second trigger, the output to the second input connected to each other element OR input divider

with a variable division factor, a second input to the output of the third trigger connected by an information input to the second output of the first trigger; a setup input to the output of a divider with a variable division factor and a synchronizing input to the output of the second trigger, whose information input is connected to the first output of the time setting generator connected by the second output to the input of the shift register connected by the information input to the potential bus and the control input to the control inputs of the counters.

Claims (2)

Claim An electronic clock containing a generator connected through a series-connected first valve and a frequency divider to the first input of an OR element, connected by an output through series-connected counters of units of minutes, tens of minutes, units of hours and tens of hours to the inputs of the display unit, a switch connected between the common bus and the inputs of the first trigger connected by the first output to the control inputs of the first valve and the frequency divider, a button connected between the common bus and the control inputs of the counters, 3 1254431 time setting non-clock, second valve and potential bus, characterized in that, in order to improve the accuracy and efficiency of clock control, they introduced sequentially connected five shift registers, an encoder and a divider, with a variable division ratio, a second and third trigger and the time setting generator is made in the form of a dialer, and the second valve is connected by the first input to the connected output of the generator and the synchronizing input of the second trigger, by the output to the second connected 15 the input of the OR element and the input of the divider with a variable division coefficient, the second input to the output of the third trigger connected by the information input to the second output of the first trigger, the installation input to the output of the divider with a variable division coefficient and a synchronizing input to the output of the second trigger, the information input of which is connected to the first output of the time setting generator, connected by the second output to the input of the shift register, connected by the information input to the potential bus and the control input - with branching inputs of counters. Compiled by V. Dobrovolsky