SU1247865A1 - Digital logarithmic generator of time marks - Google Patents

Abstract

The invention relates to the field of measurement technology. The purpose of the invention is to reduce hardware costs. The goal is achieved by the fact that in a known device, comprising a reference frequency generator, a switching node, a power divider. tots and switch, entered three RS-flip-flop. New in the proposed device is the use of simple RS-flip-flops instead of complex switch control blocks. 1 il. Isd NU C O) ate

Description

The invention relates to a measurement technique and can be used in various registrars and indicators to normalize time in a logarithmic coordinate system.

The purpose of the invention is to reduce hardware costs.

The drawing shows a block diagram of a digital logarithmic time stamp generator.

The digital logarithmic time stamp generator contains the 1 reference frequency generator, switching node 2, 3 frequency power divider, switch 4, third, second and first IS triggers 5-7.

Digital logarithmic time generator works as follows.

When the device is switched on, the switching unit 2 sets the RS-triggers 5-7 to the state, which ensures that the output of the switch 4 has the highest frequency from the first output of the power divider 3 frequencies, and prohibits the passage of the reference frequency to the input of this divider.

With arrival at node 2 of the switching signal of the beginning of logarithms, this node permits the arrival of the reference frequency (fj-f) at the input of the power divider 3 frequencies, which is made with conversion factors equal to D1-fj-r, where a is the base of the logarithm system in which lead time ration, K is the whole part of the logarithm of time corresponding to the first label at the output of the switch 4 And n is the number of the output of the power divider 3. frequency.

After the interval of time equal to a, at the first output of the power divider 3 frequency, a pulse sequence of the highest frequency appears with a period a which passes to the output of switch 4 and is time stamped in the time interval inclusive from a to Thus the splitter 3 appears at the first and second outputs simultaneously and changes the state of the RS flip-flop 7 from the second output, which prevents the output of the first output to the output of the switch 4 and enables the passage of pulses second

output power divider 3 frequency. Thus, the output of the device is pulsed with a period of

a, being the time stamps for the next logarithmic module

scales, i.e. in the time interval from

to “1 to a to a.

Further switching of frequencies occurs in the same way by changing the state of the RS flip-flop connected to the next output of divider 3.

In the absence of synchronization between the pulses of the reference frequency and

Claims (1)

The logarithm start signal arriving at the switching node 2, the maximum absolute error in anticipating the start of operation of the proposed device as compared with the logarithm start point, is the reference frequency period. Invention Formula A digital logarithmic time stamp generator containing a reference frequency generator, a switch node, a power frequency divider 1 and a switch, the first, second, third and fourth information inputs of KOTopolT o are connected respectively to the first, second, third and fourth pth outputs of the power divider. frequencies whose information input connected to the first output of the switching node, the information input of which is connected to the output of the reference frequency generator, and the control input to the input of the beginning of the conversion of the digital logarithm of time stamps, which differ in terms of hardware costs, The first, second and third RS-triggers are entered into it, the reset inputs of which are connected to the second output of the switching node, the second, third and fourth outputs of the power frequency divider are connected respectively to the installation inputs of the first, second and third VZ-flip-flops, the outputs of which are connected respectively to the first, second and third control inputs of the switch ,, output which is connected to the output of the digital logarithmic generato time stamps.