SU1241470A1 - Pulse counter - Google Patents

Abstract

The invention relates to a pulse technique. It can be used in various automation devices, as well as in digital computers. The purpose of the invention is the expansion of functionality-is achieved by providing an arbitrary conversion factor, as well as presenting the output information in the form of linear or circular scales. The counter contains an even number of bits 1.1, 1.2, ..., 1.2N, in each bit there is a photodinistor 2 and an LED (LED) 3, a trigger 4 with a counting input 5, a node 6 for resetting the counter with capacitors 7 and LED 8, buses: 9 - power, 10 - counting pulses, II and 12 - odd and even pulses, triggers 13 and 16 with inputs 14 and 15, 17 and 18, respectively, limiting resistors 19-24, coefficient control node 25 recalculation, on the elements AND-OR 25, 26 and 27, additional tires: 30 and 31 odd and 32-33 even pulses; indication LEDs 34.1, ..., 34.M of the first group 35, 36.1, ..., 36.K to the second group 37 and 38.1, ..., 38L of the third group 39. The meter provides for the use of the corresponding lines of LEDs that may have any pre-set shape. With the help of such rulers it is possible to display any information, for example, signed or digital. 1 il. (C (L ze 37 3i /, Jiffi 3 Lzr31.PU 31G 3S.2 U.U 3 f. 3M dYu NU NU

Description

The invention relates to a pulse technique and can be used in various automation devices, including digital computers.

The purpose of the invention is to expand the functional capabilities by providing an arbitrary conversion factor, as well as the ability to present the output information in the form of a linear or circular scale.

The drawing shows a schematic diagram of a pulse counter that contains an even number of bits 1.1, 1.2, ..., 1.2N, each of which has a photodinistor 2 and an LED 3, a trigger 4 with a counting input 5, a node 6 for setting the counter in initial state with capacitor 7 and LED 8, power bus 9, bus 10 counting pulses, odd pulse bus 11, 12 even pulse bus, first additional trigger 13 with counting input 14 and resetting input 15, second additional trigger 16 with counting input 17 and input 18 mouth zero-state, limiting resistors 19–24 from the first to the sixth, respectively, node 25 of the control by the scaling factor, containing the first and second elements 26 and 27 AND –OR, with inputs 28.1, 28.2, ..., 28.2N and 29.1, 29.2, ..., 29.2N control the conversion factor, respectively, the first and second additional tires 30 and 31 odd pulses, the first and second additional tires 32 and 33 even pulses, indicating diodes 34.1, 34.2, ... , 34.M of the first group 35, indication diodes 36.1, 36.2, ..., 36.K of the second group 37, indication diodes 38.1, 38.2, ..., 38.1. the third group 39, the first and second phototransistors 40 and 41, the first and second resistors 42 and 43 of the load, the first and second additional photodinistors 44 and 45, the first, second, third and fourth LEDs 46-49, the third, fourth and the fifth additional photodinistors 50, 51 and 52, the first and second additional LEDs 53 n 54 of the installation unit 6 of the initial state, the initial setting 55 of the initial state of the trigger 4 with the counting input, the outputs 56 and 57 of the first and second elements AND -OR, their inputs 58.1, 58.2, ..., 58.2N and 59.1, 59.2, ..., 59.2N, direct outputs 60, 61 and 62 trigger a 4, the first and second additional triggers 13 and 16, the inverse outputs 63, 64 and 65 of the trigger 4 with a countable input, the first and second additional triggers 13 and 16, the zero bus 66.

In the pulse counter, containing in each bit 1.1, 1.2, ..., 1.2N, photodinistor 2 whose anode is connected to the cathode of the LED 3, which is optically connected to the photodynistor 2 next, its discharge, except for the last bit and also containing a trigger 4 with a counting input 5, node 6 mouth

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reset, in which the anode of the LED 8 is connected to the supply bus 9 via a capacitor 7, the LED 8 of the node 6 of the reset installation optically connected} to the photodinistor 2 of the nerve discharge 1.1, the counting input 5 of the trigger 4 with the counting input is connected With a bus of 10 counting pulses, the cathodes of photodinistors 2 odd and even bits are connected to HJHHaM 11 and 12 odd and even pulses, respectively, two additional triggers 13 and 16 are introduced with a counting input and inputs 15 and 18 of setting them to their initial state, inecTb restrictive resistor s 19-24, the conversion factor control node 25, containing the first and second elements 26 and 27 AND - OR with the conversion factor inputs 28.1, 28.2, ..., 28. and 29.1, 29.2, ..., 29.2N, first and the second additional pin 30 and 31 odd pulses, the first and second additional tires 32 and 33 even pulses, and in each bit 1.1, 1.2, ..., 1.2N the first, second and third groups 35, 37 and 39 of the indication diodes 34.1 are introduced , ..., 34M, 36.1, ..., 36K, 38.1, ..., 38L, the first and second phototransistors 40 and 41, the first and second load resistors 42 and 43, the first and second additional photodinistors 44 and 45, h Four additional LEDs 46--49, except for GoGo, for the first discharge entered the third, fourth, and fifth additional photodinistors 50, 51, and 52 into the installation node 6 in the initial state, introduced two additional LEDs 53 and 54, inputs 15 and 8 the initial settings of the additional triggers 13 and 16 with the counting input are connected to the input 55 of the initial settings of the trigger 4 with the counting input, the counting inputs 14 and 17 of the nerve and the second additional triggers 53 and 16 with the counting input are connected to the outputs 56 and 57 of the first and second elements AND - OR 26 and 27, respectively; 1o, the collectors of the first and second phototransstoris 40 and 41 are connected to the primary and inlets 58. 1 and 59.1 of the first and second elements 26 and 27 AND-OR and to the power bus 9 through the nerve and the second | 1 resistors 42 and 43 ; and, accordingly, the emitters of the first and second phototransistors are connected to the zero aperture 66, the direct zigzags 60, 61, and 62 of the trigger 4 with the countable Bxo;: i, OM., not the EVIO, and BTOpoi o the additional triggers 13 and 16 with the counting the input is connected to the bus 11 odd pulses, 11 ver (second and second tires 130 and 31 odd pulses through the first, t retiy and fifth limiting resistors 19, 21 and 23, respectively, the first. additional ujHHa 30 odd pulses connected to the cathodes of the first additional photodinistors 44 of all odd bits 1., 1.3, ..., 1 (2N-1), the second 1Iina 31 odd pulses connected to the cathodes of the second optional photodinistors 45 of all odd bits 1.1, 1.3, ..., 1- (2N - 1), inverse outputs 63, 64 and 65 of trigger 4 with a counting input of the first and second additional triggers 13 and 16 with a counting input connected to the bus 12 even-numbered pulses, with the first and second additional 32 and 33 even pulses are used through the second, fourth, and sixth limiting resistors 20, 22, and 24, respectively, the first additional bus of 32 even pulses is connected to the cathodes of the first additional photodinistors 44 of all even bits 1.2, 1.4, ..., 1,2N , the second additional bus 33 even-numbered pulses is connected to the second additional photodonistors 45 of all even bits 1.2, 1.4, ..., 1.2N, the first additional LED 46 cathode is connected to the anode of the LED 3, and the anode to the cathode of the last diode 34.M. groups of 35 indication diodes, the second additional LED 47 cathode connected to the anode of the third additional LED 48, the cathode of which is connected to the anode of the first additional photodinistor 44, the anode to the anode of the first diode 34.1 of the first group 35 of the indicator diodes and to the cathode of the last diode 36. To the second group of indicator diodes, the fourth additional LED 49 is connected by the cathode to the anode of the second additional photodistor 45, the anode to the anode of the first diode 36.1 of the second group 37 of the indicator diodes and to the cathode of the last diode 38.L of the third group 39 indicator diodes, the anode of the first diode 38.1 of the third group 39 of the indicator diodes are connected to the power bus 9, the third, fourth and fifth additional photodinistors 50, 51 and 52 are connected in parallel and according to the photodinistor 2, the first and second additional photodistors 44 and 45, respectively , the anode of the first additional LED 53 of the installation unit 6 of the initial state is connected to the cathode of the LED 8 of the installation unit 6 of the initial state, the cathode of the first additional LED 53 of the initial installation unit 6 is connected to the anode of its second additional LED 54, the cathode of which is connected to the zero bus 66, the first and second additional LEDs 46 and 47 of each bit 1.1, 1.2, ..., 1.2N are optically connected to the first and second phototransistors 40 and 41 of their bit respectively, the third and fourth additional LEDs 48 and 49 of each bit are optically coupled to the first and second additional photodinistors 44 and 45 of their next bit, the first and second additional LEDs 53 and 54 of the reset unit 6 are optically connected with thu The ground and fifth additional photodinistors 51 and 52, respectively, the last-light-emitting diode 3 1.2N opti5

It is connected to the third additional photodinistor 50 of the first bit 1.1, and in the first, second and third groups of 35, 37 and 39 indicator diodes all the diodes are connected in series and according to the polarity of the supply voltage.

The counter works as follows. After turning on the power, the triggers 4, 13 and 16 are set to the zero state by applying a pulse to their inputs 55,

0 15 and 18 installation of the trigger 4, 13 and 16 in the initial state, i.e. at their direct outputs 60, 61, and 62 there is a logical “zero (almost zero potential) and cathodes of photodinisters 2, 44 and 45 of all odd digits 1.1, 1.3, .., 1.2N-1 and photodinistors 50, 51 and 52 the first bit 1.1 is connected practically to the zero bus 66. On the inverse outputs 63, 64 and 65 of the flip-flops 4, 13 and 16 there is a high positive potential and photodinistors 2, 44 and 45

0 all even digits 1.2, I.4, ..., 1.2N are back shifted. When power is connected to the bus 9, the LEDs 8, 53 and 54 of the node 6 of the installation of the counter to the initial state emit a light pulse for a short time, the duration of which is determined by the transient

5 process at power on, i.e. the charge time of the capacitor 7 through the LEDs 8, 53 and 54. This light pulse, acting on the photodinistors 2, 51 and 52 of the first bit 1.1, translates them into a conducting state. After the end of the transition process, the LEDs 8, 53 and 54 go out and subsequently do not take any part in the operation of the meter.

Thus, all of the indication diodes 34.1, ..., 34M, 36.1, ..., 36K, 38.1-38.L of the first, second and third groups 35, 37 and 39 of the first discharge 11 are transferred to an excited state, so how does the current flow through them, limited by limiting resistors 19, 21 and 23 and not exceeding the maximum allowable current for normal

0 operation indicator diodes of all groups 35, 37 and 39.

LEDs 3 and 46–49 of the first bit 1.1 emit light.

Consider the case where at the inputs 28.2N and 29.2N of the coefficient control

5 recalculations of the first and second elements AND-OR 26 and 27 of the node 25 of the control of the recalculation coefficient have a high positive potential, i.e. The switching of the flip-flops 13 and 16 depends on the first and second phototransistors 40 and 41 of the last bit 1.2N, respectively.

With the arrival of the first pulse from the bus 10 to the counting input 5 of the trigger 4, it passes from the zero state to the unit state, i.e. at its inverse output 63, the logical “zero” turns on, and at the direct output 60, the logical “one. Due to the presence of the optical signal on the photodinistor 2 of the second bit 1.2 from the LED 3 of the first

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0

bit 1.1 photodinistor 2 of the second bit 1.2 turns into a conducting state and, therefore, indication diodes 34.1, ..., 34.M, 36.136.K, 38.1, ..., 38.L of the second bit 1.2 goes in the excited state. The high notional leads to the switching of the photodinistor 2 of the first bit 1.1 to the nonconducting state. Thus, after each counting pulse, the conductive state of the discharge is shifted to the right, and the counter operates as a counter with a unit-position code.

With the arrival of the impulse, the photodinistor 2 of the last i.2N bit goes to the conducting state. The last-bit 1.2N LED 46 emits light to the phototransistor 40. A low level of positive potential is removed from the collector of the phototransistor 40, which is fed to the input 58. 2N of the first AND-OR element 26, and the logical 56 zero, which is applied to the counting input 14 of the flip-flop 13. The flip-flop 13 switches to the opposite state, i.e. trigger 13 is triggered on the falling edge of the pulse. In turn, the photodinistor 44 of the second bit 1.2 transits to the wire and its state due to the fact that an optical signal from the light emitting diode was present on it and the 47 of the first bit 1.1. and on bus 32, a low level of positive potential is observed; tine 30 is a high one.

The photodinistor 50 of the first bit 1.1 is ready for the transition to the conducting state, since it has an optical signal from the LED 3 of the last bit 1.2N.

With the arrival of 2N pulses, the photodinistor 2 of the last bit 1.2N transits to the nonconductive state due to the appearance of a “high potential on pin 12, and the light-emitting diode 46 of the same bit locks the phototransistor 40 (i.e., the optical signal to the phototransistor 40 does not arrive).

As a result, a logical "one" appears at the output 56 of the first element 26 of the node 25. The photodinistor 50 of the first bit 1.1 turns into a conducting state, since a low level of positive potential appears on the bus 11.

The excited diodes are 34.1, ..., 34.M., 36.1, ..., 36.K. 38., ..., 38.L of the first, second and third groups 35, 37 and 39 the first bit 1.1 and the indication diodes 36.1, ..., 36.K, 38.1, ..., 38.L of the second and third groups 37 and 39 of the second bit 1.2, since the photodinistor 2 bit 1.2 is in a nonconductive state nii.

With the arrival of the (2N + 1) th pulse, the photodinistor 2 of the second bit 1.2 transits to the conducting state and in the first bit 1.1 the indicating diodes 38.1. ,,,, 38.L of the third group 39 remain excited, and

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the second, the indicator diodes E 1 of the first, second and third groups 35, 37 and 39. With the appearance of a (2N + 2) -ro pulse, the photodinistor 2 of the third

5 bits and in the excited state are indicator diodes 38.1, ..., 38.L of the third group 39 of the first bit 1.1, the second and third groups 37 and 39 of the second bit 1.2, the first, second and third groups 35, 37 and 39 third bits 1.3. When the NII 4N pulses pass in the conducting state, there will already be a photodinistor 44 of the third bit 1.3, since the low potential level of positive potential is already present on pin 30.

With the arrival of () + (2N-2) 2N pulses, the photodinistor 45 of the second bit 1.2 is in the conducting state, the photodistors 44 and 2 of the last bit are 1.2N, and the indicating diodes 38, 1, ..., 38.L third

20 groups 39 of the second bit 1.2 and all indication diodes 34.1, .., 34.M., 36.1.,. ,, 36.K, 38.1, ..., 38.L of the last bit 1.2N.

This will occur due to the fact that the last-used 1.2N LED 47 emits light to the phototransistor 41, and consequently, a low level of positive potential is removed from the collector of this phototransistor 41, set by a resistor 43 and a phototransistor 41, which is supplied the input 59.2N of the second element AND-OR 27 of the node 25 controlling the conversion factor and the output 57 of this element AND-OR 27 removes a logical "zero, which is fed to the counting input 17 of the trigger 16. The trigger 16 switches to the opposite state,

. ,, i.e. it also triggers on the falling edge of the pulse. After that, the photodinistor 45 of the second bit 1.2 goes into a conducting state due to the fact that it has an optical signal from the LED 49 of the first bit 1.1 and on the bar 33 -

40 a low level of positive potential, and a photodinistor 52 of the first bit 1.1 is back biased, since a high level of positive potential appears on bus 31.

With the arrival of P pulses (where P

45 D4-4N-, and A (2N-l) -f (2N-2) 2N; The photodinistor 45 of the third bit 1.3 and the photodinistor 2, 44 of the last bit 1.2N are in the current state.

Later with the arrival of pulses from the bus 10 to the counting input 5 of the trigger 4, the counter functions as shown earlier.

The counter can be used with a corresponding array of indicator LEDs, which can accept any

55 in advance of a given form, i.e. With the help of such indicator LEDs, it is possible to display any, for example, sign or cis information.

Claims (1)

The invention includes a pulse counter containing a photodinistor in each discharge, the anode of which is connected to the cathode of the LED, which is optically connected to the photodinistor of the subsequent discharge, except for the last bit, and also contains a trigger unit with a counting input. In which the anode of the LED is connected to the power supply through a capacitor, the reset unit LED is optically coupled to the first-way photodinistor, the counting trigger input is connected to the counting pulse bus, the photo cathodes Odin and odd-bit odinistors are connected to odd-numbered and even-numbered pulses, respectively, characterized in that, in order to expand the functionality, two additional triggers with a counting input and inputs to reset them are introduced, six limiting resistors, the control node recalculation coefficient containing the first and second AND-OR elements with control inputs of the recalculation coefficients, the first and second additional buses of odd pulses, the first and second additional tires first, second and third groups of indicator diodes, the first and second phototransistors, the first and second load resistors, the first and second additional photodistors, four additional LEDs, and a third , the fourth and fifth additional photodinistors, two additional LEDs are introduced into the installation node in the initial state, the installation inputs in the initial state of additional triggers with a counting input are connected to the installation input in the initial state the trigger trigger with the counting input, the counting inputs of the first and second additional triggers with the counting input are connected to the outputs of the first and second AND-OR elements, respectively, the collectors of the first and second phototransistors are connected to the inputs of the first and second AND-OR elements and the power supply through the first and the second load resistors, respectively, the emitters of the first and second phototransistors are connected to the zero bus, direct trigger outputs with a counting input, the first and second additional triggers with a counting input connecting with the width of odd pulses, the first and second additional buses of odd pulses through the first, third, and fifth limiting resistors, respectively; the first additional bus of odd pulses is connected to the cathodes of the first additional photodinistors of all odd bits; the second additional bus of odd pulses is connected to the cathodes of an odd pulse; 3613/5 Branch PPP "Patent 0 five 0 five 0 0 five 0 five additional photodinistors of all odd bits, inverse outputs of the trigger with a counting input, first and second additional triggers with a counting input are connected to the bus of even pulses, with the first and second additional Pi1 of even pulses through the second, fourth and pinch limiting resistors, respectively, the first additional bus even pulses are connected to the cathodes of the first additional photodinisters of all even bits, the second additional bus of even pulses is connected to the second complementary All the even-numbered photodinists, the first additional LED by the cathode is connected to the anode of the LED, and the anode to the cathode of the last diode of the first group of indicator diodes, the second additional LED by the cathode is connected to the anode of the third additional LED, the anode of the first additional photodinistor, the anode is to the anode of the first diode of the first group of indicator diodes and to the cathode of the last diode of the second group of indicator diodes, the fourth additional LED by the cathode connected to the anode of the second additional photodinistor, to the anode to the anode of the first diode of the second group of indication diodes and to the cathode of the last diode of the third group of indication diodes; the anode of the first diode of the third group of indication diodes is connected to the power supply; the third, fourth and fifth fifth photodinistors are connected in parallel and according to the first photodinistor, the first and the second additional photodinistors, respectively, the anode of the first additional LED of the installation unit to its initial state is connected to the cathode the LED of the installation node in the initial state, the cathode of the first additional LED of the installation node in the initial state, is connected to the anode of its second additional LED, whose cathode is connected to the zero bus; the first and second additional LEDs of each discharge are optically connected to the first and second phototransistors of its bit, respectively, the third and fourth additional LEDs of each bit are optically coupled to the first and second additional photodinistors of the next bit, the first and second The additional LEDs of the setup node are initially connected optically with the fourth and fifth additional photodinistors, respectively, the last discharge LED is optically connected with the third additional photodinistor of the first discharge, and in the first, second, and third groups of indicator diodes all diodes are connected in series and according to the polarity of the supply voltage. Circulation 816 Subscription Uzhgorod, st. Design. four