SU1492295A1 - Scale voltage indicator - Google Patents

Abstract

This invention relates to electrical measuring technology. The purpose of the invention is to increase the information content of the device. The device contains a control unit 1 consisting of optically coupled bits 1.1, 1.2, ..., 1. n, an optoelectronic scale 25, an analog switch 7, a generator of 6 pulses. Introduction of analog multiplexer 23, differentiators 13.1 and 13.2, shifting unit 22, pulse generator 24, optoelectronic key 8, elements AND 14 and 15, NOT elements 16 and 21, performing scale 25 as a matrix of LEDs, performing unit 1 with new and optical links provide a display of varying monitored signals as the length of the light of a sparse column, and unchanging as the position of a luminous mark. 3 il.

Description

The invention relates to plectro-measurement technology.

The purpose of the invention is to increase the information content of the device by providing an indication of the variable counter-sensed signals as the length of the light column, and unchanging as the position of the light label.

Fig. 1 is a functional diagram of a voltage bar gauge; FIGS. 2 and 3 are functional diagrams of a shifting unit and an analog multiplexer.

The indicator contains a control unit 1, consisting of bits 1.1, 1.2, ,, ,, cn-0 .1, each of which is filled on the first 2 and second 3 resistors, the first photodetector 4, except for the first and last bits 1, n, the second photodetector 5, except the last bit 1, n, and the regenerative optocoupler. The indicator also contains the first generator of 6 pulses, an analog switch 7, an opto-electronic switch 8, in each regenerative optocoupler a first source

9 lights connected between the first bus

The power supply and collector of the first transistor 1 1, the emitter of which is connected to the common bus, the base to the first output of the third photodetector 12, the source 9 is optically connected with the photodetector I 2 of its discharge and with the photodetector 5 of the previous discharge, In each discharge of block 1 The first inputs of resistors 2 and 3 are connected to the base of transistor I 1, the second pin of resistor 3 is connected

to the common bus, the second output of the resistor 2 to the output of the analog switch 7, the Indicator also contains the first 13, and the second 13.2 differentiators, the first 14 and the second 15 AND-NOT elements, the first element NOT 16, in each bit 1.1, 1, 2 ,,,,, Un-0, In the first diode 1 7 except the last two bits, the second light source 18, except the last two bits, the second diode 19, except the last bit, the third resistor 20, except the last two bits, the second elements are HE 21, the shifting unit 22, the analog multiplexer 23, the second pulse generator 24, a matrix of 25 LEDs as an optoelectric ronnoy scale. The first one of the photodetector 5 of the first digit 1.1 is connected to the batch of the transistor I, and

the second output is connected to the bus 26 glithei di (1Д 9, Kltedy diodes 17 nseh bits, the crown of the first and the last, connected to the x: collectors of transistors II, and the anodes are connected between, the first terminals of the resistors 20 and sources 18, optically associated with the photodetector4 of the subsequent discharges, except for the last. The second terminals of sources I8 and resistor 20, respectively, under: lkneny to the common bus and power bus 10. Base transistors 11 all bits, except the first and last 5, through the photoreceivers 4 and 5 and diodes 19 are connected to the bus 26 of the quench. The second pins of all foto - cos emni 12 connected to the output of AND-NO element 14 whose first input

0 is connected to the output of the generator 6, and the second input is connected to the output of the element AND-NO 15 and the control input of the key 7, The first input of the element AND-NOT I5 is connected to the output of the differentiator 13.2,

5 and the second input is to the output of the element HE 16, the input of which is connected to the output of the differentiator 13.1, the control input of which is connected to the power bus 10. Output element AND-NOT 15

0 is connected to the input of the key 8, the inputs of which are connected to the power bus 10 and 27, and the output to the bus 26 of damping. The inputs of the differentiators 13.1 and 13.2 are combined and connected to the input of the key 7 and to the output of the multipexor 23, which contains n analog inputs and n address inputs connected to n first outputs of the shifting unit 22 corresponding bits,

0 The output of the generator 24 is connected to the information input of the block 22 with the installation input to the initial position. The collectors of the transistors I 1 of all bits through the elements HE 21 are connected

5 with inputs of the matrix 25, the second inputs of which are connected to the second outputs of block 22,

The shifting unit 22 (FIG. 2) contains transistors 28, sources

Q 29 and 30 light, photodetectors 31-33, resistors 34-38, capacitor 39, element NO 40, counting trigger 41. In each discharge of 42.1, 42, 2,,,, 42-, n block 22 base the transistor 28 is connected to the first terminals of the photodetectors 3 and 32 and the resistor 36, the first output of the source 29 and the cathode of the diode 43 are connected to the collector of the transistor 28, which is connected to the second output of the discharge.

five

Emilchf I priH Uir i (11.1 I and iriDpiiij have a resistor; J6 1 | (, 1 to a common bus, Bfopnif you have a l-pin;) 24 is connected to iieppfiMV, you can get back 37, the second resistors 37 and 38 are connected to the bus 10 of the power supply, the second terminals of the photopneumatic 31 and 32 even digits 42.2, 42.4 .... are connected to the inverse fuzz) of the trigger 41, and the odd digits 42.1, 42.3, ... - to the direct output trigger 41. Source 29 is optically coupled to a photodetector 32 of its discharge and with a photodetector 31 of the subsequent discharge, and source 29 of the last discharge light 42.p optically is associated with the photoreceiver 31 of the first discharge 42.1. In the first discharge 42.1 parallel to the photodetector 31 is connected a photodetector 33, the inverse output of the trigger 41 is connected to its D-input. The first terminals of the resistor 34 and the capacitor 39 are combined and connected to the input of the HE element 40, and the second terminals are connected to the I O bus and the common bus respectively. The output of the HE 40 element is connected to the S-input of the trigger 41 and to the second output of the light source 30, which is optically connected to the first photoreceiver 33.1 of 42.1, the first output of the source 30 is connected to the second output of the resistor 35, the first KoToDoro is connected to the common tire. The anodes of the diodes 43 are connected to the first outputs of the unit 22 and through resistors 38 to the power bus 10.

Analog multiplexer 23 (Fig. 3) contains a transistor 44, light sources 45, photodetectors 46, resistors 47 and 48, diodes 49, with the corresponding analog inputs of multiplexer 23 connected to the anodes of diodes 49, and the first outputs of the photoreceivers 46, second outputs which are combined} 1y and connected to the first output of resistor 47. The first inputs of the sources 45 are connected to the corresponding address input of the multiplexer 23, and the second outputs to the power supply I / O bus. Photodetectors 46 are optically connected to the corresponding sources 45, the second output of resistor 47 is connected to the base of transistor 44, the collector of which is connected to bus 10, the first output of resistor 48 is connected to the emitter of transistor 44 and to the multi

ten

15

20

25

thirty

35

40

45

50

55

. 56

n icKcopn 23, inopoi; Lead Resistor

 8 podklyuchenk. Of common mud.

Indicatorcards are working for one 13GM.

 Tires 10 and 27 offer a positive and negative power supply. At the first moment when the power is turned on, the input of the NK 40 element is low. The corresponding logical zero, at the output - a high level appears, corresponding to the logical unit. Through the source of light 30, a current flows to the resistor 35, which is given by the source 30. As the S-input of the trigger 41 is HIGH, there is also a high level at its direct output. Photo-receiver resistance1: a 33 falls and a current flows through it, which hides transistor 28 of the first discharge 42.1. Through the source 29 of the first discharge light, a current flows that initiates it, the optical signal 32 enters the first discharge 32 as a result, an additional current flows to the base of transistor 28, which further opens the transistor 28. Thus, low potential is present at the output of the first-digit 42.1, the second-level photoreceiver 31.2 is ready for unlocking, but since the inverse output fpnrrepa 41 is present low level, no current flows through it.

With the arrival of the counting pulse, the generator 24 to the counting input of the shifting unit 22, at the direct output of the flip-flop 41 appears a low level, at the inverse - a high level. Since the second-charge fstotronic receiver 31.2 42.2 is ready to start, a current flows through it into the base of the second-discharge transistor 28 and opens. it flows, a current flows through the light source 29, an optical signal is present on the second-discharge photodetector 32, an additional current flows through the photo-receiver 32 to the base of transistor 28, which opens even more, and a low level is present at the output of the second discharge 42.2. Since the second outputs of the photodetectors 31 and 32 of the first discharge 42.1 of block 22 are low, the current of the discharge does not flow to the base of the transistor 28 of this discharge, which causes its locking, at the output of the first discharge 42.1 appears

high level. With the arrival of the next pulse, the third bit of 42.3 is excited to the counting input of trigger A1, and so on. Since the photodetector 31 of the first bit 42.1 is optically coupled to the source 29 of the light of the last bit 42. n, the process continues around the ring, i.e.

low uronii .. Since the first input of the element AND-ИЕЕ 15 receives a low level, then at its output

 one

appears high level.

In the second case, when the voltage decreases (11), this leads to locking of the differentiator 13.2 and even more locked up in the differential-shifting unit 22 operates in the ring Q of the differentiator 13.1, as a result of which. From the outputs of block 22, the signals to their outputs are present at the EYSOs that come to the address inputs of the corresponding levels. On the code element of the NOT multiplexer 23. The first level appears low, and

the second moment when the output of the first bit 42.1 has a low level corresponding to logical zero, and all the other outputs 42.2, ..., 42, n - high levels corresponding to logical units, through the light source 45 of the first address input of the multiplexer 23 flows the current that excites it, an optical signal is present on the photodetector 46, a diode circuit 49, a photodetector 46, a resistor 47 a current flowing to the base of transistor 44 opens the transistor 44. Since the latter is connected according to the emitter follower circuit, then at the output of the analog multiplex Lexer 23 appears a potential corresponding to the potential at the first analog input of multiplexer 23. With the appearance of a low level at the second address input of multiplexer 23, a potential appears at its output corresponding to the potential at its second analog input, etc. Thus, at the output of multiplexer 23, all potentials that are present at its analog inputs appear in turn. The analog signal from the output of the multiplexer 23 is fed to the input of the differentiators 13.1, 13.2. Here

low uronii .. Since the first input of the element AND-ИЕЕ 15 receives a low level, then at its output

 one

appears high level.

at the output of the element AND NOT 15 - a high level.

Consider the operation of differentiators in the third case, when Un Pfm-Diff (1), the differentiator 13.1 is open, the differentiator 13.2 is closed, the output of the differentiator 13.1 has a low level, the output of the differentiator 13.2 is high, the output of the element 16 does not appear high at the output of the element AND NOT 15 - a low level.

Thus, in the first and second cases, at the output of the NAND 15 element, there is a high level, which enters the input of the optoelectronic

key 8, the output of which is switched to the same level. The control input of the analog switch 7 is high, the analog switch 7 is activated, the input voltage Ue U U is removed from its output, which is applied to the second terminals of the resistors 2 and those bits for which the operation threshold Upop goes into an excited state the As a result, the input voltage is represented in the B1aD of the light of the column (the high level is present on the dither bus 26)

In the third case, when Un n-i,

Three situations are possible when, 45 output of the element AND-NOT 15 is present Un and „.,, Un and., where Un, U., are the values of the analog signal at a given and previous times.

Consider the work of differentiators for the first case, when.,

The input voltage enters the inputs of differentiators 13.1 and 13.2. As the voltage increases, this leads to unlocking of differentiator 13.1 and even more unlocking of differentiator 13.2, which is determined by their response threshold, at the outputs of the differentiator

50

55

A low level arrives at the input of the optoelectronic switch 8, at the output of which a high level of negative potential is switched. A high level appears at the output of the first NAND 14, since its second input has a low level, and since there is no signal at the control input of the analog switch 7, there is a zero voltage level at its output. Due to the fact that a high level of fuel is present on tire 26

 the output element AND-NOT 15 is present

A low level arrives at the input of the optoelectronic switch 8, at the output of which a high level of negative potential is switched. A high level appears at the output of the first NAND 14, since there is a low level at its second input, and since there is no signal at the control input of the analog switch 7, there is a zero voltage level at its output. Due to the fact that the quenching bus 26 has a high level of negative n; and 1, starts the zeroing of all the excited bits (via photo-detectors and 5 and diodes 19), except for the last. As a result, the input voltage is displayed in the form of a light point, the position of which corresponds to the magnitude of the light of the bar. Consequently, the display of the varying voltage is produced in the form of a light of a bar, and the constant voltage is displayed in the form of a light point.

From the outputs of bits 1.1, 1.2, ..., 1.p, information is fed to the inputs of the NOT elements 21, the outputs of which have a high level if the corresponding bit is excited. The frequency of the pulses from generator 6 is two to three times larger than that from the generator 2A. At the same time, each bit of the analog multiplexer 23 corresponds to a certain number of excited LEDs of the matrix 25. At the same time, if the input voltage changes, it is displayed in the form of a set of excited columns corresponding to the excited discharge, and if IB is in the form of a single label (points) conforming to the most senior, excited discharge, H-oh increases the informability of the indicator.

Claims (1)

Invention Formula A voltage indicator bar, a spone electronic display, a control unit consisting of n L1 connected bits, the first input of which is connected to the output of an analog switch, a second input with a common bus, the first pulse generator that differs from in order to increase the information content, an analog multiplexer, two differentiators, a shifting unit, a second pulse generator, an optoelectronic switch, two AND-NOT elements, the first element NOT and the second elements NOT, an optoelectronic switch are made on the matrix iodine, and each of the bits of the control unit, except the first, the penultimate and the last, is made on the first and second light sources, the first, second and third photodetectors, the transistor, the first and second diodes, the first, second and third resistors, the first discharge On the first and second light sources, the first and second photodetectors, the transistor, the first and second diodes, the first, second and third resistors, the last and penultimate discharge is performed on the first light source, the third photodetector, transistor, Q first and second cuts Storey, penultimate discharge is also provided with first and second photodetectors and a second diode, the transistor base and each bit is connected to the first vho- remote control unit 5 through the first a resistor, to the second input of the control unit through the second resistor, to the third input of the control unit and to the output of the first NAND element through the 0th third photodetector, the collector of the transistor of each bit is connected to the fourth input of the control unit and the first power bus through the first light source, and to the corresponding 5 output of the control unit directly, the emitter of the transistor of each bit is connected to the second input of the control unit, the collector of the transistor of each bit, except the previous and last, is connected to the combined The first diodes of the second light source and the third resistor are connected through the first diode, the second terminals of which are connected respectively to the second and fourth inputs of the control unit, the base of the first-order transistor is connected to the fifth input of the control unit, the quenching bus and the output of the optoelectronic switch 0 via a second light source connected in series and a second diode, the base of the transistor of each bit, except the first and last, is connected to the fifth input of the control unit through the first and second photoshop connected in series Receivers and the second diode, the first light source of each bit is optically connected with the third photodetector of the same bit and the second photodetector of the previous bit, the first photoreceiver of each bit is optically connected with the second light source of the previous bit, n analog inputs The terminals of the analog multiplexer are connected to the device inputs, the n address inputs are connected to the first outputs of the shifting unit, and the output is connected to the inputs of the analog key and two differentiators, the first input of the second element is NOT connected to the output of the first differentiator through the first element NOT, the second input to the output of the second differentiator, and the output to the control inputs of the analog and optoelectronic switches and the second input of the first element AND NONE whose first input is connected with the output of the first generator of impulses (PU / .3 Compiled by S. Rybin Tehred A. Kravchuk The first, second, and second inputs of the opto-removable key are connected to the second and the second power bus, respectively, the first inputs of the HVDC diode array are connected to the outputs of the second elements NOT, the second inputs to the second outputs of the shifting unit, whose information input is connected to the output of the second pulse generator. R Proofreading. Gorn