SU1241143A1 - Digital servo frequency meter - Google Patents

Abstract

The invention relates to the field of measurement technology. It can be used to digitally measure frequency and rate of change. The aim of the invention is to extend the functionality by measuring simultaneously with the frequency determination of its rate of change. For this, a device consisting of a reference frequency generator 1, a driver 2, a chronizer 3, a reversible counter 4, a binary multiplier 6 formed from counter 7, a group of impulse-potential valves 8, elements of an assembly 9, a pulse counter 10, a register 12, control of the splitter frequency 13, trigger 14, match element 18, reversible counter 5, pulse counter 11, triggers 15, 16, 17, match elements 19, 20, 21, assembly elements 22, 23 are entered. Pulse sequences arrive at the inputs add and subtract counter 5 in about but at the same time not leads to SBO m in the frequency. The pulse frequency at the input of the addition of counter 5 always exceeds the pulse frequency at the input of its subtraction. When the device is turned on, the first two periods are set, since the counter 7 and the up-and-up counter 4 are set when the power is turned to an arbitrary position. In the 3rd period after switching on the device, the rate of change of the measured frequency V can be determined. The device monitors the frequency of the signal, x (t) and its rate of change over each period. 2 Il. about SL

Description

The invention relates to a measurement technique and may be used to digitally measure frequency and rate of change.

The aim of the invention is to extend the functionality by measuring simultaneously with the frequency definition of the rate of its change. N F c.

FIG. 1 shows a block diagram; i offer rz p digital servo frequency meter} on; -fig. 2 - time diagrams of his work. The frequency meter consists of a reference frequency generator 1 (GOCH), a former 2, a chronizer 3, reversible counters 4 and 5, a binary knife 6, formed from counter 7, a group of pulse-potential gates 8 and elements 9 of the assembly, counters 10 and 11 pulses, a register 12, a controlled frequency divider 13, triggers 14-17, coincidence elements 18-21, assemblies 22 and 23.

The input signal bus is connected to the input of the imager 2, the output of which is connected to the input of the chronizer 3. The output of the frequency generator 1 is connected to the input of the binary multiplier 6 and the controlled frequency divider 13, the first inputs of the matching elements 18 and 19, the second one 3, the output of the latter is connected to the inputs of the installation in O of the pulse counter 10, the binary multiplier 6, the flip-flops 14 and 15, and the write inputs of the register 12 and the controlled frequency divider 13. The control inputs of the binary multiplier 6 are connected to the outputs of the register 12, and the output is connected to the input of the counter 10 pulses. The inputs of the register 12 are connected to the outputs of the counter 7 of the binary multiplier 6. The inputs to 1 of the flip-flops 14 and 15 are connected respectively to the outputs of the counter 10 and iguls and controlled divider frequencies 13, direct outputs — with inputs of assembly element 22 and second inputs and matching elements 18 and 19, respectively, the third inputs of which are connected to inverse outputs respectively of flip-flops 15 and. 14. The outputs of the elements 18 and 19 coincidence are connected respectively to the inputs of the subtraction and addition of rever-. a digital counter 4, the outputs of which are connected to the control inputs of the deli;

tel 13 frequency, as well as to the inputs of the installation in 1 and O of the trigger 16 and the inputs of the assembly element 23, the output of which is connected to the inputs of the installation

in 1 trigger 17 and the addition input of the reversible counter 5, the subtraction input of the latter is connected to the output of the coincidence element 20, the first input of which is connected to the output of the binary multiplier 6, and the second to the first input of the coincidence element 21 and the output of the trigger 17. Pulse counter 11 is connected s. output element 21 matches. The output of the reversible counter 5 is connected to the input - installation in the On trigger 17. The output of the assembly element 22 is connected to the installation input in About the counter 11. I

Frequency meter works as follows.

The input signal x (t), the frequency f of which is measured, is fed to the input of the imager 2, which, in conjunction with the timing controller 3, converts it into a sequence of short pulses with a duration equal to the duration of the pulse from the MOCh 1 (Fig. 2o), and the following frequency equal to the frequency f of the input signal

x (t) (Fig. 2).

The leading edge of the next pulse from the output of the chroniser 3. i.e. at the beginning of the current period TC, signal x (t), information about the previous period,

N

 M5-0 -0 o

(one)

where fg is the pulse repetition rate from the output of the GOCH,

40 from counter 7 of binary multiplier 6 is transferred to register, 12.

The falling edge of the same pulse is used to install binary multiplier 6, counter 7, counter 10 pulses, triggers 14 and 15 (Fig. 2 S, Z, respectively), as well as transfer the inverse code of the preliminarily cut frequency from 4 counter reversing

50 divider 13 frequency. At the same time at the output of the latter in time

TOC N

(2)

 ix (z) / fo a pulse appears from the beginning, 15 set points trigger 15 to 1.

During each current period (Tj ;;) x (t), at the output of Binary multiplier 6, a pulse frequency sequence of that pulse sequence is generated.

/ 2,

 o irii-o

where n is the number of binary bits of the multiplier 6 and register 12, being fed to the input of the t-bit counter 10 pulses. In this case, the output of the latter through time. "L

2 / fT.

(four)

an overflow pulse appears that sets a trigger to 14

 equality of TOR and Tj, i.e. While the flip-flops 14 and 15 are in the same state, the elements 18 and 19 of the coincidence do not transmit pulses from the output to the reversing inputs. counter 4 and, therefore, its condition is equal, taking into account (1) - (4).

about

Nj

fx (i.O

XO-2)

"(I)

remains unchanged.

With the inequality of To (. And 1 triggers, 14 and 15 are in opposite states in the time interval

LT (T -),

(6)

during which, at T, the addition of the reversible counter 4 through the coincidence element 1.9 (Fig. 2a), and at T /, the number of pulses from the output of the frequency warmer 1 equal to in view of (1) - (6)

AN-f. LT-N

, n + m

 B (; - o -

x (-0

At the beginning of the time interval dT, the counter 11 is set to O, a. the trigger 17 by the first pulse f in this interval is 1 (Fig. 2 L), in this case the passage of the pulses from the outputs of the GOCH 1 and the binary multiplier 6, respectively, to the input of the counter 11 (Fig. 2k) and the subtraction input of the counter 5 (Fig. 2 and), at the same time, pulses are output from the output of the element 18 or 19 of the coincidence element (Fig. 2) to the addition input of the latter, through the element 23,

ten

At the end of T, the flow of pulses to the input of the addition of the reversible counter 5 stops, and the pulses to the input of the counter 11 arrive before the counter is 5 added to zero, which leads to the establishment of the trigger 17 in O (Fig. 2n). At the same time, the connection time of the TUCH T. to the input of the Counter 11 is

P .

AT

uT / f

(eight)

and the number of pulses arriving at its input for dT, taking into account (1) - (8).

I zntni

N ..

 X (b0 "(i-2)

/ T

X (i14) (9)

fo

25

thirty

35

40

45

 . 50 55 20

where v is the rate of change of the measured frequency.

The sign of the speed vj, the frequency change, is determined by the trigger 16, which is set respectively to zero at v o or single at y: 0 - state by the first pulses of the sequences from the outputs, respectively, of elements 19 and 18 of coincidence (Fig. 2n).

Pulsing pulse sequences at the inputs of the addition and subtraction of counter 5 at the same time does not cause the frequency meter to malfunction, since the frequency of the pulses at the input of the addition of the counter 5 (fp) always exceeds the frequency of the pulses at the input of its subtraction ( fr) and, therefore, the counter 5 will never be established. At the end of the arrival of the pulses uN, and the effective edges of the input and output sequences for the binary multiplier are always time-bound, therefore coincidence. the pulses at the inputs of the addition and subtraction of counter 5, which are simultaneously input and output respectively for binary multiplier 6, are impossible. At zero rate of change of frequency. Therefore, the coincident elements 18 and 19 do not transmit pulses to the output and, therefore, the trigger 17 is in the zero state, while no pulses are passed to the inputs of counters 5 and 11. Counter 11 is reset to 0 by the pulse from the output of the assembly element 22 and also remains in zero state.

When the device is turned on (meaning the power supply to the circuit, since the start signal in the device is not present, it is intended for continuous operation), the first two periods are setting, as the counter 7 and the reversing counter 4 are set when the power is turned on. .

With the first pulse x (t), after switching on the device, the counter 7 is reset to 0 and during the first period x (t) after switching on, the indication of this period is not generated, transferred at the end of the period to the register 12. During the second period x (t) after switching on the device, a pulse frequency sequence is formed at the output of binary multiplier 6 with a pulse frequency that is directly proportional to the first period x (t) (see expression (3)). Therefore, the trigger 14 forms a ten-term interval T (see expression (4)) corresponding to the indication f) {for the first period x (t) after switching on the device, and the trigger 15 - a time interval corresponding to the formula reversible counter .4. Over a period of time LT between T, and T05, the readings are corrected to the value corresponding to the value of the measured frequency for the first period x (t) after the Power Up. Therefore, in the third period after switching on the device, the rate of change of the measured frequency v can already be determined. Subsequently, the device monitors the value of the signal frequency x (t) and the rate of its change over each period.

Triggers 14 and 15 during operation of the device (including the first two periods x (t) after it is turned on) operate according to the patterns in FIG. 2, .B, d. The trigger 17, when connected to the power supply, can be set to either of two states O or 1. When set to O, it works in accordance with the diagram in FIG. 2ik. When installed in 1 trigger 17 allows the passage of pulses to the input of the counter 11 and the input of the counter

5 before dT start. During the first setup period, the counter 5 reaches up to O, which leads to the installation of the trigger 17 in O and its operation, starting from the second setup period, as shown in FIG. 2

Claims (1)

Invention Formula Digital tracking frequency counter containing the reference frequency generator, driver, chronizer, first reversible counter, binary multiplier, first pulse counter, register, controllable frequency divider, first match element and first trigger, the input signal bus connected to the driver input, the output of which connected to the input of the synchronizer, the second input of which is connected to the output of the reference frequency generator, the input of the binary multiplier, the input of the controlled frequency divider and the first input of the first element coincide and the output with the inputs of the installation of the binary multiplier and the first pulse counter, the write inputs of the register and the controlled frequency divider, the control inputs of the binary multiplier connected to the x register outputs, and the output to the input of the first pulse counter, the outputs of the first reversible counter are connected to the control inputs 1 and the frequency divider, the direct output of the first trigger is connected to the second input of the first matching element, and the register inputs with the outputs of the binary multiplier counter, characterized in that, in order to expand national capabilities, a second reversible counter, a second pulse counter, three triggers, three coincidence elements and two assemblies are entered, the outputs of the first pulse counter and the controlled frequency divider are connected to the installation inputs of the first and second triggers respectively, the installation inputs to About which are connected to the output of the chronizer, the direct outputs are connected to the inputs of the first component of the assembly, and zero to the third inputs of the second and first elements of the match, respectively, the outputs are connected respectively to inputs of adding and subtracting the first down counter, inputs setting of G and third latch inputs and WTO 1 The horn of the assembly element, the output of which is connected to the installation input of the 1st fourth trigger, the addition input of the second reversible counter, the input of the last subtraction is connected to the output of the third coincidence element, the first input of which is connected to the output of the binary multiplier, and the second Fourth Trig 411438 The second input pulse counter is connected to the output of the fourth coincidence element, the second input of which is connected to the output of the reference frequency generator 5 and the first input of the second coincidence element, the second input of which is connected to the forward output of the second trigger, the output of the second reversible counter is connected to the input 10 of the installation in About the fourth trigger, the output of the first element of the assembly is connected to the input of the installation in About the second counter. signVf Fig, 1 j, -tt to ic "a M tsa." ("h a"