SU1233193A1 - Device for reading graphic information - Google Patents

Abstract

The invention relates to the field of automation and computing. in particular, to devices for reading graphic information, and can be used to encode and enter information into a computer. The purpose of the invention is to improve the noise immunity of the device. This is achieved by analyzing the sign of the filter signal and comparing the read signals with a given positive threshold, the value of which determines the noise immunity of the analyzer for positive input pulses, and a negative threshold, the value of which determines the noise immunity of the analyzer for negative pulses T As a result of the comparison, the outputs of the corresponding comparators are formed the amplitude differences of the previous and subsequent pulses and the amplitude difference of the specified pulses and the given constants. 1 il. § sl with soo oo 1 aL ss SLE

Description

one

The invention relates to automation and computing, in particular to devices for reading graphic information, and can be used to encode and enter information into a computer.

The purpose of the invention is to increase the noise immunity of the device.

The drawing shows a block diagram of the device.

The device includes a puller 1 coordinates j amplifier 2, the first memory block 3, the generator 4 pulses, low pass filter 5, comparator 6, comparators groups 7-9, first 10, second 11, third 12 and fourth 13 registers, shift register 14, the counter 15, the second memory block 16, made in the form of a permanent storage device (ROM), the third memory block 17, also made in the form of a ROM, the fourth memory block 18, the fifth memory block 19, for example the ROM, the sixth block 20 memories, a group of meters 21 and 22, elements AND 23 and 24, an element OR 25, a group of amplifiers 26 and 27, whose outputs are Connected to the tablet coordinate tires (not shown).

The drawing also shows the inputs 28-31 and the outputs 32-36 of the device.

The device works as follows.

The generator 4 together with the counter t5 and the block 16 prepares the set clock signals for all other elements of the device, synchronizing their work and providing the set time diagrams of their work.

The control circuit consisting of registers 10 and 12 and block 19 loads the code from block 17 into the shift register 14 and supplies the resolution to the amplifier 26 of the power of the X coordinate The code from each second trigger register

Tunnel 14, through amplifier 26, is fed to the corresponding bus X coordinates in order of increasing numbers. Simultaneously with the supply of the resolution to the amplifier 26, the indicated control circuit resets the counters 21 and 22 coordinates to O and supplies the resolution to the AND element 23, which begins to transmit pulses from the clock generator A to the counter 21 input of the coordinates X "Clock frequency of the clock generator 4 so many times the main clock frequency

five

31

five

0

five

0 s

0 5

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How many times more accurately is it necessary to measure the coordinates in comparison with the distance between, and the coordinate tires. For example, when the distance between the coordinates and the tires is 5 mm, and the specified accuracy is 0, 02 mm, the frequency of the pulses of the clock generator 4 is 250 (256) times greater than the main clock frequency.

The counter 21 of the X coordinate measures the time from the start of scanning (polling) the X coordinate to the moment when the prohibition signal for the element 23 does not come from the element ShZh 25, the signal from the puller 1 of the coordinates is amplified by the amplifier €; m 2 and is fed to the input block 3. This block remembers the amplitudes of those pulses that arrive at the moments of the pulses of the main clock frequency. The signal from block 3 is fed to the input of block 18, which, before recording the amplitude of the next pulse from amplifier 2, remembers the amplitude of the previous pulse.

The output signal of the analog block 18 is applied to filter 5. Filter 5 is designed as an integrating element of the second, third or fourth order with a time constant of, for example, half the period of the main clock frequency. Filter 5 C1 clears the signal from the output of block 18 so that only the envelope from the input signal remains.

The time when the signal from the filter changes sign, carries information about the exact coordinate of the sensor.

The signals from blocks 3 and 18 are sent to comparator 6. The signal from block 3 is fed to comparator 7, which compares it with some positive value, which determines the noise immunity of the analyzer for positive input pulses, and to comparator 8, which compares with some negative the analyzer noise immunity value for negative input pulses.

The signal from filter 5 is fed to a fourth comparator 9, which is implemented: a comparison with zero and determines the sign of the signal. Thus, the comparator 6 gives the result of comparing the amplitude of the incoming pulse with the amplitude of the previous one, TT comp S1

The rators 7 and 8 give the results of comparing this pulse with the given constants, and the comparator 9 determines the sign of the signal from the filter output.

The automaton consisting of the register 11 of the memory block 20 and the register 13, operating at the main clock frequency, analyzes the state of the comparator, depending on its current state, comes to its next state according to the algorithm embedded in block 20. From the moment the beginning of scanning until the automaton transitions to the corresponding state, the automaton maintains the state of the logical unit at the first input of the element OR 25, thereby providing resolution to the counting for the counter 21 of the X coordinate by means of the AND 23 element.

In the following state, logical 1 at the second input of the element OR 25 is provided with a comparator 9 until the signal sign from the output of the filter 5 changes to negative. In this case, both inputs of the element OR 25 and its output have a logical O value, which leads to blocking the element 23 and stopping the counter 21 of the X coordinate, the code in which corresponds to the exact coordinate of the sensor along the X axis.

At the same time, the signal from the OR 25 element is fed to one of the inputs of the automaton of the control circuit, which consists of register 12, memory block 19 and register 10. This automaton, having received a signal from the OR 25 element, that the measurement along coordinates X is complete, switches the entire device to the measurement mode of the Y coordinate. In this mode, the device operates in the same way, but only the tires of the Y coordinate are controlled by the amplifier 27, and the calculation produces a counter 23 of the Y coordinate and the AND 24 element.

After calculating the coordinate Y, the control circuit from the registers 10 and 12 and the memory block 19 blocks the operation of the device, and requests the computer about the readiness of the coordinates. The computer reads the code from counters 21 and 22 and gives a response signal to the control circuit. Then the measurement cycle is repeated.

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Claims (1)

Invention Formula A device for reading graphic and chic information, containing a hydraulic arm made in the form of two systems of mutually orthogonal coordinate buses connected to the outputs of the respective amplifiers of the group, an amplifier whose input is connected to the output of the coordinate remover, and the output is connected to one input of the first memory block, the other the input of which is connected to the output of the second memory block. A gate, whose input is connected to a pulse generator, and an output is connected to the input of the second memory block, a group of meters whose inputs are connected to the outputs of the first register and the corresponding AND elements, and the outputs are device outputs, shift register whose inputs are connected to the outputs of the first the second and third memory blocks, and the outputs are connected to the same inputs of the corresponding amplifiers of the group, the other inputs of which are connected to the output of the first register, the comparator, one input of which is connected to the output of the first block memory, a low-pass filter and an OR element, while the generator output KMTtynbcoB is connected to the inputs of the AND elements, which are different heme that, in order to increase the noise immunity of the device, it contains a fourth memory block, the inputs of which are connected to the outputs of the first and second memory blocks, and the output is connected to the input of a low-pass filter, a group of comparators, one of the inputs of which are the inputs of a device group, the other inputs of the first and second comparators of the group are connected to the output of the first memory block, and the other input of the third comparator The group is connected to the output of the low-pass filter, the second register, the inputs of which are connected to the outputs of the comparators and the second memory block, the third register, one input of which is the input of the device, the others connected to the outputs of the second memory block and group counters, five memory blocks, the inputs of which are connected to the outputs of the first and third registers and the output is connected to one input of the first register, the other input of which is connected to the output of the second memory block, and the sixth memory block connected in series, one input of which is connected to the output the second register 5 and the fourth register, another input of which is connected to the output of the second memory block; outputs are connected to another input of the sixth memory block PI to one input of the IPI element, the OTHER input of which is connected to the output of the corresponding the comparator of the group, and the output is connected to the input of the third register and to the second input of the And elements, the third input of which is connected to the output of the first register, while the output of the fourth memory block is connected to another input of the comparator. 1.1 L fi- p. 3 to computer Jt r: r.J X To tires Y 33 3 Compiled by A, Romanov Editor S., Patrusheva L. Serdyukova Proofreader S. Shekmar Order 2775/53 Circulation 671 -VNIIPI USSR State Committee Inventions and discoveries 113035, Moscow, 1-35, Raushsk nab. 4/5 Production floor: a game enterprise, Uzhgorod, st. Design, And Subscription