SU1226632A1 - Device for monitoring pulse repetition frequency - Google Patents

Abstract

The invention can be used to control measuring and electronic computing devices. The purpose of the invention is to increase the reliability of the control. The device contains an input bus 1, element 2 NOT, triggers Z 4 ,. resistors 5 and 6, diodes 7 and 8, capacitors 9 and 10, element 11 OR NOT, output bus 12, power bus 13, common bus 14 and single-oscillators 15 and 16. Elements 5, 7 and 9, and elements 6, 8 and 10 constitute the integrating links, which, respectively, with the triggers 3 and 4 constitute the one-shot 15 and 16, triggered by a positive differential clock pulse. The introduction of the elements NOT and OR-NOT allowed to fix the failure that may occur (O C CO to

Description

just before the end of the controlled sequence

The invention relates to a pulse technique and can be used to control measuring and electronic computing devices.

When designing specialized devices that are part of an automated testing system for measuring the temporal parameters of signals, continuous monitoring of the frequency of the clock pulse following is very important, since the accuracy of the formation of the clock pulse generator by the generator mainly determines the measurement accuracy. With the departure of the clock frequency from the nominal frequency control circuit should generate a signal indicating a failure of the clock pulse generator. The same signal should be generated in case of generator failure, i.e. with the disappearance of periodic clock pulses. This signal can be used both for visual indication on the front panel and for transmitting code information from system measurement devices to a device for collecting and pre-processing.

The purpose of the invention is to increase the reliability of control due to the fixation of a fault, which may occur immediately before the end of the controlled sequence of clock pulses.

The drawing shows a diagram of a device for controlling the frequency of a pulse of ice.

The device contains an input bus 1, the element is NOT 2, the trigger 3 and 4, the resistors 5 and 6, the diodes 7 and 8, the capacitors 9 and 10, the element OR NOT 11 ,. One bus 12, (Power bus 13,: common bus 1A, one-shot 15 and 16.

 Input bus 1 is connected to clock-trigger V1LM with trigger input 3 and through the MftHt HE 2 - to clock input of trigger 4, informational inputs of trigger pulses. 1 il.

2 3.p. f-ly,

Geers 3 and A are connected to the power bus 13, the common bus 14 is connected to the first plates of capacitors 9 and 10, the second plates of which are connected respectively to the installation inputs of the flip-flops 3 and 4, connected respectively to the first terminals of the resistors 5 and 6 and connected respectively to anodes of diodes 9

and 8, the cathodes of which are connected respectively to the direct outputs of the flip-flops 3 and 4, are connected respectively to the second terminals of the resistors 5 and 6 and are connected respectively to

the first and second inputs of the element 1-W-NOT 1 1, the output of which is connected to the output bus 12. The installation inputs to the unit of the flip-flops 3 and 4 are connected to the common bus 14.

Elements 5, 7, and 9, and elements 6, 3, and 10 constitute the integrating units, which, respectively, with triggers 3 and 4, constitute the first single vibrator 15 and the second single vibrator 16, which are triggered by a positive clock pulse differential.

A device for monitoring the pulse frequency operates as follows.

When the power is turned on and there are no pulses at the direct outputs of the input bus 1 - the triggers 3 and 4, zero potentials are maintained, which are set at the output of the OR-NOT 11 element and the output gan 12 unit potential, which indicates the absence impulses on the input bus 1.

When a positive impulse with a duration T is applied to the input bus 1, a positive impulse T is formed on the forward output D gtrigger 3. Pulse duration

T is determined by the parameters of the capacitor 9 and resistor 5 and is chosen to have a longer pulse T on a non-value x. This impulse is set3

There is zero potential on the output bus. 12

The occurrence of a negative impulse Tj on the input bus 1 causes a positive pulse T to form on the forward output of 1) -trigger 4, the pulse duration T is determined by the parameters of the capacitor 10 and resistor 6 and is chosen longer than the pulse duration Tj by. This pulse maintains zero potential on the output bus 12. The values of y. and p are chosen taking into account the tolerances of the controlled frequency from the nominal one.

Thus, if the controlled frequency corresponds to the nominal one, then on the output bus 12, a zero potential is maintained by a single potential at one of the outputs of the OR-NOT 11 element.

With an increase in the controlled frequency compared to the nominal one at the end of the formation at the direct output D-trigger of 3 positive pulse T and at the direct output of D-trigger 4 positive pulse T, (FIG. 2b), the first and second inputs of the OR-HE element 11 are set zero signals, which leads to the appearance at the output of the element OR-NE 11 and the output bus 12 a positive pulse, indicating a deviation of the controlled frequency from the nominal one.

When the controlled frequency decreases in comparison with the nominal one after the termination of the pulse TC at the direct output) trigger 4, which maintains a zero potential on the output bus 12, a single potential is established on it, since zero and first potentials are installed on the first and second inputs of the ILIDI element 11 . A single potential is held on the output bus 12 until the next positive pulse arrives, which brings the device back to its original state. If the next period of the controlled frequency is more than the nominal one, then a control positive pulse is formed again on the output bus 12.

VNIIPI Order 2146/57 Circulation 816 Subscription Proizv.-poly. pr-tie, Uzhgorod, st. Project, 4

26632

Upon the disappearance of the controlled frequency on the input bus 1, the output bus 12 is set to a positive logic level, which signals about the exhaustion of the periodic signal. The operation of the circuit in this situation is analogous to the Fna in the described case of a decrease in the controlled frequency in comparison with the nominal one.

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Claims (3)

1. A device for controlling the pulse frequency, containing ) 5 input and output buses, two single vibrators, the clock input of the first of which is connected to the input bus, characterized in that, in order to increase the reliability of the co2a2 role, the element NOT and the element OR NOT, the output and the first and second the inputs of which are connected respectively to the output bus and to the direct outputs of the first and second single-oscillators, the clock input of the last of which is connected to the output of the HE element whose input is connected to the input bus, 3Q 2. Device pop. 1, which differs from each other in that each single vibrator contains a trigger and an integrating circuit, the input of which is connected to the direct output of the trigger and the output of a single vibrator, the clock input of which is connected to the trigger input of the trigger, information the input, the inputs of the installation in 1 and O which are connected respectively to the power rail, to the common bus and to the output 35 40 45 50 tagging chains ... 3. The device according to claim 2, that is, that the integrating circuit contains a resistor, a diode and a capacitor, the first lining of which is connected to the common bus, the second lining is connected to the output of the integrating circuit, to the anode of the diode and to the first output of the resistor whose second pin is connected to the input of the integrating circuit and to the cathode of the diode.