SU1215170A1 - Pulse-position modulation device - Google Patents

Abstract

The invention relates to the field of radio engineering and may find application in communication systems. Invention: x: allows to increase the reliability of the transmitted information. The device contains the generator I reference frequency, the element And 2, the counter 3 pulses, the decoder 4, the switch 5, the key 6, the source 7 constant voltage, buffer and matching cascades 8 and 11, the detector 9, the capacitor 10, the threshold unit 12 and the block 13 stabilization discharge capacitor. The capacitor 10 is discharged to a certain level (zero level at which at the output of the threshold unit 12 a voltage drop from a potential log is formed, 1 to a potential log. O. 1 ill. In r sd

Description

one

The invention relates to radio engineering and may find application in communication systems.

The purpose of the invention is to increase the reliability of the transmitted information.

The drawing shows a block diagram of a device for phase-pulse modulation.

The device contains a generator of reference frequency I, element 2, pulse counter 3, decoder 4, switch 5, switch 6, constant voltage source 7, buffer stage 8, detector 9, capacitor 10, matching stage 11, threshold unit 12 and a capacitor discharge stabilization unit 13, wherein the output of the generator 1 of the reference frequency is connected to the first input of the element I 2, the output of which is connected to the first input of the counter of 3 pulses; The first output of the counter 3 pulses is connected to the input of the decoder A, the output of which is connected to the second input of the counter 3 pulses and to the first input of the switch 5, the First output of the switch 5 is connected to the second input of the And 2 element, the second to the input of the key 6, the first output of which is combined with the first output of the constant voltage source 7 and connected to the input of the buffer cascade 8. The second output of the switch 6 and the second output of the source of the constant voltage 7 are connected to the common bus. The output of the buffer stage 8 is connected to the input of detector 9, the output of which is connected to the input of matching stage 11. The output of matching stage 11 is connected to the input of threshold unit 12, the output of which is connected to the second input of comparator 5. The output of detector 9 is connected via a capacitor 10 to a common bus .

The first and second outputs of the capacitor discharge stabilization unit 13 are connected respectively to the output of the detector 9 and to the common bus, and the output to the input of the device.

The device works as follows.

From the output of the reference generator 1, the frequency signal in the form of a meander goes to the first input of the element 2, which opens for the time Tupto, where Tj is the pulse following period, and n is the number of pulses. From the output of the element AND 2, the pulses are fed to the first input of the counter 3 named 151702

 pulses, which is triggered only at those points in time when the potential corresponding to logical 1 is present at the second input of an And 2 element.

5 From the output of the counter of 3 pulses, the signal in the form of a binary code is fed to the decoder 4. After the arrival of AND pulses at the output of the decrypt- of torus 4 a reset pulse is generated,

10 which is fed to the second entrance

(input zero) of the counter 3 pulses and brings it to its original state. A reset pulse is also fed to the first input of the switch 5. The switch 5 controls the operation of the element 2 and the key 6.

The reset impulse coming from the decoder 4 affects the switch 5 so that at its first output the potential appears logical O, and at the second (inverted output logical 1.

Constant voltage source 7 with high internal resistance

25 produces constant voltage. This happens only at those moments when the logical output O appears at the first output of switch 5. At this time, the capacitor 10 charges through the detector 9. When the potential appears, logical 1 opens switch 6 at the first output of switch 5 and bypasses source 7 constant voltage high

r is an internal resistance, with the potential of logic O appearing at the output of the buffer stage 8 and the capacitor 10 will be discharged through the block 13.

4Q The capacitor discharge stabilization unit 13 is made in the form of a current source with which it is possible to maintain a constant amount of capacitor discharge current of 10 volts.

5 throughout the entire time of formation of the pulse following period. When a low frequency signal is applied to the input of block 13, the discharge current of the capacitor 10 changes, which

, Q leads to a change in the pulse following period, i.e. unit 13 performs modulation cyo. The capacitor IO is discharged to a certain (zero) level, at which at the output of the threshold block I2 forms 55

With a voltage drop from the logical potential 1 to the logical potential O, these voltage drops are 31

are given to the second input (the setup zero input) of the switch 5 and control its operation. For example, when a potential is applied to the second input of the switch 5, a оп optic O at its first output produces a potential of logical I, and a logical O at the second (inverse) output. The potential of logical I from switch 5 is fed to the second input of the And 2 element and opens it. As a result, a burst appears at the second output of the pulse counter 3.

Claims (1)

Invention Formula A phase-pulse modulation device comprising a reference frequency generator, an AND element, a pulse counter, a decoder, a switch, a key, a constant voltage source, a capacitor, a buffer cascade connected in series, a detector, a matching stage and a threshold block, the output of the reference frequency generator is connected to the first input of an And element whose output is connected to the first input of a pulse counter. Editor M.Kelemes Compiled by K. Krivutsenko Tehred O. Netse 911/59 Circulation 818 VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Corr Sub Branch of PPP Patent, Uzhgorod, Proektna St., 4 704 The first output of which is connected to the input of the decoder, the output of which is connected to the second input of the pulse counter and the first input, output of the switch, the first output of which is connected to the second input of the And element, and the second output connected to the input of the key, the first output of which is combined with the first output source of direct voltage and connected to the input of the buffer cascade, and the second output is connected to the common bus, the output of the threshold unit is connected to the second input of the switch, the output of the detector is connected via a capacitor to the common bus, the second output is Pulse is a device output, characterized in that, in order to increase the reliability of information transmitted, a capacitor discharge stabilization unit is introduced, the first output of which is combined with the detector output, the second output is connected to the common bus, and the control input is connected to the input of devices The second output of the constant voltage source is connected to the common bus. Korrektor.V.But ga Subscription