SU1185579A1 - Clock pulse generator with check - Google Patents

Abstract

A CLOCK GENERATOR WITH CONTROL, containing a master oscillator, a clock pulse generator, a first inverter, an amplifier, an input and an output of the first inverter, are respectively connected through the first and second capacitors to the inputs of the bridge rectifier, so that In order to increase the control speed, the first and second elements of the NAND, the second and third series-connected inverters are introduced, the upper arm of the bridge rectifier is made on the first and second transistors, the bases of which are connected to the corresponding named the inputs of the bridge rectifier and the cathodes of the lower arm diodes, the anodes of which are connected to the power supply bus, and the collectors of the transistors are combined and connected to the positive power supply bus, the emitters are also connected n through an integrating circuit connected to the input of the amplifier, the output of which is connected through the second and The third inverter is connected to the first input of the first NAND element, the output of which is the output of a clock generator with control, and the second input (/ of the first NAND element is connected to the output Od of the shaper pulse generator and the first input of the second NAND element, the second input of which is connected to the output of the master oscillator and the input of the shaper pulse generator, and the output - to the input of the first 00 inverter. ate j

Description

one

The invention relates to radioelectronic devices and can be used in redundant clock drivers, in power supply loss monitoring devices.

The purpose of the invention is to increase speed.

A clock oscillator with a control with holds the master oscillator 1, the driver 2 clock pulses, the first inverter 3, the amplifier 4, the input and output of the first inverter 3, respectively, through the first and second capacitors 5 and 6 connected to the inputs of the bridge rectifier 7, the first and second elements And - NOT 8 and 9, the second and third series-connected inverters 10 and 11, the upper arm of the bridge rectifier 7 are made on the first and second transistors 12 and 13, the bases of which are connected to the corresponding inputs of the motor rectifier 7 and the cathodes of the diodes 14 and 15 of the bottom the anodes of which are connected to the negative busbar 16 of the lithium source, and the collectors t of the anzistors are combined and connected to the positive bus 17 of the power source, the emitters are also connected through the integrator circuit 18 to the input of the amplifier 4, the output of which is connected through the second and the third inverters 10 and 11 are connected to the first input of the first element AND-HE 9, the output of which is the output 19 of the clock generator with; control, and the second input of the first element IS-HE 9 is connected to the output of the driver 2 clock pulses and ne With the second input of the second element IS-HE 8, the second input of which is connected to the output of the master oscillator 1 and the input of the driver 2 clock pulses and the output to the input of the first inverter 3.

The clock generator with control works as follows.,

When the supply voltage is turned on, the master oscillator 1 excitation is 855792

and its signals through element 8 AND-NOT, inverter 3, capacitors

5 and. 6 are fed to the inputs of a two-way, full-wave bridge rectifier 7. 5 The signals at the input-output of the inverter 3, due to the large input impedance of transistors 12 and 13, have a high realism that

allows capacitor capacitance

About the integrating circuit 18 to be reduced to the minimum and to provide a forcing / cue opening of the first transistor amplifier 4, which puts the next transistor of the amplifier 4 IS in the cut-off mode, and at its output

A single level appears, which acts through the inverters 11 and 10 on the first input of the element AND-HE 9 and allows the generator 2 signals to pass to the output of the element AND-HE 9, the output of the clock generator with the control ..

When the supply voltage decreases, transistors 12 and 13 and the first

the amplifier transistor relay switches to cut-off mode.

The peculiarity of the transition of the second transistor amplifier to the cut-off mode is that the threshold of operation of this transistor is higher than the voltage threshold, at which generation is generated and logical signals are generated with an indeterminate output state.

. The marked property allows to block the channel that is denied by the power source before the logic signals are distorted in it. In addition, a high gain bridge rectifier, due to the use of emitter followers in the upper arm, increases the speed of the transition of the transistor to the cut-off mode, i.e. increases the sensitivity of the threshold

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Claims (1)

A TACT CONTROL GENERATOR containing a master oscillator, a clock driver, a first inverter, an amplifier, an input and output of a first inverter through respectively a first and a second capacitor is connected to the inputs of a bridge rectifier, characterized in that, in order to increase the control speed, first and second elements NAND, the second and third series, the bases of which are connected to the corresponding inputs of the bridge rectifier and the cathodes of the diodes of the lower arm, the anodes of which are connected to the bus of the power supply, and the collectors of transistors are combined and connected to the positive bus of the power supply, emitters are also combined through an integrating circuit is connected to the input of the amplifier, the output of which is connected through the second and third inverters connected in series to the first input of the first AND-NOT element, the output of which is the clock output iterator with control, and the second input of the first NAND element is connected to the output of the pulse shaper and the first input of the second NAND element, the second input of which is connected to the output of the master oscillator and the inverters are connected, the upper arm of the bridge rectifier is made on the first and second transistor the input of the clock driver, and the output with the input of the first inverter. SI m CO 1 1185579 2