SU1166317A1 - Harmonic corrector - Google Patents

Abstract

A HARMONIC CORRECTOR contains an N-branch delay line, the output of which is the input of the harmonic equalizer, and each of the outputs is connected to the first input of the corresponding N multipliers, the output of each of which is connected to the corresponding adder input. vr: .- J whose output is the output of a harmonic equalizer, characterized in that, in order to reduce the tuning time and increase its accuracy, a control signal conversion unit with N inputs is entered into it, the N outputs of which are connected to the second inputs of N multipliers , implemented the function Nt,. a g, (-1) b exp | j-L - k (n4) N, 1, ..., N-1, where a is the value of the signal at the n-th output of the control signal conversion unit; (L b is the value of the signal at the cm input of the control signal conversion unit; j is the imaginary unit. 3 OE about: with

Description

The invention relates to radio engineering and can be used in multi-channel communication systems.

The aim of the invention is to reduce the setup time and increase 5 its accuracy.

The drawing shows a structural electrical circuit of a harmonic corrector.

The device contains an N-tap-off delay line 1, multipliers 2, an adder 3, and a control signal conversion unit 4.

The device operates as follows. fifteen

The input signal of the corrector is fed to the input of the N-tap delay line 1. The output signals of the delay line 1 are supplied to the first inputs of the corresponding N multipliers 2, where they are multiplied by the control signals a n = 0: N-1, received P 'at the second inputs of the multipliers 2 from the outputs of block 4.

From the outputs of the multipliers 2, the signals 25 are fed to the inputs of the adder 3, the output signal of which is the output signal of the corrector.

The inputs of block 4 receive control signals b ^,. k is 0; N-1, the values of which are set in the Setup mode. Block 4 converts these signals according to

N-1 a = £ Σ. (-1) ^k b to the expression

p-0; N-1 (1) where j =] A ~.

In Setup mode, the proposed 4Q corrector works as follows.

The frequency response of the cascade connection of the communication channel and the corrector with the control signal values previously set is measured 45

B ^, k = 0; N-1. The control signals bj ^ slowly change to obtain the desired frequency response. Moreover, when each control signal is changed, b ^, k = 0; The N-1 frequency response of the cascade connection of the communication channel and the corrector changes only in a relatively narrow frequency band centered on the frequency

YT ^k ' ^{k = 0; N_1} 'where T is the delay time of one element of the delay line 1.

In particular, it is possible to adjust the corrector in such a way that at frequencies sc, k = 0; N-1, the resulting frequency response of the cascade connection of the communication channel and the corrector will be exactly equal to the required frequency response, and at intermediate points it slightly fluctuates near it.

With the indicated corrector adjustment algorithm, a local character of the frequency response change is provided when each of the control signals changes, which reduces the corrector setup time.

The Setup mode differs from / the Run mode in that in the Run mode the control signals at the input of unit 4 do not change. At the same time, the signal values are equal to the values set in the Setup mode.

When using the device as a cosine corrector of the amplitude-frequency characteristics, expression (1) is converted into the expression

B _about 2 z. , 2L, 1.1 ^bk , ^{k <n} * 2 ⁾ ] n ^ O; N-1.

{N. ''

- = 1 at N - even,

N-1

--- when N is odd.

Claims (1)

HARMONIC CORRECTOR, containing an N-tap delay line, the output of which is the input of the harmonic corrector, and each of the outputs is connected to the first input of the corresponding of N multipliers, the output of each of which is connected to the corresponding input of the adder, the output of which is the output of the harmonic corrector, with the fact that, in order to reduce the setup time and increase its accuracy, a control signal conversion unit c. N inputs, N outputs which are connected to second inputs of the N multipliers, ^and performing the function S ^v · d ^{'exp [J k (n 4'J} · π 0,1, ..., N- 1, where a _n - value of the signal at the ηth output of the control signal conversion unit; - the signal value at the k-th input of the control signal conversion unit; j is the imaginary unit.