SU1149296A1 - Telemetry system - Google Patents

Abstract

TELEMECHANICS SYSTEM, containing a pulse generator at the control room, the output of which is connected to the first input of the controlled frequency divider, the output of which is connected to the input of the coding unit, the outputs of the coding unit through the transmitter are connected to the first communication line, the control keys, the outputs of which are connected to the first inputs the first block of elements And, the address allocator, the inputs of which are connected to the corresponding outputs of the coding block, the outputs of the register are connected to the corresponding first inputs of the first block With the second inputs of the first block of elements And, the outputs of the first memory block are connected to the corresponding indicators, the second communication line is connected to the receiver input, at each controlled point the first communication line is connected to the receiver input, the outputs of the address allocator are connected to the corresponding the first inputs of the first discriminators and elements And whose outputs through the contacts of the sensors are connected to the first input of the first element OR, the outputs of the first discriminators are connected to the corresponding inputs of the block memory and with the second inputs of the elements And, the output of the first element OR is connected via a transmitter to the second communication line, characterized in that, in order to increase the reliability of signal transmission, a block of integrators, a second block of elements AND, an element OR, a strobe pulse shaper and a second memory block, the receiver output is connected to the integrator block input, the outputs of which are connected to the corresponding second inputs of the first and second memory blocks, the outputs of the first and second blocks of elements AND With Connected to the inputs of the OR element, the output of which is connected to the second i input of the controlled frequency divider and the first input of the strobe pulse former (L co, the second input of which is connected to the output of the pulse generator, the third input is connected to the output of the controlled frequency divider, the first output the strobe pulse former is connected to the first inputs of the second memory block, the second gate strobe pulse output is connected to the third input of the first memory block, the address distributor outputs are connected to the corresponding second inputs of the second memory block 4, the outputs of which are connected to the corresponding indicators, on the receiving side integrator blocks are entered, in the second discriminators, the OR elements and the inverter block O5, the receiver outputs are connected through the integrator blocks to the corresponding inputs of the address distributor, and through the second discriminators - to the inputs of the second OR element, the output of which is connected to the control inputs of the memory unit, the outputs of the first discriminators are connected via the inverter unit to the inputs of the third OR element, the output of which connected to the second input of the first element OR.

Description

The invention relates to telemechanics and is intended for telemechanization of objects remote from the control center at a considerable distance.

Telemechanics devices are known based on the use of parallel-serial coding of messages and decoding them with multi-cycle relay blocks (state machines). These devices contain an encoder, the outputs of which are fed to the distributors of the channels of the control room and controlled points. The outputs of the distributors, made in the form of decoding automata cells, are connected through control logic circuits at the control center with control keys, the memory elements of the tele-alarm and telemetry channels, and at controlled locations - with the memory elements of the tele-control channels, with tele-alarm sensors and a telemetry transmission unit. The dispatch and controlled points are connected with each other by a communication line containing address and informational strings 1.

The known devices require a significant number of address lines in the communication line and are structurally complex.

The closest to the proposed technical entity is a remote control system containing a pulse generator at the control room, the output of which is connected to the first input of a controlled frequency divider, the output of which is connected to the input of the coding unit, the outputs of the coding unit are connected via the transmitter to the first communication line, control keys, the outputs of which are connected to the first inputs of the first block of elements AND, the address allocator whose inputs are connected to the corresponding outputs of the coding block, the outputs the register is connected to the corresponding first inputs of the first memory block and to the second inputs of the first block of elements AND, the outputs of the first memory block are connected to the corresponding indicators, the second communication line is connected to the receiver input, at each monitored point the first communication line is connected to the input the receiver, the outputs of the address distributor are connected to the corresponding first inputs of the first discriminators and AND elements, the outputs of which are connected to the first input of the first element OR via the sensor contacts, the outputs of the riminatorov connected to respective memory unit inputs and second inputs E ementov And, an output of first OR gate through the transmitter is connected to the second link 2.

However, in this system, the address allocator at the controlled point is connected directly to the receiver outputs, and at the control tower the output of the receiver

It is also connected directly to the elements of the TV signaling and telemeasurement channels, which adversely affects the noise immunity and reliability of information transmission. In addition, in the known device, there are no means for increasing the reliability of the transmitted information, in particular the telecontrol commands transmitted over a large distance.

The purpose of the invention is to increase the reliability of signal transmission.

The goal is achieved by the fact that the telemetry system containing a pulse generator at the control station, the output of which is connected to the first input of the controlled frequency divider, the output of which is connected to the input of the coding unit, the outputs of the coding unit, through the transmitter, are connected to the first communication line, the control keys The outputs of which are connected to the first inputs of the first block of elements AND, the address allocator whose inputs are connected to the corresponding outputs of the coding block, the outputs of the register are connected according to the first inputs of the first memory block with the second inputs of the first block of elements And, the outputs of the first memory block are connected to the corresponding indicators, the second communication line is connected to the receiver input, at each monitored point the first communication line is connected to the receiver input, the addresses of the distributor connected to the corresponding first inputs of the first discriminators and elements, the outputs of which through the contacts of the sensors are connected to the first input of the first element OR, the outputs of the first discriminators are connected With the corresponding inputs of the memory block and with the second inputs of the AND elements, the output of the first element OR is connected via a transmitter to the second communication line, the integrator block, the second block of AND elements, the OR element, the strobe pulse generator and the second memory block are entered at the control room. ti, the receiver output is connected to the integrator unit input, the outputs of which are connected to the corresponding second inputs of the first and second memory blocks, the outputs of the first and second blocks of the AND elements are connected to the inputs of the OR element, the output of which is connected n with the second input of the controlled frequency divider and the first input of the strobe pulse former, the second input of which is connected to the output of the pulse generator, the third input is connected to the output of the controlled frequency divider, the first output of the strobe pulse former is connected to the first inputs of the second memory block , the second output of the strobe pulse generator is connected to the third input of the first memory block, the outputs of the address distributor are connected to the corresponding second inputs of the second memory block, the outputs of which are connected to the corresponding using the following indicators, integrator blocks, second discriminators, OR elements and inverter blocks are entered at the receiving side, receiver outputs are connected to the corresponding inputs of the address distributor through integrator blocks, and through the second discriminators to the inputs of the second OR element, whose output is connected to the control inputs of the block memory, the outputs of the first discriminators through a block of inverters connected to the inputs of the third element OR, the output of which is connected to the second input of the first element OR.

FIG. 1 shows the control tower; in fig. 2 - scheme of the controlled item.

The telemechanics device at the control room contains a pulse generator 1, a coding unit 2, a 3 address distributor, 4i-4ter keys, a first block of 5 AND elements, a second block of 6 AND elements, an OR 7 element, a controlled frequency divider 8, a first memory block 9, indicators lOj — 10–2, second block llj — I32 of memory, indicators 12i and 12g, driver 13 strobe-pulse signals, transmitter 14, first 15 and second 16 lines of communication, receiver 17, unit 18 of integrators. At the controlled point, the device contains a receiver 19, integrator blocks 20i-202, address distributor 21-21S2, first discriminators 22-22z2, memory block 23 (elements 23j-23s), And elements, TC 25i-25ja sensor contacts, inverter block 26 , element 27 OR, element 28 OR, transmitter 29, second discriminators, element 31 OR.

The device works as follows.

The clock of the coding unit 2 on the PD coming from the pulse generator 1 converts, for example, into a 32-bit cyclic sequence of combination elements consisting of symbols "O and" 1, where by "O and" 1 can be understood different levels of voltages.

To these code combinations react the cells of the distributors, and 21, -21з2 addresses to the PD and KP, which are sequential machines (finite automata).

Suppose that all keys are disabled, controls, all objects on the control panel are also disabled. In this case, the outputs of blocks 5 and 6, the output of the element OR 7 and the control input of block 8 will be zero signals, i.e. the period extension command is not received and the coding unit 2 forms a cyclic code sequence without extending the letters (ticks) of the code combinations.

In this case, the state of the memory elements in block 9 and the state of the indicators 10 -lOja display the status of the tele-alarm sensors at the monitored point, and all the elements 1 IJL - the memory of the PZE and the indicators 12 - 12jg are turned off, which is determined by signals coming from KP, from the cells of the distributor of addresses of the objects and the circuit, the formation of gating pulses of the 13th control room.

Cyclic code sequence, for example in the following form 00-10-11 - 10-11 - 10-00-10-00-10-11-01 - -11 -10-11-01-00-01 -11-Ois 00- 10-00-01 - 11 - 10-00-01-00-01, through the transmitter 14 through the addressable fault enters the gearbox, and from it, via the reverse information bus 16, the receiver 17 receives the response signals, which are processed by the block 18 of integrators. Pr my

0, the inverse value of the received signals is supplied from the integral reception unit 18 to the blocks 9 and 11-11152 of the memory elements.

At the controlled point, the code sequence signals arrive at

5, receiver 19, and then processed by integrator units 20 and 202, which eliminate distortion of the signal by interference in the link. Further, these signals are sent to the cells of the distributor 21. addresses of objects, each of which reacts to

0 corresponding to her code combination. Zatom.m signals from the cells of the distributor of the address of the objects are sent to the discriminators 22); - 22з2 duration, the outputs of which will not change the signals from "1 to" O, because the control keys on the PD are disabled and, therefore, there are no extended clock cycles . At the same time, signals from the distributor jj are fed to the elements AND, to the other inputs of which are connected the outputs of the discriminators 22-22j2. At the 25x-25sg sensors of the state of the objects, the signals come from the outputs of the elements 24-24zg. In addition, the discriminator outputs of the signal duration are fed through a block of 26 inverters to the inputs of the first element.

 OR 27. Suppose sensor 25 is closed. In this case, the signal from the cell of the address distributor 21 through the element OR 28, the transmitter 29 enters the information layer of the communication line 16 and further to

Q. pod.mnnik 17 control tower. The received information signal is processed by the integral reception unit 18 of the control room and is fed to the memory unit 9. On the first memory element of this block, the received signal coincides with the signal

5 arriving from the cell 3 distributors of addresses of objects and with a gating pulse “Strobe 1 with a generator of 13 gating pulses. As a result, the first memory element of the block 9 changes to the on state, and on the indicator lOi, the closed state of the sensor 25i is highlighted. This information is not recorded in the memory element llj, since the gate signal impulse "Gate 2, necessary for recording information into the block llj.-Pzg memory elements, does not arrive from the gate generation circuit 13, in the absence of a command to extend the first clock pulse. Similarly, signals are transmitted that characterize the state and other sensors 25d-25jj of the controlled point. Suppose that all sensors 25j-2632 of the controlled point are open, and the control key 4 is closed on the PD to turn on the first object. When the signals from the key 4 and the distributor cell 3 ± coincide, the command / control through the block of elements AND 5, the element OR 7 is fed to the block 8 of the controlled frequency dividers. As a result, at the output of coding unit 2, the signal corresponding to the clock position of the first register element 3j is extended for a specified time, and at the outputs of the cells 3i and 21j of the PD and KP distributors, the signal "1" will be present during this extended time. Therefore, in the first half of the holding time of the elongated signal at the output of the address cell 21, it passes through the AND 24 element to the sensor 25i, since during this time the output of the discriminator 22 of duration continues to retain the signal "1. After the discriminator 22 triggers, the signal "O" appears at its output, as a result of which, at the output of the AND 241 signal, the signal "1 is removed, but simultaneously through the first inverter of the block 26, the first and second elements OR 27 and 28, the signal" O from the discriminator 22i enters the transmitter 29 and further along the communication line 16 - to the receiver 17 of the control tower. Finally, from the integral reception unit 18, it arrives at the memory element 11, where, coinciding with the signal of the address-cell 3 and the strobe pulse, Gate 2 of the driver of the strobe pulse 13 is memorized. Thus, during one extended cycle of the cyclic code sequence, the state of the remote signaling sensor 25i was monitored, information was sent to the control unit to disconnect the first control object, and the control unit received information that the control unit received the command to turn on the first object, although the object itself has not yet been produced, but only a zero signal from the discriminator 22i is prepared for switching on the memory element 23. Next, the signal from the memory element llj to the PD is fed to the block of elements AND 6, where, adding the output signal of the next cell of the register, to the addresses of the objects, passes to the element OR 7 and the block 8 of controlled frequency dividers, thereby extending the subsequent cycle cyclical code sequence. As a result, at the output of the address cell 2C of the address allocator of objects on the CP, the signal will also be elongated, as a result of which the signal from the discriminator 222 turns on the memory element 23j of the first controlled object and its output element. Similarly, during the first half of the duration of the second cycle, the state of the sensor 24g will be monitored, and during the second half of the cycle duration, the first and second elements OR 27 and 28 will be transmitted to the PD after the second inverter that the control panel has received and finally gave the command to enable the first object. The last information on the PD goes to the memory element 11c and then to the indicator 12, indicating the final and correct passage of the command to turn on the first object. Regardless of this, the state sensor of the first control object can be connected to the output of one of the elements AND 24i-24ji, which will provide additional monitoring of its state. The described passage of control commands and information about their reception at the control station is a crucial feedback that provides a significant increase in the reliability of the transmitted information. To disable the first object, you need to close the key 4j, control. The signal from the key 42 will go to the block of elements AND 5 and, if it coincides with the signal from the address cell 3, through the element OR 7, to the block 8 of the controlled frequency dividers. At the same time, the period of the third code combination and the signals at the outputs of the address cells of the CI and 21J at the DP and the DC are lengthened. From the output of the cell 21z, the signal will pass through the element OR 24z to the sensor 25, and to the discriminator 22 duration. When a discriminator 22z of duration is triggered, a signal from its output will prohibit the passage of a signal from cell 21 to sensor 25 and, having entered memory element 23j, will prepare it for reset. Also, this signal through the third inverter of inverter block 26, element OR 27 and 28, transmitter 29, information bus 16, receiver 17, block 18 of integrators will go to blocks 9 and llj - Ilj2 of memory elements. At the moment when the strobe pulse pulses 13 arrive in the driver, Gate 2 will be prepared for resetting the memory elements 11d -1C, and the Memory element will go to the on state, from its output, the signal "1 coincides in block 5 with the signal from the cell Z. The signal from block b through the element OR 7 will go to block 8, as a result of which the period of the fourth cycle of the cyclic sequence and the signal holding time at the outputs of the address cells 34 and 2U will be extended. The signal from the cell 21-1 through the element And 24 will go to the sensor 25 and the discriminator 224 duration. When the discriminator 24 is activated, the duration is Vits "O signal at the output of the memory element 23 and the actuator of the first controlled object is turned off. At the same time, the signal from the output of the discriminator 22-i of duration will prohibit the passage of the signal from the address cell 2U to the sensor 25 and through the corresponding inverter of the inverter unit 26, the elements OR 27 and 28, the transmitter 29, the information bus 16, the receiver 17, the integrator unit 18 will go to the blocks 9 and memory elements. At the moment when the pulse "Strobe 2" arrives, it is stored in the lU element of the memory and is displayed on the 12g indicator, indicating that the command "Disable the first object" is received on the control panel. At the same time, a reset will occur in the “About elements P and llj of memory.

Further, as shown in FIG. 2, the signal from the blocks 20i and 20 g of integrators in the circuit KP

served on the second group of discriminators 30i-30 duration, the setting for triggering which is chosen longer than the very length of the signals "O and" L in command-address lines 15 of the communication line. At the outputs of these discriminators during normal operation of the devices, the signals “O. If a break occurs or. shorting of busbars 15, one or both signals of the code sequence become identically equal to "1 or" O, which after a certain time will result in at least one of the outputs of the discriminators 30i-30 of the signal "b. The latter, through the element OR 3, will reset into "About all elements 23i-23g of memory and the protective disconnection of all control objects.

Blocks 18, 20i and 20g. The integrators are digital integrating units that measure the probability that a received signal exceeds a predetermined level line for a predetermined time when receiving a "b" signal or the likelihood that the received "O signal is less than a predetermined level during the same period of time. Thus, short-term suppression of signals and their short-term false events are eliminated and do not affect the correct functioning of the device.

Claims (1)

A TELEMECHANICAL SYSTEM containing a pulse generator at the control room, the output of which is connected to the first input of a controlled frequency divider, the output of which is connected to the input of the encoding unit, the outputs of the encoding unit through the transmitter are connected to the first communication line, control keys whose outputs are connected to the first inputs of the first unit And elements, an address distributor whose inputs are connected to the corresponding outputs of the coding block, the outputs of the register are connected to the corresponding first inputs of the first block of and with the second inputs of the first block of AND elements, the outputs of the first memory block are connected to the corresponding indicators, the second communication line is connected to the input of the receiver, at each controlled point the first communication line is connected to the input of the receiver, the outputs of the address distributor are connected to the corresponding first inputs of the first discriminators and AND elements, the outputs of which are connected through the sensor contacts to the first input of the first OR element, the outputs of the first discriminators are connected to the corresponding inputs of the memory unit and to with the inputs of AND elements, the output of the first OR element through the transmitter is connected to a second communication line, characterized in that, in order to increase the reliability of signal transmission, an integrator unit, a second block of AND elements, an OR element, a strobe generator are inserted into the device at the control room and a second memory block, the output of the receiver is connected to the input of the integrator block, the outputs of which are connected to the corresponding second inputs of the first and second memory blocks, the outputs of the first and second blocks of elements And are connected to the inputs OR element, the output of which is connected to the second input of the controlled frequency divider and to the first input of the strobe generator, the second input of which is connected to the output of the pulse generator, the third input is connected to the output of the controlled frequency divider, the first output of the strobe generator is connected to the first inputs of the second memory block , the second output of the strobe generator is connected to the third input of the first memory block, the outputs of the address allocator are connected to the corresponding second inputs of the second memory block, the output which are connected to the corresponding indicators, integrator blocks, second discriminators, OR elements and an inverter block are introduced on the receiving side, receiver outputs are connected to the corresponding inputs of the address distributor through integrator blocks, and to the inputs of the second OR element, the output of which is connected to the controllers through the second discriminators the inputs of the memory block, the outputs of the first discriminators through the block of inverters are connected to the inputs of the third OR element, the output of which is connected to the second input of the first OR element . >