SU1129632A1 - Device for executing sine-cosine digital-to-analog conversion - Google Patents

Abstract

DEVICE FOR SINUS-COSINUS DIGITAL-ANALOG CONVERSION containing the source of the reference voltage, the input code register, the first and second multiplying transducers code - current, the first outputs of which are connected to the inverting inputs of the first and second operating amplifiers, respectively; contacts of the first and second quadrant switches, the control inputs of which are connected to the outputs of the two higher bits of the input code register, the third operational amplifier, in The certifying input is connected through the first scaling resistor with the closing contact of the first quadrant switch and through the second scaling resistor with the output of the third operational amplifier, the fourth operational amplifier, the inverting input of which through the third scaling resistor is connected to the break contact of the second quadrant switch and through the fourth scaling resistor - with the output of the fourth operational amplifier, the first control register. The first and second information inputs of which are connected respectively to the direct and inverse corresponding bit outputs of the input code register, and the output group of the first control register is connected to the code input group of the first code-multiplying converter - current, while the outputs of the third and fourth operational amplifiers are outputs devices, and between the inverting inputs and outputs of the first and second operational amplifiers are included, respectively, fifth § and sixth scaling resistors, different Confirmed by the fact that (for the purpose of improving accuracy by reducing hardware errors, the device contains a second control register, the third and fourth quadrant switches, the fifth operational amplifier, the seventh, eighth, ninth, tenth, eleventh, two hundredth, and thirteen scaling resistors, with the output voltage source and the output of the first ND operational amplifier, respectively, through the seventh and eighth scaling resistors connected to the analog input of the second multiplier photoelectret code - current, the second output of which is connected to the inverting input of said fifth operational amplifier whose output is connected to the analog input of the first multiplying converter code - current, with a switching contact of the third quadrant of the switch and through ninth scaling resistor - with its invertiruk CIM entrance and exit

Description

the first operational amplifier is connected to the switching, contact of the fourth quadrant switch; the switch is connected to the closing contact of the first quadrant switch, the closing the contact of the third quadrant switch through the twelfth scaling resistor is connected to the non-inverting input of the third operational amplifier connected via the thirteenth scaling to the zero potential bus 29632

The second output of the first multiplier converter is code - the current is connected to the zero potential bus, the first and second information inputs of the second control register are connected respectively to the second and first inputs of the first control register, and the first and second control inputs are rewritten from the first and second control registers In my memory and inverse outputs of the second most significant bit of the register of the input code, the group of outputs of the second control register is connected to the group of code inputs of the second multiplying transform ate code-current control inputs of the third and fourth square CHANGE ents are respectively connected with the control inputs of the first and votoroy square switches,

The invention relates to computing and can be used to convert discrete information into the rotation angle of a SCRT printer and to simultaneously convert a binary code into a sine and cosine voltage. A device containing a digital-to-analog converter code is a current connected to the inputs of two operational amplifiers that converts a binary code into two function voltages. the ratio of which, realized on the SCWT receiver, ensures the formation of a tangent dependence for a given approximate formula ij. The construction of the converter for the full range of the O-3B0 angle is achieved by the introduction of a third amplifier and 12 relays, ensuring the formation of functional voltages in a predetermined phase and the required scale. However, it is not possible to simultaneously form sine and cosine functions without complex structural adjustment, which does not allow for expanding the field of application of the device. The closest in technical essence to the present invention is a device for sine-sinus digital-analog conversion, containing a voltage source connected to the first inputs of two adders, the outputs of which, through appropriate multiplication code-current converters are connected to the inputs of the first and second operational amplifiers, outputs each connected to the inputs of two adders and through the corresponding quadrant switch to the inputs of two output operational amplifiers, while the buses input code is connected to a code input of the first multiplying converter code - current, via a first register control, performing the function code inverter, a code input of the second multiplying converter code - current and the control inputs of the switches are connected to two older bits of the input code 2J tire.

3

The disadvantage of this device lies in the presence of significant conversion errors, caused both by the approximate dependence, underlying the operation of the device, and instrumental error due to the large number of active elements.

The aim of the invention is to improve accuracy by reducing hardware errors.

The goal is achieved by the device for sine-cosine digital-to-analog conversion, containing the reference voltage source, input code register, first and second code-multiplying converters - current, the first outputs of which are connected to the inverting inputs of the first and second operational amplifiers, whose outputs connected to the switching contacts of the first and second quadrant switches, the control of which inputs are connected to the outputs of the two higher bits of the input code register the third opera A power amplifier whose inverting input is connected through a first scaling resistor with a closing contact of the first quadrant switch and through a second scaling resistor to the output of a third operational amplifier, a fourth operational amplifier, the inverting input of which through a third scaling resistor is connected to the break contact of the second quadrant switch, and the fourth scaling resistor — with the output; the fourth operational amplifier; the first control register, the first and The second information inputs of which are connected respectively to the direct and inverse corresponding bit outputs of the input code register, and the group of outputs of the first control register is connected to the code inputs of the first code-multiplying converter - current, while the outputs of the third and fourth operational amplifiers are device outputs , and between the inverting inputs and outputs of the first and second operational amplifiers are included, respectively, the fifth and sixth

96324

scaling resistors, contains the second control register, the third and fourth quadrant switches, the fifth operational amplifier, the five scaling resistors from the seventh to the thirteenth, while the output of the reference voltage source and the output of the first operational amplifier, respectively, through the seventh and eighth

0 scaling resistors are connected to the analog input of the second multiplying converter code — current, the second output of which is connected to the inverting input of the fifth operational amplifier, the output of which is connected to the analog input of the first multiplying converter code — current, to the switching contact of the third quadrant switch and through

Q ninth scaling resistor with its inverting input, the output of the first operational amplifier is connected to the switching contact of the fourth quadrant switch, the break contact of which is connected to the closing contact of the second quadrant switch and through the tenth scaling resistor with a non-inverting input of the fourth operational amplifier connected through the eleventh scaling resistor with potential-free bus, - the opening contact of the third quadrant switch is connected closing the switch contact of the first quadrant, quadrant zamykayutschy kontakttretego through twelfth switch connected to a scaling resistor neinvertirukntsim input of the third operational amplifier, connected via a thirteenth resistor scaling with zero potential bus, the second output of the first multiplication-body transformation code - connected current

with zero potential bus, first

and the second information inputs of the second control register are connected respectively to the second and first inputs of the first control register, and

the first and second control inputs overwrite the first and BTopoio control registers are connected to the forward and inverse outputs of the second most significant bit of the input code register,

the group of outputs of the second control register is connected to the group of code inputs of the second multiplying converter code — foK; the control 51 inputs of the third and fourth quadrant switches are connected respectively to the control inputs of the first and second quadrant switches. Diagram of the device shown in the drawing. The device contains a source of reference voltage 1, multiplying converters 2 and 3 code-current, operational amplifiers 4-8, input code register 9, control register 10 and P quadrant switches 12-15, scaling resistors 16-2. Multiplying converters 2 and 3 contain resistors 29 and 30, - 30 ,, forming matrices R - 2R, and the bit switches 31c, 32, On resistors R - 2R 29 in a scale determined by resistors 16 and 17, the voltage of source 1 and amplifier 6 are summed. The current output of the converter 2, corresponding to the zero initial state of the bits, is connected to the operational amplifier 4 with a large-scale feedback resistor: coupling 19, equal to K. K. 2.084762. The current output corresponding to the unit state of the bits is connected to an amplifier with a feedback resistor 18, equal, m, where K4 is 2.084762. The current output of converter 3, corresponding to a single (initial) value of the bits of the control code connected to the input of amplifier 6 with feedback resistor 21, is Kg ... K, where K is 0.550178. The current output corresponding to the zero state of inverter 3 bits is connected to the zero potential bus. The input code register 9, built, for example, on D-triggers with direct and inverse outputs, stores an input binary code, in which O, E, B, b are the forward and inverse values of the two most significant bits, and 0 is the angle code, changed from 0 to 1, which corresponds to the change within the quadrant. Control registers 10 and AND, executed, for example, on the AND-OR chips, have information inputs for two codes A and 6 and control inputs kg and Kt. When single control signals are applied to inputs Kg or K to outputs of registers 10 and 11 26, codes from input circuits A or B are transmitted to control the switching of bit switches 31 and 32, and the sine and cosine functions that are generated in accordance with the dependencies mi n9 (4). IT 61P-9 (1-0) 1-tb (L0) 2 „-Q ne (l-Q) 1-mS (1-e), 9l1-Q) 2 where n 0.550178; m 0.403341; O 9 1. The value 0 is proportional to the change in the argument of the function in the range O-90. The methodical error in reproducing the sine-cosine functions is ± 0.25%, and the tangent function is 0.1%. The device works as follows. The voltage U from the voltage source 1, supplied through the scaling resistor 16, and the voltage U, fed through the scaling resistor 17, are added to the converter 2. Since the resistor 16 is K, R, where Kj is 0.351652 ,, resistor 17 equal to KR, where K2 is 0.479671, and the input resistance of the divider R - 2R is equal to R, then the total voltage U is equal to: Ra .. 8, R 2 ", R + R2R RiR2, U. ° .4.2 K, t :, .K, K2, depending on the value of code 9, the values of the input currents of amplifiers 4 and 5 proportionally change from 0 to 9 and from (l - 6) to O and their output voltages are: U -UgkjU-Q), 05 . At the output of the amplifier 6, the voltage is generated - - UT MlvMTMl When Ug is inserted into the expressions for and and and 5, we obtain, after simplifications: fcjlC3 (-e) ° U,) - if, ("- e) (if, + V2tK, ki) -k, ic if5eu-9) The voltages U. and Uy represent the terms of the dependencies of Y. Summing the values of U and U and Uj- and Ug, taking into account the signs, is carried out on amplifiers 7 and 8. If, in the incoming code, the values are two hundred Our bits 9, b are zero, then the switches 12 and 13, controlled by bit a, as well as) 4 and 15, controlled by bit b, are located in. position shown in the drawing. The output of the amplifier 8 is blue on a function in the O-36 angle range, and the output of the amplifier 7 is a skew function. The remaining bits of code 6, coming from register 328 to control registers 10, are controlled as follows. The inputs k and 0 of the registers I and are received, respectively, direct (| 9 and inverse to the code values. Without the two higher bits. In this case, the input values of the register. 11 and input To the register 12 receive the direct values of 6 codes, and to the input b Register 1-1 and input A of register 12 receive inverse values in the code. The inputs, controls K of registers I and 12 receive inverse b, and the control inputs Cc have direct b discharge values. The technical effect of using the invention is determined by small annaparypiotmi errors at insignificant instrumental costs and errors their functionality of the device.

Claims (1)

DEVICE FOR SINUS-COSINUS DIGITAL-ANALOGUE CONVERSION, containing a reference voltage source, input code register, first and second code-current multiplying converters, the first outputs of which are connected to the inverting inputs of the first and second operational amplifiers, the outputs of which are connected to the switching contacts of the first the second quadrant switches, the control inputs of which are connected to the outputs of the two upper bits of the input code register, the third operational amplifier, invert the input of which is connected through the first scaling resistor to the closing contact of the first quadrant switch and through the second scaling resistor to the output of the third operational amplifier, the fourth operational amplifier, the inverting input of which through the third scaling resistor is connected to the disconnecting contact of the second quadrant switch and through the fourth scaling resistor -, with the output of the fourth operational amplifier, the first control register, the first and second information inputs of which They are connected respectively to the direct and inverse corresponding bit outputs of the input code register, and the group of outputs of the first control register is connected to the group of code inputs of the first code-current multiplier converter, while the outputs of the third and fourth operational amplifiers are the device outputs, and between the inverting inputs and the outputs of the first and second operational amplifiers include the fifth and sixth scaling resistors, respectively, characterized in that, in order to increase accuracy due to It reduces hardware errors, the device contains a second control register, a third and fourth quadrant switches, a fifth operational amplifier, a seventh, eighth, ninth, tenth, eleventh, twelfth and thirteenth scaling resistors, while the output of the reference voltage source and the output of the first operational amplifier respectively, through the seventh and eighth scaling resistors, ns are connected to the analog input of the second code-multiplying converter, the current, the second output of which is connected to the inverter the input of the fifth operational amplifier, the output of which is connected to the analog input of the first code-to-current converter, with the switching contact of the third quadrant switch and, through the ninth scaling resistor, with its inverting input, the output 1 129632 of the first operational amplifier is connected to the switching contact of the fourth quadrant switch, the NC contact of which is connected to the making contact of the second quadrant switch and through the tenth scaling resistor to the non-inverting input of the fourth operational amplifier connected via the eleventh scaling resistor to the zero potential bus, the breaking contact of the third a quadrant switch connected to a make contact of the first quadrant switch, make. the contact of the third quadrant switch through the twelfth scaling resistor is connected to the non-inverting input of the third operational amplifier, connected through the thirteenth scaling resistor to the zero potential bus, the second output of the first code-multiplying converter is connected to the zero potential bus, the first and second information inputs of the second control register are connected respectively, with the second and first inputs of the first control register, and the first and second inputs of the control overwrite the first and the second control registers are connected to the direct and inverse outputs of the second high-order bit of the input code register, the group of outputs of the second control register is connected to the group of code inputs of the second code-to-multiplier converter, the control inputs of the third and fourth square switches are connected to the control of the second and second switches . according to the inputs of perquad