SU1124247A1 - Cyclic process automatic control system - Google Patents

Abstract

AUTOMATIC CONTROL SYSTEM OF CYCLIC PRODESSES, containing a series error meter, amplifier, filter, adder and actuator connected by an output to the input of the control object, the output of which is connected to the signal input of the feedback sensor, the first input of the error meter is connected to the output of the reverse sensor connection, the second input of the adder is connected to the output of the memory unit, the output of the adder is connected to the first input of the memory unit, the second input of which is connected to The output of the timer device and the input of the software device connected to the second input of the error meter, characterized in that, in order to improve the performance of the equipment, a clock counter, a serially connected correction block, a reversible counter and a nonlinear block, are introduced into it, the output connected to the timer input the device, the first input of the correction unit is connected to the output of the error meter, the second input is connected to the second input of the casting unit and to the output of the cycle counter, the input of which connected to the output of the timer Devices.

Description

The invention relates to automatic control and regulation systems and can be used to control processes with the cyclical nature of a program being executed. A system of automatic control is known, comprising a setpoint adjuster and a real value sensor of the adjustable parameter, a comparator, a filter, an amplifier and an object to be controlled lj. A disadvantage of the known system is the low control accuracy, which is due to the inertia of the tracking system and the limited gain of its gain. Closest to the present invention is an automatic control system comprising an error meter, the output of which through an amplifier is connected to the input of a smoothing filter, an object of regulation, the input of which is connected to the output of the actuator, a feedback sensor associated with the object of adjustment and an input of the error meter. the device to the output of which the input of the error meter is connected, the adder, the inputs connected to the outputs of the filter and the memory block, and the output to the input The dam of the memory block and the actuator, and the timer device, the outputs associated with the control input of the memory block. At the same time, the memory block is two two-position switches and two recording / reproducing blocks of information 2j. However, the known automatic control system does not allow the use of reducing the control error after several cycles of the program to reduce the cycle time and increase the productivity of the equipment controlled and regulated by the known system. The purpose of the invention is to increase the productivity of equipment. This goal is achieved by the fact that the automatic cyclic process control system, which contains the following error meter, amplifier, filter, adder and executive device connected to the input of the control object, which is connected to the feedback sensor input, the first input of the error meter is connected to the output of the feedback sensor, the second input of the adder is connected to the output of the memory unit, the output of the adder is connected to the first input of the memory unit, W The swarm input of which is connected to the output of the timer device and the input of the software device, the output connected to the second input of the error meter, a clock counter, connected in series to the correction unit, reversible counter and nonlinear unit, output connected to the timer device input, the first input of the correction unit connected to the output the error meter, the second input - with the second input of the nonlinear block and with the output of the clock counter, the input of which is connected to the output of the timer device. The proposed system differs from that in that after the self-tuning, the maximum in the cycle error value f.-Ct) does not exceed the threshold value B, the timer device enters the time code corresponding to the shorter cycle time. Decreasing the cycle time leads to an increase in the control errors, however, the new value of the cycle time should be chosen so that the new value of the maximum error in the cycle does not exceed the maximum permissible value in the control error. Thus, when the stated requirements for control accuracy are met, the cycle time is reduced, which leads to an increase in productivity. In the proposed system, in each new cycle of work, in addition to the information in the current deviation of the adjustable coordinate from the required value, information is also used on the control process on the previous cycle, which reduces the dynamic range of the output signals removed from the error meter, which leads to an increase in cycle capacity from cycle to cycle. Ultimately, after processing by the system q cycles, the regulation error becomes less than the specified one. When this situation is reached, the time code, which is less than the code with which the previous n cycles have been worked out by the system, is entered in the timerp. A decrease in the cycle duration entails a change in the speed of the program, thereby causing a change in the dynamic characteristics of the control object. The principle of operation of the system remains the same - in the order of a new cycle, the control signal contains two components: one is determined by the signal of the current deviation of the second coordinate, the control signal developed in the previous cycle. The development of the next t cycles is performed until the maximum error value in the cycle becomes less than B, after which the time code assigning the cycle time is reduced again, and the adjustment process continues in accordance with the foregoing. Suppose that in a series of n cycles the duration of each cycle is equal to Tn and in each cycle, the E values of the control actions are stored and entered into the control system. Then the frequency of issuing control actions in this series is 9.6 T. After the cycles have been tested, the time code Tj arrives at the timer Tj (T, where Kvj is the coefficient taking into account the reduction of the cycle duration. The frequency of the volume and information is equal to. - (w, m, t, respectively, of the information retrieval frequencies and the issuance of an additional control action for series of h and m cycles; E is the threshold error value; E is the maximum permissible error value in the control system. Thus, in order to compress (i.e., read speed and step) information and decrease the cycle duration, In the control process, it is necessary to take into account (1) what is carried out by a nonlinear block. Fig. 1 shows a structural diagram of the proposed automatic control system; Fig. 2 is a block diagram of a correction unit (1) (option); Fig. 3 - block diagram of the memory block. The system contains an error meter 1, amplifier 2, fig 3, adder 4, actuator 5, control object 6, feedback sensor 7, memory block 8, timer device 1C, counter 11 cycles , block 12 correction, reversible counter 13 and nonlinear block 14.: Correction block 12 (FIG. 2) contains a delay line 15, a threshold value setpoint adjuster 16, a comparison block 17, a trigger 18 and an AND 19 logic element. The memory block 8 consists of a digital-to-analog converter 20, a register block 21, an analog-digital converter 22, a delay line assembly 23, moreover, in block 21 there is a (E + l) register, and in assembly 23 - (B-1) delay lines. Block 8 operates according to the FIFO memory principle: the first signal, which is recorded in the memory block, is first output to the control system. Nonlinear unit 14 is constructed on the basis of memory points, a divider and a multiplier. The system works as follows. The work cycle consists of E cycles of equal D-time. In block 8 of the memory, information is recorded on the magnitude of the control action, formed in the previous cycle. After time t T (where TU; is the duration of the k-th cycle), a control signal 8 comes from the timer device 9; as a result, from the output of block 8, the second input of the accumulator 4 receives a control signal for the cycle number, per unit less than the current one and recorded in block 8, in advance, there is a cycle. The first input of the adder 4 from the meter 1-mismatch through the amplifier 2 and the filter 3 is given a signal proportional to the difference between the required value of the controlled quantity required from the software device according to the control signal generated by the timer device 9 and the actual coming from the sensor 7 feedback. The control signal obtained in this way, taken from the output of the adder 4, is recorded in the memory block 8 and simultaneously supplied to the executive device 5 connected to the control object 6, putting it into the state corresponding to the specified one. Software device; 10 may represent a memory of memory connected in series by a timer device. The 11 clock counter is used to determine the situation that responds to the loop: by this sign, the counter 11 receives a signal, including a correction block 12 and a nonlinear block 14. In a correction block 12, the maximum error in the cycle SuC-t is estimated with a threshold value of I If () 1, the correction unit generates a time code correction signal, which arrives at the reversible counter 13, where the cycle duration code is formed, which is less than the previous cycle duration code that was recorded in counter 13 (according to rule T ,, This code is sent to The input of the nonlinear unit 14, where, in accordance with formula (1), a control signal is generated by a timer device 9, thereby taking into account the requirement for a change in the firing frequency of control actions in the system associated with a change in the duration of the cycle. The output of the timer device 9 is connected to the input clock counter. When the counter overflows, a signal is produced, connecting block 14, causing it to generate a control signal with a tamer device 9. When counter 11 is overflow, it signals the end of the cycle, and generates Signal on the connection unit 12 correction. Since the control program in time from cycle to cycle strictly repeats, reducing the cycle time leads to an increase in the speed of task processing, and this leads to a situation | 6m (t), which is evaluated by the correction unit 12, the control part of which is turned on by counter 11 end of each cycle. The new code of the cycle duration is saved until the maximum error in the previous cycle becomes less than the threshold value, after which a new duration code is assigned to the next cycle and the process continues as described above. Correction unit 12 works as follows. 7 From the output of the error meter 1, during the cycle, 6 error values are fed to one of the inputs of the comparator unit 17, to the other input of which the signal proportional signal is supplied from the unit 16 of the threshold error value. If | (-fc), then a signal is cut out in the comparator, otherwise the signal is not generated. Let the second case take place. Then, the trigger 18 is closed, therefore the logical element AND 19 is closed, the correction signal of the cycle time code does not come from the correction unit to the reversible counter 13, and the code remains the same. If there is a situation i &, (i) U from the comparator block 17, a signal is sent to the R input of the trigger 18, which transfers it to state 1. This signal 1 is fed to the first input of the logic element I 19, to the second input of which after the cycle 1 is sent from counter 11. In accordance with the principle of operation of the logic element I 19, a control signal of a reversible counter 13 appears at its output, forcing the latter to change the loop multiplier code (i.e., counter 13 is triggered by signal 1). Through line 15 of the delay, the signal from the counter of 11 clocks arrives at the S input of the trigger t8, and closes it. This channel is required to prepare the trigger for operation in the next cycle. Block 8 works as follows. In the first cycle, the value of the generated control actions is written to the registers of block 21 from the ADC 22. According to the signal received from the timer device 9, the information recorded in block 21 of the registers is shifted to the left and output to the DAC 20 in the first cycle of the second cycle of a control action received in the first cycle of the first cycle. Thereafter, a signal is received from the delay line of the assembly 23, which enables the recording from the A / D converter 22 of the corrected control signal of the first cycle of the second cycle to the (-5-1) th register. With the end of each cycle in the cycle, the process of shifting to the left the recorded output information through the DAC 20 to the system of the corresponding additional controls and their recording is carried out. We show that the use of the proposed system as compared with the prototype, which we take as the basic sample, leads to a decrease in the total time of manufacture of the product while maintaining the stated requirements, i.e. to increase the productivity of the equipment. Let the decrease time of the duration of each cycle ut satisfy the requirement. Furthermore, it is obvious that the duration of the cycle is bounded below by the value of t cr. If the cycle time is denoted by t and the product is manufactured in N cycles, then when using the base sample, the product manufacturing time is equal. Consider the process of the product manufacture under the conditions of application of the proposed system. Let L, N cycles be worked out with the duration of each dial i, after which the maximum error in the loop) became less than the threshold value. The cycle time decreases tj t and the system operates hj, N cycles until situation arises 1U4 (b) and. Then the process is repeated until t becomes equal to Oire, after which the cycle time is not reduced and the remaining (N 21 AND;) cycles work with the duration of each cycle txp kp 1 (2) 78 Then the time of manufacture of the product em I-f, TH. |, t; "+ t N-.En,) tKN jU; -tKln / .3 Compare (2) and (3): if 0, then TS-TH wins in production time ; if O, then there is no time winning; : T6-T, i, Ni, H (i; -t,) n, m, -t, K- (vgn / rZ (t; -t,) v ,, - (t, -y (Nn, b |: Ct, -t, n ;. j-2 Obviously, the difference (ij-tK) is O, that is, under the sign of the sum, the largest factor (tj-t) (). We estimate the worst result, i.e. The expression under the sum sign can be represented as niax | trtJn; 5 (tj - t.) (n, in,., ... r ,,. J.. Then Ts-H lt,. ljK4, + njV ... ,) - (tj-tO (.), whence it is seen that in the first expression each of the factors in the expression for Tj is greater than the corresponding factors in the expression for TT, i.e. Tg-Tj, O and the proposed system is compared with the base sample gives a gain in the time of manufacture of products, or at a fixed time - release of a larger number of units of production.

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Claims (1)

AUTOMATIC CYCLE CONTROL SYSTEM, containing a mismatch meter, an amplifier, a filter, an adder and an actuator connected in series to the input of the control object, the output of which is connected to the signal input of the feedback sensor, the first input of the mismatch sensor is connected to the output of the feedback sensor, the second the adder input is connected to the output of the memory unit, the adder output is connected to the first input of the memory unit, the second input of which is connected to the output the timer device and the input of the software device, the output connected to the second input of the mismatch meter, characterized in that, in order to increase the performance of the equipment, a clock counter, series-connected correction block, a reversible counter and a nonlinear block connected to the input of the timer device are introduced into it, the first input of the correction block is connected to the output of the mismatch meter, the second input is connected to the second input of the non-lily block and with the output of the clock counter, the input of which is connected to Exit timer Devices. ^ SU „,, 1124247 9ut.1