SU1101872A1 - Device for compressing information - Google Patents

Abstract

1. COMPRESSION / NLORMATION DEVICE, containing in each of the N information channels a modulator, integrator and memory block., The modulator output is connected to the first M input of the integrator, the output of which is connected to the first input of the memory block, pulse generator, the output of which is connected to the first input of the control unit, the first outputs of the control unit and the second output of the pulse generator are connected respectively to the primary input and the second inputs of the reference signal generator, the outputs of which are connected to the first inputs of the respective modules The inputs of the Instruction Channels, the second inputs of which are combined with the first input of the comparison unit and are the input of the device, the outputs of the memory blocks of the memory channels 1, are connected to the corresponding first inputs of the adder, the register and are the first outputs of the device, the output of the register is connected to the first input of the multiplier the output of which is the second output of the device, the output of the sum 1 / 1ator is connected to the second input of the comparator unit, the output of which is connected to the second input of the control unit, the second and third outputs of the control unit The fourth output of the control unit is connected to the second inputs of the adder and multiplier, the FIFTH output is connected to the second input of the register, the output of the memory block of the first information channel is connected to the third input of the second information channel integrator, different By the fact that, in order to increase the device injectivity, P additional information channels are introduced into it, each of which contains an integrator and a memory block, the output is integrated The rator is connected to the first input of the memory block, the second inputs of the memory block of all additional information channels are combined and connected to the third output of the control unit, the outputs of the memory blocks of the additional information channels are connected to the corresponding third inputs of the matrix, the register and the third outputs the device, the output of the memory block of the second inf), the other channel is connected to the input of the multiplier of the first additional information channel, the outputs of the memory blocks of the information channels with sequence data measures

Description

Rator with the corresponding inputs of the OR element, the output of which is connected to the first inputs of the element through the delay element, and the output of the AND element connected to the input of the pulse former and the first input of the counter, the second inputs of the counter and the AND element

are the first and second inputs of the control unit, respectively; the outputs of the counter, the OR element, the delay element, the pulse generator and the And element are the first, second, third, fourth and fifth outputs of the control unit, respectively.

The invention relates to a measurement technique and can be used in telemetry systems for compressing transmitted information.

A device for compressing information, containing memory blocks integrators, multipliers, a generator, subtractors, comparison blocks, switches and a control unit Cl, is known.

The disadvantage of this device is the low information content, due to the fact that all calculations related to the calculation of spectral components, with an increase in the approximation interval, have to be performed from the beginning.

Closest to the proposed technical entity is a device for compressing information, containing information channels, each of which consists of a modulator, integrator and memory block, output: the modulator is connected to the first input of the integrator, the output of which is connected to the first input of the block memory, pulse generator, the first output of which is connected to the first input of the control unit, the first outputs of the control unit and the second output of the pulse generator are connected respectively to the first and second inputs of the onoptibix generator sip-halov. the outputs of which are connected to the first inputs of the corresponding modulators of information channels, the second inputs of which are combined with the first input of the comparison unit and are the device input, the inputs of the memory channels of the information channels are connected to the corresponding first inputs of the accumulator, the register and are the first outputs of the device, output the register is connected to the first input of the multiplier, the output of which is the second output of the device, the output of the adder is connected to the second input of the comparison unit, the output of which is connected to the second the input of the control unit, the second and third outputs of the control unit are connected to the corresponding second inputs of the integrators. and memory blocks of information channels, the fourth output of the control unit is connected to the second inputs of the adder and multiplier, the fifth output to the second input of the register, the output of the memory block of the first information channel is connected to the third input of the integrator of the second information channel, the output of the memory block of each next i information channel connected to the third inputs of the integrators (2i -1) and 2i information channels 2.

A disadvantage of the known device is that it performs the decomposition of the analyzed signal only in the basis of the Walsh Functions. To obtain the decomposition coefficients in the basis of the Haar functions, an additional device is needed, as well as additional time costs for converting the coefficients of the service to the coefficients of the Haar.

In addition, it is necessary to have a fast-acting adaptive device for compressing information, which makes it possible to obtain expansion coefficients of the Haar directly without additional transformation using the Wal-O coefficients. This will reduce the number of calculations, and therefore, will increase the information content of the device,

The aim of the invention is to increase the information content of the device.

This goal is achieved by the modulator, the integrator and the memory block, the output of the modulator 1 in each of the N information channels in the device for compressing information. connected to the first input of the integrator, the output of which is connected to the first input of the memory unit, a generator and pulses, the first output of which is connected to the first input of the control unit, the first outputs of the control unit and the second output of the pulse generator are respectively connected to the first and second inputs of the generator. reference signals, the outputs of which are connected to the first inputs of the corresponding modulators of information channels, the second inputs of which are combined with the first input of the comparison unit and are the device input, the outputs of the blocks pa Some of the information channels are connected to the corresponding first inputs of the aggregator, the register are the first outputs of the device, the output of the register is connected to the first input of the multiplier, the output of which is. is the second output of the device, the output of the adder is connected to the second input of the comparison unit, the output of which is connected to the second input of the NIL control unit, the second and third outputs of the control unit are connected respectively to the second inputs of the integrators and the information channels memory, the fourth output of the control unit connected to the second inputs of the adder and multiplier, the fifth output to the second input of the register, the output of the memory block of the first information channel, is connected to the third input of the integrator of the second information channel, P additional information channels, each of which contains an integrator and a memory block, the integrator output is connected to the first input of the memory block, the second inputs of the memory blocks of all additional information channels are combined and connected to the third output of the control block, the outputs of the memory blocks additional information channels are connected to the corresponding third inputs of the adder, register and are the third outputs of the device, the output of the memory block of the second information channel is connected to the input of the multiplication of the first additional information channel, the outputs of the memory blocks of the input channels with sequence numbers () (),, 1,2, ..., are connected to the inputs of the corresponding 1111: multipliers of additional information channels with order numbers ,- (),, 1 , 2 ,, .., the outputs of the memory blocks of additional information channels with sequence numbers 2 t),, 1, 2, .., are connected to the inputs of the corresponding intelligent residents of additional and Lormation channels with sequence numbers 2k + -i () ,, 2 ... In addition, the control unit contains a counter, a decoder, an AND element , the OR element, the delay element and the pulse generator, the meter outputs are connected via a decoder to the corresponding inputs of the OR element, the output of which is connected to the first inputs of the AND element, the element output and connected to the Pulser input and the first input of the counter, the second inputs of the counter and the element And are respectively the first / 1 and the second inputs of the control unit, the output of the counter, the element OR. the clamping element, the pulse driver and the And element are the first, second, third, fourth and 1 outputs of the control unit, respectively. Positive effect. The proposed device achieves that by using the Haar system as a basis for decomposition, The new step (increasing the length of the interval I approximation coefficients of decomposition does not re-count, but to use in their calculation already obtained on the pre-; eat interval. Decomposition coefficients in the interval in Changes (0.2 T) can be expressed using the coefficients obtained at inter1; ale (O.T) .When proceeding to the next step of the adaptive approximation, each function in the decomposition basis can be considered as a function with a higher order / a of the coefficients The values obtained in the previous interval are the coefficients of these functions with a higher order, so it remains to calculate the values of the decomposition coefficients corresponding to the Functions determined only in the second half of the approximation interval. This operation is performed using the proposed device, and the calculated values of the coefficients in the interval (OT 1 at the next step of the adaptive approximation are rewritten into memory blocks that correspond to 1 higher order coefficients, and are stored in them. Of the total coefficients at each step of the approximation, it is necessary to calculate only half again. In the proposed device, a fast-acting adaptive compression of the analyzed signal is performed and presented directly in b This is a Haar without intermediate transformations. This allows to reduce the number of calculations and, consequently, the processing time. Figure 1 shows the structural diagram of the proposed device in Figure 2 - the same I control unit; Figure 3 shows the signal plots produced 4 shows an example of voltage plots at the device outputs. The device contains (, Fig. 1) control block 1, pulse generator 2, information channels 3, modulators 4, integrators 5, memory blocks 6, register 7 shift, multiplier 8, analog adder 9, block 10 cf vneny, a multiplier 11, a reference signal generator 12. The control unit (Fig. 2 | contains a counter 13 pulses, decoder 14, element OR 15, delay element 16, element 17, pulse generator 13 (standby multivibrator j. The device works as follows. Starting from time tts, generator 12 reference signals produce special-shaped signals, in modulators 4, the analog signal and reference signals are multiplied. Modulated signals are fed to integrators 5. After the initial decomposition interval TO, which corresponds to the first approximation at time t f. control unit 1 puts the command into memory blocks, according to which voltage values from integrator 5 are copied to 6.pam blocks. In analog adder 9, the command from control unit 1 restores and normalizes the approximated signal at the end the decomposition interval Td at the moment of time t, taking into account the length of the decomposition interval. The values of the reconstructed signal from the analog sump 9 are output to the comparison unit 10, where the measured and reconstructed signals are compared. If the error is measured by the single signal and its reconstructed value at time i: 2 and does not exceed a predetermined value, then a control signal is sent to the control unit 1 from the comparison unit 10, when it sends a command to the second integrator 5 and to those memory blocks 6 These KOTOptjx inputs are connected to multipliers. 11 By this command, the second integrator 5 records the signal, the signal from the first memory block b, and the signals from the outputs of the remaining memory blocks 6 are supplied to the multipliers 11, where their amplitudes are multiplied to a constant coefficient, and then recorded according to vuyug b-que memory blocks, which are connected to the multipliers 11, Old signals in the integrators 5 thus erased. After that, the device continues the analysis of the original signal, but already in the interval corresponding to the time interval tg-t and ocytrse there is a signal processing in the second half of the decomposition interval t, i.e. at the time interval -t - tj. At the end of the interval T., at time t, if the approximation error does not exceed the specified one, the device continues processing further, with the decomposition interval being equal. those. to-t, etc. If, with a duration of the decomposition interval equal to f (if, -tj + i) /, the approximation error exceeds the allowable one, then the comparator unit 10 outputs a signal that the control unit 1 rewrites the coefficients of the integrals from the integration code OB 5 into memory blocks 6 So, and a command to the shift register 7, according to which the values of the coefficients from the memory blocks 6 are rewritten to the shift register 7 and subsequently output to the multiplier 8, the multipliers 8 multiply the coefficients by the normalization factor. taking into account the integration limits of integrators 5, and hence the length of the decomposition interval T, the value of the normalization factor QJ is derived from control unit 1 and depends on the length of the decomposition interval. Thereafter, signals are output to the device outputs. The control unit 1 zeroes the integrators 5, the memory block, and also issues a command to the reference signal generator 12, which generates a new sequence of reference signals (FIG. 35), and the device is ready for analyzing the measurement of its next signal interval t, .- ij,., equal to the initial value of the approximation interval T ,,. When the signal is restored, the duration of the decomposition interval is defined as the distance between the moments of issuing the bursts of the values of the decomposition coefficients. The control unit 1 operates as follows. Pa counter 13 (Fig. 9) uniformly receives pulses from the input of control unit 1. From the output of counter 13, a code of a number indicating the duration of the approximation interval, which is fed to the outputs of control unit 1 and the decoder 14, is removed. the delay element 16, after which pulses are fed to the output of control 1 of control and the element 17. entsial, the pulse from the first input passes to the output AND gate 17 and is supplied to the output control unit 1, the counter 13 is reset to zero and starts a monostable multivibrator 18 which howling bursts outputted from the unit 1 upoavleni. Example; An error is given. Approximation. The original signal (Fig. 4c () is multiplied in the modulators 4 with the reference signals (Fig. 4 l 5} while the voltages at the inputs of the memory blocks 6 have the form shown in Fig. 4 c. The reference signal in the reference signal block is not It is generated because it is not used to calculate the decomposition coefficients. The voltage at the input of the third memory block 6 is removed from the output of the first multiplier 11 and has the form shown in Fig. 4c. The first approximation step is analyzed on the -TO interval located in the mark. tp-i. Restored in the first approximation step of the sig So the initial approximation error is zero. The device proceeds to the analysis of the next approximation interval located in the interval to-t this at time point -t into the current one; the integrator rewrites the initial voltage from the first block 6 The memory value is copied to the third memory block 6 by the voltage value from the second 6 power block multiplied by the factor in the first multiplier 11. Then the original signal (Fig. 4 s () continues to be processed for a time interval ti - t2, etc. The restored signal on each approximation tat is shown in fig.4g. In comparison block 10, the approximation error is monitored and compared with the allowable one. In the third step of the approximation at the moment of time i, the approximation error exceeds the allowable one, therefore, a long increase in the approximation interval is stopped, and the values of the decomposition coefficients are normalized and output to the additional output. The point tj is taken as the beginning of the next interval approximation. The proposed device allows to obtain Haar coefficients directly using adaptive signal compression without intermediate calculation of Walsh coefficients. The number of calculations is reduced by where r is the number of coefficients under consideration. For example, when using the proposed device, the number of addition and subtraction operations is reduced by 10. If the addition operation takes 0.3 X in time, the conversion time is reduced by 300 s.

FIG. one

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Claims (2)

1. DEVICE FOR COMPRESSION OF INFORMATION, containing in each of N information channels modulator, integrator and memory unit., The output of the modulator is connected to the first input of the integrator, the output of which is connected to the first input of the memory unit, a pulse generator, the first, the output of which is ₇ connected to the first input of the control unit, the first outputs of the control unit and the second the output of the pulse generator is connected respectively to the first and second inputs of the reference signal generator, the outputs of which are connected to the first inputs of the respective modulators of information channels, the second inputs of which are combined with The first input of the comparison unit is the input of the device, the outputs of the memory blocks of information channels. They are connected to the corresponding first inputs of the adder, register and are the first outputs of the device, the output of the register is connected to the first input of the multiplier, the output of which is the second output of the device, the output of the adder is connected to the second input comparison unit, the output of which is connected to the second input of the control unit, the second and third outputs of the control unit are connected respectively to the second inputs of integrators and memory units infor mation channels, the fourth output of the control unit is connected to the second inputs of the adder and multiplier, the fifth output is to the second input of the register, the output of the memory block of the first information channel is connected to the third input of the integrator of the second information channel, characterized in that, in order to increase the information content of the device , P additional information channels are introduced into it, each of which contains an integrator and a memory block, the integrator output is connected to the first input of the memory block, the second inputs of the memory blocks of all additional additional information channels are combined and connected to the third output of the control unit, the outputs of the additional information channels memory blocks are connected to the corresponding third inputs of the adder, register and are the third outputs of the device, the output of the second information channel memory block is connected to the input of the multiplier of the first additional information channel, the outputs of the memory blocks information channels with serial numbers (2 ^h + 2) - (2 ^{k + 1} +1), k = 0,1,2 ,. , co, are connected to the inputs of the corresponding multipliers of additional information channels with serial numbers (3-24- (2 ^{k + r} -1 |, k = 0,1,2, ..., the outputs of the memory blocks of additional information channels with serial numbers 2 ^k - (2 ^{k + 1-} l), k = 0,1,2, ..., are connected to the inputs of the corresponding multipliers of additional information channels with serial numbers 2 ^{k + 1} - (3-2 ^k -ll, k = 0,1,2, .... 2. The device according to claim 1, characterized in that the control unit comprises a counter, a descrambler, an AND element, an OR element, a delay element and a pulse shaper, the outputs of the counter are connected through a decryption unit SU “L 101872 1 101872 a radiator with corresponding inputs of an OR element, the output of which through a delay element is connected to the first inputs of the element and, the output of the And element is connected to the input of the pulse shaper and the first input of the counter, the second inputs of the counter and the And element are "respectively the first and second inputs of the control unit, the outputs of the counter, the OR element, the delay element, the pulse shaper and the And element are respectively the first, second, third, fourth and fifth outputs of the control unit.