SU1064438A1 - Digital-analog sine oscillator - Google Patents

Abstract

1. A digital analog busted oscillator that contains a pulse generator, a digital-analog converter. the trigger, the first element I, the second element I, whose inputs are connected to the inputs of the digital-to-analog conversion (Atel, and the output is connected to the first input of the trigger, the second input of which is connected to the output of the first element I, O TL & H that, in order to improve the speed of the device, a reverse shift register was entered into it, the first input of which is connected to the output of the trgger, the second input is connected to the output of the pulse generator, the direct outputs are connected to the inputs of the D / A converter, and the inverse outputs are connected to the inputs of th element I.

Description

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2. Digital-to-Analog Generator) of the oscillating oscillations according to claim 1, of which the Digital-to-Analog Converter contains a group of transistor switches, the bases of which are the inputs of the Digital-Analogue The invention relates to a technology of pulses and is used for control. instrumentation, in particular, in the generators of sinusoidal oscillations of a wide frequency range. The known generator of sinusshdalnyh oscillations, which contains the generator of pulses, the first pulse counter, the first controlled voltage divider of a parallel type with a weight matrix of resistors and keys, the first polarity switch, the And element whose inputs are connected to the counter outputs, the trigger that is connected to the output element is And, the key, whose input is connected to the output of the pulse generator, and the other input is connected to the trigger output, the second pulse counter, the second controlled divide voltage, the second switch Only polarity, in which the input is connected to a parallel | (ro load, the inputs of the connector in series with the input of the first controlled voltage divider, and the control input is connected to the high-voltage output of the second pulse counter, the rest of the output of which is connected to the inputs of the controlled voltage divider 1. The closest to the proposed is a device containing a pulse generator, a D / A converter, the first and second elements AND, TjHirrep and a reversible pulse counter, the first input of which is connected to the output pulse generator, the second input - to the output of the trigger, and the outputs are connected to the inputs of the D / A converter and the inputs of the And elements, the outputs of which are connected to the inputs of the trigger 2J. The disadvantages of the known devices are complexity and low speed. The purpose of the invention is to increase the speed and simplify the device. The goal is achieved by the fact that the Digital-to-Analog generator of sinusoidal oscillations, containing gesh | 9th impulses, an IF-to-analog converter, a trigger, the first element And, the second element And, the inputs of which are connected to the inputs of the digital-analogue converter, the extenters are connected to a common bus, and collectors coej raEH resistors are connected to the device, and a resistor is connected between the device output and the voltage source. gsG converter, and the output is connected to the first input of the trigger, the second input of which is connected to the output of the first, element, a reversing shift register is entered, the first input of which is connected to the output of the trigger, the second input is connected to the output of the NA1-shifts generator, the direct outputs are connected to the digital-analog inputs the converter and inverse outputs to the inputs of the first element I. The analog to analog converter contains a group of transistor switches, the base of which are the inputs of the digital to analog converter, the emitters connected to the ground The bus is connected to it, and the collectors are connected to the output of the device through a resolver, a resistor is connected between the output of the device and the source of the reference voltage. The drawing shows the structural scheme of the proposed device. The digital-to-analog oscillator of oscillations contains the generator of 1 pulses, the reversing register 2 of the spoiler, the first element I 3, the digital-signal converter 4, the key group (7-1) - (7th), the grugeu re-; resistors (8-I) - (8-N), resist 9, second element; Ment 5, trigger 6, trigger output b is connected to the first input of the reversible peractpa 2, BTOv, the rotary input of the reversing register 2 is connected to the output of the generator 1, the direct outputs of the reverse register 2 coeUfmetaa with the key bases (7-l) - (7 -N) and the input of the second element And 5, the output of which is connected to the first input of the trigger 6, the second input of which is connected to the output of the first element And 3, the inputs of which are connected to the inverse outputs of the reversing register 2, key emitters (7-l) - (7 -N) are connected to the busbar, key collectors (7-1) - (7-N) are connected via resistors (8-l) - (8-N) from the output One more device, which is connected through a resistor 9 to a source of voltage. The device works as follows. Consider an example of the implementation of the proposed device for a set number of steps per one per-formed sondetal voltage equal to 32. In this case, the number of bits of the reverse-switching register will be equal to f. i6., ....; /.:.:; -;; For installation, the operation of the proposed device at the moment element 3 is triggered at all direct outputs of the de-reversal {Yugistr 2 will have low potentials, i.e. the potentials tl. This, for this point in time, at the inputs of the keys (7-l) - (7-N) will be the potential of O. Splitting the zleomeite 3 nptiBOwrr to setting trigger 6 to the position which is direct in the first time (Md | Rever (I | VN6 th peiflicTpa 2, a high potential will occur. 1 At 3TON (the reverse register 2 is transferred to the information shift right mode, the closest clock received at the reverse register 2, will transfer it to the state 0000 0000 0000 0000 10000000000000. The second and subsequent dr 16 In the first instance, they will advance the information in the Retr. Syviy Register 2 so that in the first rounds it will be The following codes will appear: 0000 0000 0000 0000, 1000 0000 0000 0000, 1100 0000 0000 “SO, After the 16th cycle is received, all the reversing-register bits of register 2 will be filled with G, so the ment 3 will work after the nefsoro of the cycle is closed, the 6 ep Botafft trigger is driven from the ground 5. At this, the reversing register 2 is transferred to B; the o tHord state of the shift W1f0 | rmafi, and its reverse input (input of the 16th bit) decreases the potential. This is the B | I1veDet to the fact that the subsequent cycles from the 17th to the 32nd inclusively will be sequentially, starting with the 16th register bit 2, about 1 & 1b, and the corresponding outputs of the register bits will be formed following codes: 1111 1111 1111 1110, 1111 1111 1111 1100, MP 1111 1111 1000, 1000000000000000000 and 0000000000000000. The appearance of the last 32nd code will trigger the element 3, which is the end of this cycle. Then the next cycle will occur, and so on. Thus, during one cycle of operation, the reversing register 2 of the shift muzhet 32 different internal states, in which 17 different codes will appear at its outputs (at the outputs of its bits), nifwieM each of the codes during the time of the complete phosl repeat twice, except for the codes 0000 0000 0000 0000 and 1111 lilt 1111 1111, k (sometimes only one piEi3 occur during one single cycle. Accordingly, 17 different states will follow the loop and take the key ( 7-1) - (7-Н) D / A converter 4. At this, output The device will be equipped with 17 different voltage levels. In the proposed device, by changing the codes at the output of the reverse register 2, it always turns on or off only one of the keys. (7-l) - (7-N) the influence of parasitic emissions and oscillatory processes during the transition process, which allows the development of a working frequency range, i.e., increasing the effective response. The advanced device ensures high quality of the formula for each Vdashzone from Hz to 10 MHz.

Claims (2)

1.- A digital-to-analog sine wave generator containing a pulse generator, a digital-to-analog converter, a trigger, a first AND element, a second AND element, whose inputs are connected to the inputs of a digital-to-analog converter, and the output is connected to the first input of the trigger, the second input of which is connected to the output of the first AND element , characterized in that, in order to improve the speed of the device, a reverse shift register is introduced into it, the first input of which is connected to the output of the trigger, the second input is connected to the output of the generator and pulses, direct outputs Con cheny to the inputs of a digital to analog converter, and the inverted output - to the input of the first element I. SU ... 1064438 2. Digital-to-analog generator of sinusoidal oscillations in π. 1, distinguished by the fact that the digital-to-analog converter contains a group of transistor switches, the bases of which are the inputs of the digital-to-analog converter, the emitters are connected to a common bus, and the collectors are connected to the output of the device through resistors, and between the output of the device and the reference voltage source resistor.