SU1062679A2 - Device for interface among digital computer and peripheral units - Google Patents

Abstract

A DEVICE FOR CONNECTING A DIGITAL COMPUTING MACHINE WITH EXTERNAL DEVICES OF ARTS, AUTOMATIC SYSTEM 849190, characterized in that, in order to expand the field of application of the device, two AND elements, an OR element, a priority trigger and a keyboard register of a peripheral device number, are inserted into it, and each element of the peripheral device is inserted. the priority trigger input is connected to the second output of the addressing unit, the third output of the OR element connected to the first input, the output of which is connected to the second priority trigger input, and the second input to the output of the first element. And, the first input connected to the output of the interrupt register, and the second input to the fourth input of the device, the first and second inputs of the second element And are connected respectively to the first output of the mode switch and the output of the addressing unit, and the output through the key register of the peripheral device number to the second output device, trigger output (L priority is connected to the fourth input of the switch

Description

The invention relates to computing technology and can be used in automatic control systems, which include a digital computer (DVM)

According to the main AVT; VB No. 849190, a device for interfacing a digital computer with external devices is known, comprising a communications register, a matching unit, the first inputs and outputs of which are the first input and output devices of the device, the second input and output of the matching unit are connected, respectively with the first code and output of the communications register, the second input and output of which are, respectively, the second input and output of the device, the addressing unit, the input of which is the third input of the device, and the output connected to the third input of the unit Ani, the control word register, the output of which is connected to the second, the output of the device, and the first input is the fourth input of the device, the interrupt register, the encoder and the mode switch, the first and third inputs of which are the fifth, sixth and seventh inputs of the device The first, second, third and fourth outputs of the mode switch connect. The output of the interrupt register is the fourth output of the device; the third output of the matching unit is connected to the first input of the register of interruptions and through the encoder with the second input of the control register words, and the fourth input of the device is connected to the second input of the interrupt register.)

The mode switch contains a pulse generator, four AND elements, a shift register, an exchange direction trigger, whose inputs are the first, second inputs of the switch, a third input of the switch, and an output of the pulse generator through the first AND element connected to the shift register input, the first output of the exchange direction trigger is connected with the first input of the second element And, the second output of the trigger of the direction of the exchange is connected to the first inputs of the third and fourth elements And, the first - the fourth outputs of the shift register connect with the second inputs of the second and fourth elements, respectively, and with the fourth output of the switch fl.

The drawback of the device is its limited scope, since a separate digital computer is required to service one peripheral device:

The aim of the invention is to reduce the range of application of the devices by ensuring the operation of the device on the common line of one of the main stations.

The goal is achieved. the fact that the device has two AND elements, an OR element, a priority trigger and a keyboard register of the peripheral device number, the first input of the priority trigger is connected to the second output of the addressing unit, the third output of the OR element connected to the first input, the output of which is connected to the second trigger input priority, and the second input - with the output of the first element And, the first input connected to the output of the interrupt register, and the second input - to the fourth input of the device, the first and second inputs of the second element And are connected respectively etstvenno to the first switch output modes and output addressing unit, and output via a keyboard peripheral device register numbers - a second output device, a priority flip-flop output being connected to a fourth input of switch rezhimovNa drawing is Flowcharts devices; a.

The device in each of the external devices contains a communications register 1, an addressing unit 2 that can be executed, for example, as a decoder, a control word register 3, a key register 4 of a peripheral number, a switch 5 modes, a negotiation unit 6 interrupt register 7, the encoder 8, the elements And 9 and Yu, the element OR 11 and the trigger 12 priority. The switch 5 modes consists of the first element And 13, the shift register 1 of the second, third and fourth elements And 15 - 17, the trigger 18 of the direction of exchange and the generator 19 of the pulse

Each device I, II, III is connected by tires 20 and 24 to external devices 31 and tires 21 - 2 25 - 30 - to digital computer 32,:

The device works in the system as follows.

Before the operation of the system, each external device is assigned a sequence number, which is dialed in the key register, 4

If it is necessary to communicate with a digital computer 32, which currently performs an independent task or is on the Waiting background program, the external device 31, using one of the buses 24, requests the pre | Through block 6, it issues a signal to the register, each trigger of which is connected to one of the request buses 21 and determines the priority level

this request At the same time, the request signal goes to the inputs of the encoder 8, which forms the address of the interrupt vector; Yao The formed address B; the vector arrives at the inputs of register 3 and is stored in it until it is read from the digital computer 3.2;

The digital computer 32, after receiving the signal from the register, compares the priority level of the program being executed with the level of the interrupt signal. If the signal level is higher, the digital computer interrupts the current nporpaNiMH and sends to the device via bus 27 a signal that allows the address of the interrupt vector to pass. 3b This signal through the elements of AND 9 and OR 11 sets the trigger 12 and on the falling edge resets the register 7 and the register: 3

Thus, the trigger state of the device whose external device has requested service at a given time is set in one state. Having received the starting address of the new program, the digital computer 32 switches to its execution with, the first command of this program reads the information. from the key register 4 by sending packages on buses 26 and 28 to block 2 of the address of this external device and the signal on trigger 18 for switching it to a state allowing only the Cht signal to pass, and on bus 30 it sends an input to the input of the And 13 element in the case of the raised state of trigger 18, the start of the shift register 1.4, the output of this register as soon as the pulses from the generator 19 are formed are the signals Read, Reset, Write, End of the exchange. By the read signal, the contents of the key register 4 are substituted on the bus 21DCM 32 is stored in the array numbers decrypted external device number of a peripheral device has received the right to treatment, and the signal bus End exchange 22, the digital computer 32 takes a signal from bus 30 and proceeds to the requested program vapolnenie

If it is necessary to write information to one of the external device's subscribers, in the process of executing the requested program, the digital computer 32 sends the address of the subscriber to the block 2, sends the information to the register 1 to the register 2, which must be written to the selected subscriber and sets the trigger 18 to signal, allowing the passage of signals — Reset and Over, to the external device 3: 1; then, via bus 30,

element input is an AND 13 signal, jpaspreshyushchy the beginning of the shift register 1.4, as the pulses from the generator 19, the shift register 14 is explored-. 5 handles signals reading,

Reset.,: 3apis and End of the exchange, the last of which is on bus 22 goes to TsVM 32.and reports the end of the process recorded

0 In the read mode of information from an external device 31, the digital computer 32 via bus 26 outputs to the block 2 the address of the subscriber of the external device 31 and sets a trigger on bus 28

5 18 into the state, allowing only the Read signal to be transmitted to the external device 31, then via bus 30, CMU 32 supplies the input element AND 13 with a signal allowing starting of the shift register 14 at the outputs of which, as pulses arrive from the generator 19, signals are generated .Reading, Resetting, and Writing and Ending Exchange

5, the external device 31 is enabled. passing only the read signal, which is used to read information from the subscriber of the external device 31 and to write to register 1, from which information is read

0 to digital computer 3.2, Signal "The end of the exchange of the incoming digital computer 32, reports the end of the exchange, after which the signal on the bus 3.0 is removed

5 In this case, the exchange of information is possible only with the external device 31, in which the trigger 12 is set to a single state, which makes it possible to connect to the digital computer 32 through this device as peripheral devices of the same type. having the same addresses of subscribers, as well as devices of various purposes, the addresses of which subscribers are not

5 match,

If during the execution of the service program in the digital computer 32 a higher priority signal is received from another external device 31, the digital computer 32 interrupts the execution

0

current program. On the bus 27, the digital computer 32 outputs to the device requesting the service a signal that permits the passage of the address of the interrupt vector from register 3 and sets the trigger 12 in the new device to the one state through the AND 9 and OR 11 elements and resets the register 7 and the back edge; 3e Next, the digital computer 32 determines the number of the served device and the send-. This is an address that corresponds to the number of the external device for resetting the trigger 12 in this device, thereby providing the possibility of exchanging information only with

Claims (1)

DEVICE FOR 'PAIRING A DIGITAL COMPUTER MACHINE WITH EXTERNAL DEVICES ON ed, Wed,' No. 849190, characterized in that, in order to expand the scope of the device, two elements And, an OR element, a priority trigger and a key register of the peripheral device number are entered into it CTBA, wherein the first priority trigger input coupled to the second output of the addressing block _h, a third output connected to the first input of the OR gate, whose output is connected to the second input of the trigger priority, and the second input - with the output of the first D element. and, the first input connected to the output of the interrupt register, and the second input to the fourth input of the device, the first and second inputs of the second, element And are connected respectively to the first output of the mode switch and the output of the addressing unit, and the output through the key register of the peripheral device number is the second output of the device, the output of the priority trigger is connected to the fourth input of the mode switch. I