SU1053282A1 - Delay device - Google Patents

Abstract

A DELAY DEVICE, containing a delay line whose input is the device input, and a control input connected to the output of the clock generator, and a low-pass filter, is required so as to enhance the dynamic range and the ability to match the input dynamic range. of a signal with a dynamic range of the device, a series-connected amplifier connected between the device input and the Low-pass filter input are inserted into it, the second line of delay and the switch, the second input of which is connected to the output of the first delay line, and also the control unit of the switch, connected th output. with a switch, signal inputs 4 with an output of the second delay line, .a. upshr kk; dim input - with the output of the clock pulse generator, also connected to the control input (L of the second delay line.

Description

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Lm The invention relates to a pulse technique and is intended for use in automation and radio electronics, particularly in sonar. Artificial delay lines (LRIs) are known, consisting of N cascade linked low frequency filters. Their main disadvantages are the small amount of delay (from tenths to tens of microseconds) and the inability to smoothly change the value of the delay. The closest technical solution to the invention is a delay device containing a line made as a chain, I memorize these elements, the input of which is the input of the device, the control inputs connected to the generator, and the output to the input of the low-pass filter C 2 3. The known device has low dynamic range and does not match the dynamic range of the input signal with the di amic range of the delay device. The purpose of the invention is to broaden the dynamic range and allow the dynamic range of the input signal to match the dynamic range of the holding device. The goal is achieved due to the fact that the delay device containing the delay line, whose input is the input of the control unit, the input input connected to the output of the clock generator, and the low-pass filter, is additionally connected between the input of the device and the low-pass filter input. an amplifier connected in series, a second delay line and a switch, the second input of which is connected to the output of the first delay line, as well as a switch control unit connected to the switch with a switch, a signal input - with the output of the second delay line, and the control input - with the output of the clock generator, also connected to the control input of the second delay line. The drawing shows a functional block diagram of the delay device. The device contains two channels, the first of which consists of the first delay line 1, and the second of amplifier 2 and the second delay line 3, switch 4 connected by inputs to delay lines 1 and 3, and output to the low-pass filter 5, block The switchboard 6 controls the output connected to the switch 4, and the inputs to the second delay line 3 and to the clock generator 7, the other outputs of which are connected to the control inputs of the delay lines 1 and 3. The device works as follows. The voltage u0 supplied to the input of the device through the delay time. T is obtained at the output of both delay lines 1 and 3 with the same parameters (the delay time of amplifier 2 is negligible compared to V). The voltage K-, at the output of the first delay line 1, is the same® -,. and the voltage U2 at the output of the second line 3 delay equals —HX where K is the gain of amplifier 2 .., The voltage U from the output of the first line 1 delay arrives at the second input of switch 4, and the voltage UjC output of the second line 3 delay arrives at the first the input of the switch 4 and the signal input of the control block b of the switch, in which the voltage U2 is compared with the threshold voltage Uj. When condition 1 211 e1 is satisfied, the switch control unit 6 generates a control signal U4 / with which the switch 4 connects the output of the first delay line 1 to the input of the low-pass filter 5. Since the transfer coefficient of the switch 4 at the second signal input is equal to one, the voltage Uj at the input of filter 5 will be equal to Ts.ts ,.i,. if the switch control unit 6 generates a control signal U with which the switch 4 connects the output of the second delay line 3 to the input of the filter 5. Since the transfer coefficient of the switch 4 at the first signal input is 1 / K, the voltage 05 at the input of the filter 5 will be 1 1. The operation of the lines 1 and 3 of the delays of the switch 4 and the switch control block b is synchronized by the generator 7 clock pulses. Thus, at low levels of the input signal of the UWH, when the delayed signal has a large influence on the delay line, the output of the second delay line 3 is connected to the input of the filter 5, to the input of which

3,105,32824

an input signal is supplied, the pre-condition to filter 5 is transmitted with a power amplified by amplifier 2 v. support for the time f, but without rms K times. The amplified and then delayed amplification and the subsequent axial signal for time t weakens the fading. switch 4 is also K times. As a result, the effect of noise weakens –5. Thus, the additions made to the circuit with K times allowed K times to be expanded. At the input signal level, the dynamic range of the device exceeds the noise level and solves the problem of matching the delay line to the Filter5 input. The input signal output signal is switched on. The output of the first line 1 is set to J-10 la with the dynamic range of the device. In this case, the signal from the input ycTjxjft-tion.

Claims (1)

DELAY DEVICE, comprising a delay line, the input of which is the input of the device, and the control input is connected to the output of the clock generator, and a filter ^; low frequencies, excluding,> with the fact that, in order to expand the dynamic range and to ensure the possibility of matching the dynamic range of the input signal with the dynamic range of the device, a series-connected amplifier, a second holding line and a switch, and a second input of the second connected to the output of the first delay line, and also the switch control unit, connected by the output •. with the switch, the signal input "*! with the output of the second delay line, and the control input with the output of the clock generator, also connected to the control input of the second delay line SP oo yo 00 th cascade soi-5