SG155038A1 - A multi-threaded packet processing engine for stateful packet processing - Google Patents
A multi-threaded packet processing engine for stateful packet processingInfo
- Publication number
- SG155038A1 SG155038A1 SG200601812-1A SG2006018121A SG155038A1 SG 155038 A1 SG155038 A1 SG 155038A1 SG 2006018121 A SG2006018121 A SG 2006018121A SG 155038 A1 SG155038 A1 SG 155038A1
- Authority
- SG
- Singapore
- Prior art keywords
- multiplicity
- packet processing
- tribe
- processing
- threads
- Prior art date
Links
- 238000013508 migration Methods 0.000 abstract 1
- 230000005012 migration Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
- G06F9/3891—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/485—Task life-cycle, e.g. stopping, restarting, resuming execution
- G06F9/4856—Task life-cycle, e.g. stopping, restarting, resuming execution resumption being on a different machine, e.g. task migration, virtual machine migration
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/485—Task life-cycle, e.g. stopping, restarting, resuming execution
- G06F9/4856—Task life-cycle, e.g. stopping, restarting, resuming execution resumption being on a different machine, e.g. task migration, virtual machine migration
- G06F9/4862—Task life-cycle, e.g. stopping, restarting, resuming execution resumption being on a different machine, e.g. task migration, virtual machine migration the task being a mobile agent, i.e. specifically designed to migrate
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Devices For Executing Special Programs (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US32563801P | 2001-09-28 | 2001-09-28 | |
US34168901P | 2001-12-17 | 2001-12-17 | |
US38827802P | 2002-06-13 | 2002-06-13 | |
PCT/US2002/030421 WO2003030012A1 (fr) | 2001-09-28 | 2002-09-24 | Moteur de traitement de paquets multiprocessus pour le traitement dynamique de paquets |
Publications (1)
Publication Number | Publication Date |
---|---|
SG155038A1 true SG155038A1 (en) | 2009-09-30 |
Family
ID=27406414
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200601812-1A SG155038A1 (en) | 2001-09-28 | 2002-09-24 | A multi-threaded packet processing engine for stateful packet processing |
Country Status (5)
Country | Link |
---|---|
US (3) | US7360217B2 (fr) |
EP (1) | EP1436724A4 (fr) |
IL (3) | IL161107A0 (fr) |
SG (1) | SG155038A1 (fr) |
WO (1) | WO2003030012A1 (fr) |
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WO2001016702A1 (fr) * | 1999-09-01 | 2001-03-08 | Intel Corporation | Ensemble de registres utilise dans une architecture de processeurs multifiliere paralleles |
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- 2002-09-24 US US10/254,377 patent/US7360217B2/en not_active Expired - Fee Related
- 2002-09-24 WO PCT/US2002/030421 patent/WO2003030012A1/fr active Application Filing
- 2002-09-24 EP EP02780352A patent/EP1436724A4/fr not_active Withdrawn
- 2002-09-24 SG SG200601812-1A patent/SG155038A1/en unknown
- 2002-09-24 IL IL16110702A patent/IL161107A0/xx unknown
-
2004
- 2004-03-25 IL IL161107A patent/IL161107A/en not_active IP Right Cessation
-
2005
- 2005-06-14 US US11/152,879 patent/US20050243734A1/en not_active Abandoned
-
2007
- 2007-07-19 IL IL184739A patent/IL184739A/en not_active IP Right Cessation
-
2010
- 2010-01-29 US US12/697,099 patent/US20100202292A1/en not_active Abandoned
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2001016702A1 (fr) * | 1999-09-01 | 2001-03-08 | Intel Corporation | Ensemble de registres utilise dans une architecture de processeurs multifiliere paralleles |
WO2001016698A2 (fr) * | 1999-09-01 | 2001-03-08 | Intel Corporation | Instructions de reference de memoire pour micro-moteurs a processeur a architecture parallele multifiliere |
WO2001048606A2 (fr) * | 1999-12-28 | 2001-07-05 | Intel Corporation | Signalisation par filieres dans des processeurs reseau mulitfilieres |
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WO2001097469A2 (fr) * | 2000-06-14 | 2001-12-20 | Sun Microsystems, Inc. | Planificateur d'emission de paquets |
US20020116587A1 (en) * | 2000-12-22 | 2002-08-22 | Modelski Richard P. | External memory engine selectable pipeline architecture |
Also Published As
Publication number | Publication date |
---|---|
US20100202292A1 (en) | 2010-08-12 |
IL161107A0 (en) | 2004-08-31 |
EP1436724A4 (fr) | 2007-10-03 |
US7360217B2 (en) | 2008-04-15 |
WO2003030012A1 (fr) | 2003-04-10 |
US20030069920A1 (en) | 2003-04-10 |
EP1436724A1 (fr) | 2004-07-14 |
IL184739A (en) | 2009-09-01 |
IL161107A (en) | 2010-03-28 |
IL184739A0 (en) | 2007-12-03 |
US20050243734A1 (en) | 2005-11-03 |
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