SG121141A1 - A method for performing full-chip manufacturing reliability checking and correction - Google Patents

A method for performing full-chip manufacturing reliability checking and correction

Info

Publication number
SG121141A1
SG121141A1 SG200505920A SG200505920A SG121141A1 SG 121141 A1 SG121141 A1 SG 121141A1 SG 200505920 A SG200505920 A SG 200505920A SG 200505920 A SG200505920 A SG 200505920A SG 121141 A1 SG121141 A1 SG 121141A1
Authority
SG
Singapore
Prior art keywords
feature
correction
chip manufacturing
performing full
manufacturing reliability
Prior art date
Application number
SG200505920A
Other languages
English (en)
Inventor
Michael Hsu
Thomas Laidig
Kurt E Wampler
Duan-Fu Stephen Hsu
Xuelong I
Van Den Douglas Broeke
Jang Fung Chen
Original Assignee
Asml Masktools Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asml Masktools Bv filed Critical Asml Masktools Bv
Publication of SG121141A1 publication Critical patent/SG121141A1/en

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G03F7/70441—Optical proximity correction [OPC]
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G03F7/705—Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/20—Design optimisation, verification or simulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
SG200505920A 2004-09-14 2005-09-14 A method for performing full-chip manufacturing reliability checking and correction SG121141A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US60924304P 2004-09-14 2004-09-14

Publications (1)

Publication Number Publication Date
SG121141A1 true SG121141A1 (en) 2006-04-26

Family

ID=35462404

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200505920A SG121141A1 (en) 2004-09-14 2005-09-14 A method for performing full-chip manufacturing reliability checking and correction

Country Status (7)

Country Link
US (1) US7434195B2 (fr)
EP (1) EP1635222A3 (fr)
JP (1) JP4455469B2 (fr)
KR (1) KR100841729B1 (fr)
CN (1) CN1800971A (fr)
SG (1) SG121141A1 (fr)
TW (1) TWI362568B (fr)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100772783B1 (ko) * 2005-07-29 2007-11-01 주식회사 하이닉스반도체 반도체 소자의 에러 측정 방법
KR100642417B1 (ko) * 2005-09-20 2006-11-03 주식회사 하이닉스반도체 레이어 대 레이어 검사방법을 이용한 광학근접보정검증방법
US20080028359A1 (en) * 2006-07-31 2008-01-31 Stefan Blawid Termination structure, a mask for manufacturing a termination structure, a lithographic process and a semiconductor device with a termination structure
US7448008B2 (en) * 2006-08-29 2008-11-04 International Business Machines Corporation Method, system, and program product for automated verification of gating logic using formal verification
US7448018B2 (en) * 2006-09-12 2008-11-04 International Business Machines Corporation System and method for employing patterning process statistics for ground rules waivers and optimization
US7512927B2 (en) * 2006-11-02 2009-03-31 International Business Machines Corporation Printability verification by progressive modeling accuracy
US20080320421A1 (en) * 2007-06-20 2008-12-25 Demaris David L Feature extraction that supports progressively refined search and classification of patterns in a semiconductor layout
NL1036189A1 (nl) * 2007-12-05 2009-06-08 Brion Tech Inc Methods and System for Lithography Process Window Simulation.
JP2009282319A (ja) * 2008-05-22 2009-12-03 Toshiba Corp パターン検証方法、パターン検証システム、パターン検証プログラム、マスク製造方法、および半導体装置の製造方法
JP2009302206A (ja) 2008-06-11 2009-12-24 Canon Inc 露光パラメータの決定方法、露光パラメータを決定するためのプログラム、露光方法及びデバイス製造方法
US8381141B2 (en) 2010-10-28 2013-02-19 International Business Machines Corporation Method and system for comparing lithographic processing conditions and or data preparation processes
US8365108B2 (en) * 2011-01-06 2013-01-29 International Business Machines Corporation Generating cut mask for double-patterning process
TW201234464A (en) * 2011-02-14 2012-08-16 Horng Terng Automation Co Ltd Breaking point height detection method of wafer breaking
TW201316425A (zh) * 2011-10-12 2013-04-16 Horng Terng Automation Co Ltd 晶圓劈裂檢知方法
US8713485B2 (en) 2012-05-29 2014-04-29 International Business Machines Corporation Categorization of design rule errors
US9081932B2 (en) 2013-02-01 2015-07-14 Qualcomm Incorporated System and method to design and test a yield sensitive circuit
US8977988B2 (en) * 2013-04-09 2015-03-10 United Microelectronics Corp. Method of optical proximity correction for modifying line patterns and integrated circuits with line patterns modified by the same
US9064078B2 (en) * 2013-07-30 2015-06-23 Globalfoundries Inc. Methods and systems for designing and manufacturing optical lithography masks
US10339259B2 (en) * 2014-09-26 2019-07-02 Synopsys, Inc. Method for organizing, controlling, and reporting on design mismatch information in IC physical design data
WO2016162157A1 (fr) * 2015-04-07 2016-10-13 Asml Netherlands B.V. Dispositifs de formation de motifs pour utilisation dans un appareil lithographique, procédés de fabrication et d'utilisation de tels dispositifs de formation de motifs
US9639645B2 (en) * 2015-06-18 2017-05-02 Globalfoundries Inc. Integrated circuit chip reliability using reliability-optimized failure mechanism targeting
US10140698B2 (en) * 2015-08-10 2018-11-27 Kla-Tencor Corporation Polygon-based geometry classification for semiconductor mask inspection
KR102545141B1 (ko) 2017-12-01 2023-06-20 삼성전자주식회사 반도체 소자 및 그의 제조 방법

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0236738A3 (fr) * 1986-02-05 1988-12-21 OMRON Corporation Procédé d'entrée de dates d'une plaque à circuits imprimés équipée de référence pour le traitement d'images d'un appareil d'inspection automatique de plaques à circuits imprimés équipées
JPH03174716A (ja) * 1989-08-07 1991-07-29 Hitachi Ltd 電子ビーム描画装置および描画方式
US5307296A (en) * 1989-11-17 1994-04-26 Mitsubishi Denki Kabushiki Kaisha Semiconductor workpiece topography prediction method
US5245543A (en) * 1990-12-21 1993-09-14 Texas Instruments Incorporated Method and apparatus for integrated circuit design
JP3426647B2 (ja) * 1992-06-24 2003-07-14 日本電信電話株式会社 ３次元トポグラフィシミュレーションのための一般化されたソリッドモデリング
US5307421A (en) * 1992-10-14 1994-04-26 Commissariat A L'energie Atomique Process for producing a synthesized reference image for the inspection of objects and apparatus for performing the same
JP3409493B2 (ja) * 1995-03-13 2003-05-26 ソニー株式会社 マスクパターンの補正方法および補正装置
US5621652A (en) * 1995-03-21 1997-04-15 Vlsi Technology, Inc. System and method for verifying process models in integrated circuit process simulators
US5719796A (en) * 1995-12-04 1998-02-17 Advanced Micro Devices, Inc. System for monitoring and analyzing manufacturing processes using statistical simulation with single step feedback
WO1997033205A1 (fr) 1996-03-06 1997-09-12 Philips Electronics N.V. Systeme d'interferometre differentiel et dispositif lithographique a balayage par etapes pourvu d'un tel systeme
US5795688A (en) * 1996-08-14 1998-08-18 Micron Technology, Inc. Process for detecting defects in photomasks through aerial image comparisons
DE69735016T2 (de) 1996-12-24 2006-08-17 Asml Netherlands B.V. Lithographisches Gerät mit zwei Objekthaltern
US6078738A (en) * 1997-05-08 2000-06-20 Lsi Logic Corporation Comparing aerial image to SEM of photoresist or substrate pattern for masking process characterization
US6578188B1 (en) * 1997-09-17 2003-06-10 Numerical Technologies, Inc. Method and apparatus for a network-based mask defect printability analysis system
US6081658A (en) * 1997-12-31 2000-06-27 Avant! Corporation Proximity correction system for wafer lithography
US6634018B2 (en) * 2000-08-24 2003-10-14 Texas Instruments Incorporated Optical proximity correction
US6553559B2 (en) * 2001-01-05 2003-04-22 International Business Machines Corporation Method to determine optical proximity correction and assist feature rules which account for variations in mask dimensions
JP4663214B2 (ja) 2001-03-20 2011-04-06 シノプシイス インコーポレイテッド マスク欠陥のプリンタビリティ解析を提供するシステム及び方法
US6925202B2 (en) * 2001-03-20 2005-08-02 Synopsys, Inc. System and method of providing mask quality control
US6873720B2 (en) * 2001-03-20 2005-03-29 Synopsys, Inc. System and method of providing mask defect printability analysis
JP2002311561A (ja) * 2001-04-11 2002-10-23 Sony Corp パターン形成方法、パターン処理装置および露光マスク
US7103219B2 (en) * 2001-04-12 2006-09-05 Eastman Kodak Company Population mixture modeling with an indeterminate number of sub-populations
JP3706364B2 (ja) 2001-10-09 2005-10-12 アスムル マスクツールズ ビー．ブイ． ２次元フィーチャ・モデルの較正および最適化方法
TWI237745B (en) * 2001-12-19 2005-08-11 Sony Corp Mask pattern correction apparatus and mask pattern correction method
US7035446B2 (en) * 2002-05-22 2006-04-25 Lsi Logic Corporation Quality measurement of an aerial image
US20030229875A1 (en) * 2002-06-07 2003-12-11 Smith Taber H. Use of models in integrated circuit fabrication
JP2004311561A (ja) * 2003-04-03 2004-11-04 Sumitomo Mitsubishi Silicon Corp ウェーハ貼付方法及びウェーハ貼付装置
DE602004011860T2 (de) * 2003-09-05 2009-02-12 Asml Masktools B.V. Methode und Vorrichtung für modellgestützte Plazierung phasenbalancierter Hilfsstrukturen für optische Lithographie mit Auflösungsgrenzen unterhalb der Belichtungswellenlänge
US7003758B2 (en) * 2003-10-07 2006-02-21 Brion Technologies, Inc. System and method for lithography simulation

Also Published As

Publication number Publication date
EP1635222A2 (fr) 2006-03-15
US7434195B2 (en) 2008-10-07
US20060080633A1 (en) 2006-04-13
TW200622509A (en) 2006-07-01
KR100841729B1 (ko) 2008-06-27
EP1635222A3 (fr) 2007-09-19
JP4455469B2 (ja) 2010-04-21
CN1800971A (zh) 2006-07-12
TWI362568B (en) 2012-04-21
JP2006085188A (ja) 2006-03-30
KR20060051274A (ko) 2006-05-19

Similar Documents

Publication Publication Date Title
SG121141A1 (en) A method for performing full-chip manufacturing reliability checking and correction
SG129366A1 (en) Method of selecting a grid model for correcting a process recipe for grid deformations in a lithographic apparatus and lithographic assembly using thesame
IL172053A0 (en) Method for evaluating the effects of multiple exposure processes in lithography
MX2007001251A (es) Metodos y aparato para mejorar la exactitud y alcance de los sistemas de medicion de la exposicion a los medios electronicos.
EP3159738A3 (fr) Procédé de mesure de forme de coup et masque
WO2007030704A3 (fr) Systeme et methode pour une verification de masque faisant appel a un modele d'erreur de masque individuel
KR102307022B1 (ko) 리소그래피 장치 교정 방법
EP1956431A4 (fr) Appareil d'exposition, procede d' exposition et procede de fabrication de dispositif
CN1481535A (zh) 监控和改进多层pcb制造的尺寸稳定性和配准精度的系统和方法
TW200710693A (en) Method and apparatus for placing assist features
CN1828613A (zh) 确定掩模布局中改善的辅助特征配置的方法和装置
ATE419560T1 (de) Kopieren eines musters mit hilfe eines zwischenstempels
JP2008164593A5 (fr)
TW200619864A (en) A method of performing resist process calibration/optimization and doe optimization for providing ope matching between different lithography systems
SG109607A1 (en) Method and apparatus for performing model based placement of phase-balanced scattering bars for sub-wavelength optical lithography
JP2010225693A5 (fr)
JP2008517467A5 (fr)
TW200734810A (en) Method and apparatus for evaluating photomask, and method for manufacturing semiconductor device
TW200714894A (en) Mask defect inspecting method, mask defect inspecting apparatus, and semiconductor device manufacturing method
KR20170048540A (ko) 기하구조 유도 오버레이의 분열 분석 및 개선된 오버레이 제어를 위한 분열 분석의 이용
JP2005286161A5 (fr)
US7669153B2 (en) Method for correcting photomask pattern
KR101893823B1 (ko) 기판 검사장치 및 이를 이용한 기판의 왜곡 보상 방법
JP2011165950A (ja) パターン検証方法、パターン生成方法、デバイス製造方法、パターン検証プログラム及びパターン検証装置
ATE459899T1 (de) Methode und system für einen verbesserten lithographischen prozess