SG11202000800VA - Method for evaluating edge shape of silicon wafer, apparatus for evaluating thereof, silicon wafer, method for selecting and method for manufacturing thereof - Google Patents

Method for evaluating edge shape of silicon wafer, apparatus for evaluating thereof, silicon wafer, method for selecting and method for manufacturing thereof

Info

Publication number
SG11202000800VA
SG11202000800VA SG11202000800VA SG11202000800VA SG11202000800VA SG 11202000800V A SG11202000800V A SG 11202000800VA SG 11202000800V A SG11202000800V A SG 11202000800VA SG 11202000800V A SG11202000800V A SG 11202000800VA SG 11202000800V A SG11202000800V A SG 11202000800VA
Authority
SG
Singapore
Prior art keywords
silicon wafer
evaluating
selecting
manufacturing
edge shape
Prior art date
Application number
SG11202000800VA
Inventor
Masahiro Sakurada
Makoto Kobayashi
Takeshi Kobayashi
Koichi Kanaya
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Priority claimed from PCT/JP2018/028167 external-priority patent/WO2019035336A1/en
Publication of SG11202000800VA publication Critical patent/SG11202000800VA/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B9/00Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor
    • B24B9/02Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground
    • B24B9/06Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain
    • B24B9/065Machines or devices designed for grinding edges or bevels on work or for removing burrs; Accessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain of thin, brittle parts, e.g. semiconductors, wafers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01BMEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00Measuring arrangements characterised by the use of optical techniques
    • G01B11/24Measuring arrangements characterised by the use of optical techniques for measuring contours or curvatures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02021Edge treatment, chamfering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01BMEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B2210/00Aspects not specifically covered by any group under G01B, e.g. of wheel alignment, caliper-like sensors
    • G01B2210/56Measuring geometric parameters of semiconductor structures, e.g. profile, critical dimensions or trench depth
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/95Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/9501Semiconductor wafers
    • G01N21/9503Wafer edge inspection
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Immunology (AREA)
  • Ceramic Engineering (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Pathology (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
SG11202000800VA 2017-08-15 2018-07-27 Method for evaluating edge shape of silicon wafer, apparatus for evaluating thereof, silicon wafer, method for selecting and method for manufacturing thereof SG11202000800VA (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2017156723 2017-08-15
JP2017197880A JP6750592B2 (en) 2017-08-15 2017-10-11 Method and apparatus for evaluating edge shape of silicon wafer, silicon wafer, and method for selecting and manufacturing the same
PCT/JP2018/028167 WO2019035336A1 (en) 2017-08-15 2018-07-27 Evaluation method and evaluation device of edge shape of silicon wafer, silicon wafer, and selection method and manufacturing method thereof

Publications (1)

Publication Number Publication Date
SG11202000800VA true SG11202000800VA (en) 2020-02-27

Family

ID=65637812

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202000800VA SG11202000800VA (en) 2017-08-15 2018-07-27 Method for evaluating edge shape of silicon wafer, apparatus for evaluating thereof, silicon wafer, method for selecting and method for manufacturing thereof

Country Status (7)

Country Link
US (1) US11486833B2 (en)
EP (1) EP3671816A4 (en)
JP (1) JP6750592B2 (en)
KR (1) KR102520902B1 (en)
CN (1) CN111033707B (en)
SG (1) SG11202000800VA (en)
TW (1) TWI784034B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101992778B1 (en) 2017-11-01 2019-06-25 에스케이실트론 주식회사 Wafer and method for analyzing shape of the same
CN110057316A (en) * 2019-04-25 2019-07-26 华南理工大学 A method of the tower crane rod piece buckling monitoring based on unmanned plane image recognition
CN113611624A (en) * 2021-07-30 2021-11-05 上海超硅半导体股份有限公司 Silicon wafer clamp damage prediction method and device and silicon wafer
EP4290554A3 (en) 2023-10-26 2024-05-22 Siltronic AG Parameterization of wafer rounding

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2825048B2 (en) * 1992-08-10 1998-11-18 信越半導体株式会社 Semiconductor silicon substrate
JP3197253B2 (en) * 1998-04-13 2001-08-13 株式会社日平トヤマ Wafer chamfering method
CN100339969C (en) * 2000-11-16 2007-09-26 信越半导体株式会社 Wafer shape evaluating method and device and device producing method, wafer and wafer selecting method
JP4162892B2 (en) * 2002-01-11 2008-10-08 日鉱金属株式会社 Semiconductor wafer and manufacturing method thereof
JP2004281609A (en) * 2003-03-14 2004-10-07 Renesas Technology Corp Semiconductor wafer
JP3534115B1 (en) * 2003-04-02 2004-06-07 住友電気工業株式会社 Edge-polished nitride semiconductor substrate, edge-polished GaN free-standing substrate, and edge processing method for nitride semiconductor substrate
JP4915146B2 (en) * 2006-06-08 2012-04-11 信越半導体株式会社 Wafer manufacturing method
JP2007329391A (en) * 2006-06-09 2007-12-20 Disco Abrasive Syst Ltd Crystal orientation indication mark detecting mechanism of semiconductor wafer
EP2107598B1 (en) * 2007-01-31 2016-09-07 Shin-Etsu Handotai Co., Ltd. Chamfering apparatus for silicon wafer and method for producing silicon wafer
JP2009168634A (en) 2008-01-16 2009-07-30 Kobelco Kaken:Kk Shape measuring method, and shape measuring device
JP2009222516A (en) * 2008-03-14 2009-10-01 Raytex Corp Edge inspection apparatus and edge inspection method
JP5621702B2 (en) 2011-04-26 2014-11-12 信越半導体株式会社 Semiconductor wafer and manufacturing method thereof
JP6035982B2 (en) * 2012-08-09 2016-11-30 株式会社Sumco Epitaxial silicon wafer manufacturing method and epitaxial silicon wafer
KR101540569B1 (en) * 2013-12-24 2015-07-31 주식회사 엘지실트론 Method and apparatus for analyzing shape of wafer
JP6191534B2 (en) * 2014-05-01 2017-09-06 信越半導体株式会社 Wafer warpage evaluation method and wafer selection method
JP6045542B2 (en) * 2014-09-11 2016-12-14 信越半導体株式会社 Semiconductor wafer processing method, bonded wafer manufacturing method, and epitaxial wafer manufacturing method
JP2016165768A (en) * 2015-03-09 2016-09-15 信越半導体株式会社 Wafer chamfering device and wafer chamfering method
JP6528527B2 (en) * 2015-04-27 2019-06-12 株式会社Sumco Method of manufacturing truer, method of manufacturing semiconductor wafer, and chamfering apparatus for semiconductor wafer

Also Published As

Publication number Publication date
CN111033707B (en) 2023-09-05
JP6750592B2 (en) 2020-09-02
US20200240929A1 (en) 2020-07-30
JP2019036700A (en) 2019-03-07
EP3671816A4 (en) 2021-04-28
KR102520902B1 (en) 2023-04-13
US11486833B2 (en) 2022-11-01
CN111033707A (en) 2020-04-17
TWI784034B (en) 2022-11-21
EP3671816A1 (en) 2020-06-24
TW201921537A (en) 2019-06-01
KR20200035407A (en) 2020-04-03

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