SG11201907672VA - Substrate processing apparatus, method of manufacturing semiconductor device, and program - Google Patents

Substrate processing apparatus, method of manufacturing semiconductor device, and program

Info

Publication number
SG11201907672VA
SG11201907672VA SG11201907672VA SG11201907672VA SG11201907672VA SG 11201907672V A SG11201907672V A SG 11201907672VA SG 11201907672V A SG11201907672V A SG 11201907672VA SG 11201907672V A SG11201907672V A SG 11201907672VA SG 11201907672V A SG11201907672V A SG 11201907672VA
Authority
SG
Singapore
Prior art keywords
substrates
substrate holder
program
semiconductor device
processing apparatus
Prior art date
Application number
SG11201907672VA
Inventor
Jyunichi Kawasaki
Tadashi Okazaki
Original Assignee
Kokusai Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Electric Corp filed Critical Kokusai Electric Corp
Publication of SG11201907672VA publication Critical patent/SG11201907672VA/en

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Physical Vapour Deposition (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

There is provided a configuration including; a substrate holder configured to hold a plurality of substrates including product substrates and dummy substrates; a transfer mechanism configured to load the plurality of substrates to the substrate holder; a main controller configured to determine substrate-mounting positions for the plurality of substrates according to setting items respectively corresponding to the number of the product substrates to be mounted on the substrate holder, the number of the dummy substrates to be loaded above and below the product substrates, and a number indicating a mounting position of a topmost of the dummy substrates to be loaded to the substrate holder; and a transfer controller configured to operate the transfer mechanism according to the determined substrate-mounting positions. FIGURE 5
SG11201907672VA 2017-02-24 2017-09-27 Substrate processing apparatus, method of manufacturing semiconductor device, and program SG11201907672VA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2017033214 2017-02-24
PCT/JP2017/034962 WO2018154829A1 (en) 2017-02-24 2017-09-27 Board processing apparatus, semiconductor device making method and program

Publications (1)

Publication Number Publication Date
SG11201907672VA true SG11201907672VA (en) 2019-09-27

Family

ID=63254212

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201907672VA SG11201907672VA (en) 2017-02-24 2017-09-27 Substrate processing apparatus, method of manufacturing semiconductor device, and program

Country Status (4)

Country Link
JP (1) JP7030772B2 (en)
CN (1) CN110366770B (en)
SG (1) SG11201907672VA (en)
WO (1) WO2018154829A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230050461A (en) 2020-09-25 2023-04-14 가부시키가이샤 코쿠사이 엘렉트릭 Substrate arrangement data display method, semiconductor device manufacturing method, and substrate processing device and program
CN113363190B (en) * 2021-05-31 2022-07-08 北海惠科半导体科技有限公司 Wafer boat, diffusion apparatus and semiconductor device manufacturing method

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0329317A (en) * 1989-06-27 1991-02-07 Mitsubishi Electric Corp Arrangement apparatus for semiconductor wafer
JP4030858B2 (en) * 2002-10-30 2008-01-09 東京エレクトロン株式会社 Heat treatment apparatus and heat treatment method
JP4740375B2 (en) * 2010-01-26 2011-08-03 株式会社日立国際電気 Semiconductor manufacturing apparatus, semiconductor manufacturing method, and substrate transfer method
JP5924856B2 (en) * 2010-09-24 2016-05-25 ラピスセミコンダクタ株式会社 Manufacturing method of semiconductor device

Also Published As

Publication number Publication date
WO2018154829A1 (en) 2018-08-30
CN110366770B (en) 2023-09-19
JP7030772B2 (en) 2022-03-07
CN110366770A (en) 2019-10-22
JPWO2018154829A1 (en) 2019-11-07

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