SG11201905068VA - Periodic non-intrusive diagnosis of lockstep systems - Google Patents
Periodic non-intrusive diagnosis of lockstep systemsInfo
- Publication number
- SG11201905068VA SG11201905068VA SG11201905068VA SG11201905068VA SG11201905068VA SG 11201905068V A SG11201905068V A SG 11201905068VA SG 11201905068V A SG11201905068V A SG 11201905068VA SG 11201905068V A SG11201905068V A SG 11201905068VA SG 11201905068V A SG11201905068V A SG 11201905068VA
- Authority
- SG
- Singapore
- Prior art keywords
- comparator
- international
- diagnosis
- cores
- program
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
- G06F11/1645—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components and the comparison itself uses redundant hardware
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2215—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test error correction or detection circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
- G06F11/2242—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors in multi-processor systems, e.g. one processor becoming the test master
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
- G06F2201/805—Real-time
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Hardware Redundancy (AREA)
Abstract
INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property Organization International Bureau (43) International Publication Date 26 July 2018 (26.07.2018) WIPO I PCT omit IIl °nolo Oil ono iflo oimIE (10) International Publication Number WO 2018/136169 Al DISABLE 1\" . COMPARATOR, CORES REMAIN OPERATIONAL, RUN A DIAGNOSIS OF COMPARATOR, ENABLE I' COMPARATOR CORES OPERATIONAL, 1 COMPARATOR ACTIVE (51) International Patent Classification: GOOF 11/16 (2006.01) GOOF 11/22 (2006.01) (21) International Application Number: PCT/US2017/065685 (22) International Filing Date: 12 December 2017 (12.12.2017) (25) Filing Language: English (72) Inventors: BANSAL, Kapil; Purva Riviera Marathahal- li, Bangalore RGA006 (IN). DIGARI, Kailash; 9155 Prestige, Shantiniketan, Whitefield, Near ITPL, Bangalore 560048 (IN). GULATI, Rahul; 5775 Morehouse Drive, San Diego, California 92121-1714 (US). (74) Agent: READ, Randol W. et al.; Patterson & Sheridan, L.L.P., 24 Greenway Plaza, Suite 1600, Houston, Texas 77046-2472 (US). (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Declarations under Rule 4.17: as to applicant's entitlement to apply for and be granted a patent (Rule 4.17(ii)) as to the applicant's entitlement to claim the priority of the earlier application (Rule 4.17(iii)) (26) Publication Language: English (30) Priority Data: 15/410,271 19 January 2017 (19.01.2017) US (84) (71) Applicant: QUALCOMM INCORPORATED [US/US]; Attn: International IP Administration, 5775 Morehouse Dri- ve, San Diego, California 92121-1714 (US). = (54) Title: PERIODIC NON-INTRUSIVE DIAGNOSIS OF LOCKSTEP SYSTEMS (57) : Aspects disclosed herein relate to periodic non-intrusive diagnosis of lockstep systems. An exemplary method includes comparing execution of a program on a first processing system of the plurality of pro- cessing systems and execution of the program on a second processing sys- i i i tem of the plurality of processing systems using a first comparator circuit, comparing the execution of the program on the first processing system and CORES REMAIN COMPARATOR, DISA 131.E I TT the execution of the program on the second processing system using a sec- ond comparator circuit, and miming a diagnosis program on the second OPERATIONAL. comparator circuit while the comparing using the first comparator circuit RUN A DIAGNOSIS OH 1 s ' is ongoing. COMPARATOR, ENABLE COMPARATOR 1 1 W O 20 18/ 136 169 Al CORES OPERATIONAL, 2 COMPARATOR ACTIVE DISABLE 2 . COMPARATOR. CORES REMAIN OPERATIONAL, RUN A DIAGNOSIS OF 2 . COMPARATOR, ENABLE 2 . COMPARATOR FIGURE 5 CORES OPERATFONAI„ 2 . COMPARATOR ACTIVE [Continued on next page] WO 2018/136169 Al MIDEDIMOHNOBEIEDEMIIMH111111111111011111111111111111 Published: — with international search report (Art. 21(3))
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/410,271 US10331532B2 (en) | 2017-01-19 | 2017-01-19 | Periodic non-intrusive diagnosis of lockstep systems |
PCT/US2017/065685 WO2018136169A1 (en) | 2017-01-19 | 2017-12-12 | Periodic non-intrusive diagnosis of lockstep systems |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201905068VA true SG11201905068VA (en) | 2019-08-27 |
Family
ID=60915647
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201905068VA SG11201905068VA (en) | 2017-01-19 | 2017-12-12 | Periodic non-intrusive diagnosis of lockstep systems |
Country Status (8)
Country | Link |
---|---|
US (1) | US10331532B2 (en) |
EP (1) | EP3555748B1 (en) |
KR (1) | KR102016004B1 (en) |
CN (1) | CN110140112B (en) |
BR (1) | BR112019014536A2 (en) |
SG (1) | SG11201905068VA (en) |
TW (1) | TWI686695B (en) |
WO (1) | WO2018136169A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11424621B2 (en) | 2020-01-28 | 2022-08-23 | Qualcomm Incorporated | Configurable redundant systems for safety critical applications |
CN112596916A (en) * | 2021-03-03 | 2021-04-02 | 上海励驰半导体有限公司 | Dual-core lock step error recovery system and method |
CN115372710B (en) * | 2022-10-21 | 2024-02-06 | 西安创联电气科技(集团)有限责任公司 | Automatic resistor testing device |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5790776A (en) * | 1992-12-17 | 1998-08-04 | Tandem Computers Incorporated | Apparatus for detecting divergence between a pair of duplexed, synchronized processor elements |
US6862693B2 (en) * | 2001-04-13 | 2005-03-01 | Sun Microsystems, Inc. | Providing fault-tolerance by comparing addresses and data from redundant processors running in lock-step |
US7392426B2 (en) * | 2004-06-15 | 2008-06-24 | Honeywell International Inc. | Redundant processing architecture for single fault tolerance |
JP4356634B2 (en) * | 2005-03-23 | 2009-11-04 | 日本電気株式会社 | Fault diagnosis circuit, information processing apparatus including the fault diagnosis circuit, fault diagnosis system, and fault diagnosis program |
DE102005037246A1 (en) * | 2005-08-08 | 2007-02-15 | Robert Bosch Gmbh | Method and device for controlling a computer system having at least two execution units and a comparison unit |
US8010846B1 (en) | 2008-04-30 | 2011-08-30 | Honeywell International Inc. | Scalable self-checking processing platform including processors executing both coupled and uncoupled applications within a frame |
US7886195B2 (en) * | 2008-05-05 | 2011-02-08 | Infineon Technologies Ag | Apparatus, system, and method of efficiently utilizing hardware resources for a software test |
JP5509568B2 (en) * | 2008-10-03 | 2014-06-04 | 富士通株式会社 | Computer apparatus, processor diagnosis method, and processor diagnosis control program |
CN101794271B (en) * | 2010-03-31 | 2012-05-23 | 华为技术有限公司 | Implementation method and device of consistency of multi-core internal memory |
US8937622B2 (en) * | 2010-09-20 | 2015-01-20 | Qualcomm Incorporated | Inter-processor communication techniques in a multiple-processor computing platform |
US8941655B2 (en) * | 2011-09-07 | 2015-01-27 | Qualcomm Incorporated | Memory copy engine for graphics processing |
US8819485B2 (en) * | 2012-03-12 | 2014-08-26 | Infineon Technologies Ag | Method and system for fault containment |
EP2813949B1 (en) | 2013-06-11 | 2019-08-07 | ABB Schweiz AG | Multicore processor fault detection for safety critical software applications |
US9223565B2 (en) * | 2013-10-16 | 2015-12-29 | Google Inc. | Rendering interface objects defined by a separate application |
JP2015222467A (en) * | 2014-05-22 | 2015-12-10 | ルネサスエレクトロニクス株式会社 | Microcontroller and electronic control device using the same |
JP6360387B2 (en) * | 2014-08-19 | 2018-07-18 | ルネサスエレクトロニクス株式会社 | Processor system, engine control system, and control method |
US9823983B2 (en) * | 2014-09-25 | 2017-11-21 | Nxp Usa, Inc. | Electronic fault detection unit |
US10002056B2 (en) * | 2015-09-15 | 2018-06-19 | Texas Instruments Incorporated | Integrated circuit chip with cores asymmetrically oriented with respect to each other |
US10089194B2 (en) * | 2016-06-08 | 2018-10-02 | Qualcomm Incorporated | System and method for false pass detection in lockstep dual core or triple modular redundancy (TMR) systems |
-
2017
- 2017-01-19 US US15/410,271 patent/US10331532B2/en active Active
- 2017-12-12 EP EP17823301.1A patent/EP3555748B1/en active Active
- 2017-12-12 SG SG11201905068VA patent/SG11201905068VA/en unknown
- 2017-12-12 KR KR1020197020703A patent/KR102016004B1/en active IP Right Grant
- 2017-12-12 WO PCT/US2017/065685 patent/WO2018136169A1/en unknown
- 2017-12-12 CN CN201780082244.0A patent/CN110140112B/en active Active
- 2017-12-12 TW TW106143515A patent/TWI686695B/en active
- 2017-12-12 BR BR112019014536-2A patent/BR112019014536A2/en unknown
Also Published As
Publication number | Publication date |
---|---|
US10331532B2 (en) | 2019-06-25 |
KR102016004B1 (en) | 2019-08-29 |
WO2018136169A1 (en) | 2018-07-26 |
CN110140112A (en) | 2019-08-16 |
EP3555748B1 (en) | 2020-05-13 |
CN110140112B (en) | 2020-11-17 |
BR112019014536A2 (en) | 2020-02-27 |
TW201830243A (en) | 2018-08-16 |
KR20190091554A (en) | 2019-08-06 |
US20180203778A1 (en) | 2018-07-19 |
TWI686695B (en) | 2020-03-01 |
EP3555748A1 (en) | 2019-10-23 |
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