SG11201811488VA - A semiconductor logic element and logic circuitries - Google Patents
A semiconductor logic element and logic circuitriesInfo
- Publication number
- SG11201811488VA SG11201811488VA SG11201811488VA SG11201811488VA SG11201811488VA SG 11201811488V A SG11201811488V A SG 11201811488VA SG 11201811488V A SG11201811488V A SG 11201811488VA SG 11201811488V A SG11201811488V A SG 11201811488VA SG 11201811488V A SG11201811488V A SG 11201811488VA
- Authority
- SG
- Singapore
- Prior art keywords
- logic element
- international
- semiconductor logic
- fet
- pct
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/098—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being PN junction gate field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0952—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using Schottky type FET MESFET
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
Abstract
INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property 111111110111101110101011111011111011111111011101011101111101111111011110111111 Organization International Bureau (10) International Publication Number (43) International Publication Date ......0\"\" WO 2018/011472 Al 18 January 2018 (18.01.2018) WIP0 I PCT (51) International Patent Classification: (74) Agent: BERGGREN OY; P.O. Box 16, (Etelainen H03K 19/094 (2006.01) H03K 19/20 (2006.01) Rautatiekatu 10 A), 00101 HELSINKI (FI). H01L 27/085 (2006.01) H03K 19/0952 (2006.01) H03K 19/003 (2006.01) (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, (21) International Application Number: AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, PCT/FI2017/050537 CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, (22) International Filing Date: DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, 13 July 2017 (13.07.2017) HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, (25) Filing Language: English MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, (26) Publication Language: English OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, (30) Priority Data: TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. 20160183 14 July 2016 (14.07.2016) FI (84) Designated States (unless otherwise indicated, for every (71) Applicant: HYPERION SEMICONDUCTORS OY kind of regional protection available): ARIPO (BW, GH, [FIIFI]; Otakallio 1 A 7, 02150 Espoo (FI). GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, (72) Inventor: AUROLA, Artto; Otakallio 1 A 7, 02150 ESPOO (FI). TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, = (54) Title: A SEMICONDUCTOR LOGIC ELEMENT AND LOGIC CIRCUITRIES = 415 0490 325 483 () 326 416 362 485 7 N '-. N ./A7 A& V -' 481 4& v /7/ .d 7/ Ne/v/ N N . ' 484 471 311 331 313 312 332 314 482 1-1 FIG 4 direction >x direction ei I r ----- (57) : The invention relates to a semiconductor logic element comprising a field effect transistor of the first conductivity type 71' ,1 and a field effect transistor of the second conductivity type. A gate of the first FET is an input of the semiconductor logic element, a - drain of the second FET is referred to as the output of the semiconductor logic element and a source of the second FET is the source 0 • -.... of the semiconductor logic element. By applying applicable potentials to the terminals of the field effect transistors it is possible to GC influence the state of the output of the logic element. The invention relates also to different kinds of logic circuitries comprising the C 1-1 described logic element. ei O [Continued on next page] WO 2018/011472 Al MIDEDIMOMOIDEIROHOINIIMOHOEHOMOMMOVOIMIE MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). Published: — with international search report (Art. 21(3)) — before the expiration of the time limit for amending the claims and to be republished in the event amendments (Rule 48.2(h)) of receipt of
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI20160183A FI20160183L (en) | 2016-07-14 | 2016-07-14 | Improved semiconductor composition |
PCT/FI2017/050537 WO2018011472A1 (en) | 2016-07-14 | 2017-07-13 | A semiconductor logic element and logic circuitries |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201811488VA true SG11201811488VA (en) | 2019-01-30 |
Family
ID=56590395
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201811488VA SG11201811488VA (en) | 2016-07-14 | 2017-07-13 | A semiconductor logic element and logic circuitries |
Country Status (10)
Country | Link |
---|---|
US (2) | US10833080B2 (en) |
EP (1) | EP3485571A4 (en) |
JP (2) | JP7018050B2 (en) |
CN (1) | CN109565279A (en) |
AU (1) | AU2017294604B2 (en) |
CA (1) | CA3030360A1 (en) |
FI (1) | FI20160183L (en) |
IL (1) | IL264146A (en) |
SG (1) | SG11201811488VA (en) |
WO (1) | WO2018011472A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FI20150334A (en) * | 2015-01-14 | 2016-07-15 | Artto Mikael Aurola | Improved semiconductor configuration |
CN113611751B (en) * | 2021-07-15 | 2023-11-10 | 沈阳工业大学 | High-low Schottky barrier undoped XNOR logic digital chip and manufacturing method thereof |
JP2023042299A (en) * | 2021-09-14 | 2023-03-27 | キオクシア株式会社 | Semiconductor device |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3720841A (en) * | 1970-12-29 | 1973-03-13 | Tokyo Shibaura Electric Co | Logical circuit arrangement |
JPS608628B2 (en) * | 1976-07-05 | 1985-03-04 | ヤマハ株式会社 | Semiconductor integrated circuit device |
JPH02224369A (en) * | 1989-02-27 | 1990-09-06 | Sumitomo Electric Ind Ltd | Semiconductor device |
US5247212A (en) * | 1991-01-31 | 1993-09-21 | Thunderbird Technologies, Inc. | Complementary logic input parallel (clip) logic circuit family |
WO1994019828A1 (en) * | 1993-02-25 | 1994-09-01 | National Semiconductor Corporation | Fabrication process for cmos device with jfet |
JP3489265B2 (en) * | 1995-05-19 | 2004-01-19 | ソニー株式会社 | Semiconductor device manufacturing method |
US7005711B2 (en) * | 2002-12-20 | 2006-02-28 | Progressant Technologies, Inc. | N-channel pull-up element and logic circuit |
US7202528B2 (en) * | 2004-12-01 | 2007-04-10 | Semisouth Laboratories, Inc. | Normally-off integrated JFET power switches in wide bandgap semiconductors and methods of making |
DE102006030631B4 (en) * | 2006-07-03 | 2011-01-05 | Infineon Technologies Austria Ag | Semiconductor device arrangement with a power component and a logic device |
KR101631454B1 (en) * | 2008-10-31 | 2016-06-17 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Logic circuit |
KR101608887B1 (en) * | 2009-04-17 | 2016-04-05 | 삼성전자주식회사 | Inverter, method of manufacturing the same and logic circuit comprising inverter |
JP5661445B2 (en) * | 2010-12-14 | 2015-01-28 | ルネサスエレクトロニクス株式会社 | Semiconductor integrated circuit device and manufacturing method thereof |
JP2013041986A (en) * | 2011-08-16 | 2013-02-28 | Advanced Power Device Research Association | GaN-BASED SEMICONDUCTOR DEVICE |
US20130320335A1 (en) * | 2012-06-01 | 2013-12-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
TWI637484B (en) * | 2013-12-26 | 2018-10-01 | 日商半導體能源研究所股份有限公司 | Semiconductor device |
WO2016055894A1 (en) * | 2014-10-06 | 2016-04-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and electronic device |
JP6329054B2 (en) * | 2014-10-10 | 2018-05-23 | トヨタ自動車株式会社 | Switching circuit |
FI20150334A (en) * | 2015-01-14 | 2016-07-15 | Artto Mikael Aurola | Improved semiconductor configuration |
-
2016
- 2016-07-14 FI FI20160183A patent/FI20160183L/en not_active Application Discontinuation
-
2017
- 2017-07-13 US US16/318,001 patent/US10833080B2/en active Active
- 2017-07-13 CA CA3030360A patent/CA3030360A1/en not_active Abandoned
- 2017-07-13 SG SG11201811488VA patent/SG11201811488VA/en unknown
- 2017-07-13 CN CN201780043516.6A patent/CN109565279A/en active Pending
- 2017-07-13 WO PCT/FI2017/050537 patent/WO2018011472A1/en unknown
- 2017-07-13 AU AU2017294604A patent/AU2017294604B2/en not_active Ceased
- 2017-07-13 EP EP17827058.3A patent/EP3485571A4/en not_active Withdrawn
- 2017-07-13 JP JP2019501557A patent/JP7018050B2/en active Active
-
2019
- 2019-01-08 IL IL264146A patent/IL264146A/en unknown
-
2020
- 2020-09-09 US US16/948,245 patent/US20200411517A1/en not_active Abandoned
-
2022
- 2022-01-28 JP JP2022012287A patent/JP2022044813A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
AU2017294604A1 (en) | 2019-01-17 |
US20190244958A1 (en) | 2019-08-08 |
EP3485571A1 (en) | 2019-05-22 |
AU2017294604B2 (en) | 2022-02-10 |
JP2022044813A (en) | 2022-03-17 |
FI20160183L (en) | 2016-07-15 |
US20200411517A1 (en) | 2020-12-31 |
IL264146A (en) | 2019-02-28 |
JP2019521527A (en) | 2019-07-25 |
EP3485571A4 (en) | 2020-02-26 |
JP7018050B2 (en) | 2022-02-09 |
CA3030360A1 (en) | 2018-01-18 |
US10833080B2 (en) | 2020-11-10 |
CN109565279A (en) | 2019-04-02 |
WO2018011472A1 (en) | 2018-01-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG11201811488VA (en) | A semiconductor logic element and logic circuitries | |
SG11201907531XA (en) | Constraining motion vector information derived by decoder-side motion vector derivation | |
SG11201905460SA (en) | Data unsealing with a sealing enclave | |
SG11201804506RA (en) | Systems and methods for rendering multiple levels of detail | |
SG11201909905WA (en) | Method and system for registering digital documents | |
SG11201900269XA (en) | Channel sensing for independent links | |
SG11201908813QA (en) | Anti-sirp alpha antibodies | |
SG11201807803SA (en) | Semiconductor package and method of forming the same | |
SG11201909131XA (en) | System and method for implementing a centralized customizable operating solution | |
SG11201906487TA (en) | Service data processing method and device, and service processing method and device | |
SG11201906418PA (en) | Blockchain-based data processing method and device | |
SG11201905463TA (en) | Abstract enclave identity | |
SG11201807521WA (en) | Advanced fluid processing methods and systems | |
SG11201900844UA (en) | Amino pyrimidine ssao inhibitors | |
SG11201806496SA (en) | Antigen binding proteins that bind pd-l1 | |
SG11201906853QA (en) | Anti-rsv monoclonal antibody formulation | |
SG11201806070PA (en) | Communication of uplink control information | |
SG11201810121QA (en) | Input devices, methods for controlling an input device, and computer readable media | |
SG11201809908TA (en) | Stabilized glycopeptide antibiotic formulations | |
SG11201805643XA (en) | An electrical power distribution network and process | |
SG11201901052WA (en) | Minimum track standard cell circuits for reduced area | |
SG11201809830WA (en) | Selective reduction of cysteine-engineered antibodies | |
SG11201806209YA (en) | Optical gyroscope, electro-optic system, and methods of forming the same | |
SG11201906177WA (en) | Transparent film error correction pattern in wafer geometry system | |
SG11201907259YA (en) | Binary arithmetic coding with parameterized probability estimation finite state machines |