SG11201609094SA - Neutral beam etching of cu-containing layers in an organic compound gas environment - Google Patents
Neutral beam etching of cu-containing layers in an organic compound gas environmentInfo
- Publication number
- SG11201609094SA SG11201609094SA SG11201609094SA SG11201609094SA SG11201609094SA SG 11201609094S A SG11201609094S A SG 11201609094SA SG 11201609094S A SG11201609094S A SG 11201609094SA SG 11201609094S A SG11201609094S A SG 11201609094SA SG 11201609094S A SG11201609094S A SG 11201609094SA
- Authority
- SG
- Singapore
- Prior art keywords
- organic compound
- gas environment
- beam etching
- compound gas
- containing layers
- Prior art date
Links
- 238000005530 etching Methods 0.000 title 1
- 230000007935 neutral effect Effects 0.000 title 1
- 150000002894 organic compounds Chemical class 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
- H01L21/28562—Selective deposition
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Inorganic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- ing And Chemical Polishing (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/319,927 US10147613B2 (en) | 2014-06-30 | 2014-06-30 | Neutral beam etching of Cu-containing layers in an organic compound gas environment |
PCT/US2015/034170 WO2016003591A1 (en) | 2014-06-30 | 2015-06-04 | Neutral beam etching of cu-containing layers in an organic compound gas environment |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201609094SA true SG11201609094SA (en) | 2016-11-29 |
Family
ID=54931312
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201609094SA SG11201609094SA (en) | 2014-06-30 | 2015-06-04 | Neutral beam etching of cu-containing layers in an organic compound gas environment |
Country Status (7)
Country | Link |
---|---|
US (1) | US10147613B2 (en) |
EP (1) | EP3161860A4 (en) |
JP (2) | JP2017519364A (en) |
KR (1) | KR102317702B1 (en) |
SG (1) | SG11201609094SA (en) |
TW (1) | TWI648781B (en) |
WO (1) | WO2016003591A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9984923B2 (en) | 2016-06-30 | 2018-05-29 | International Business Machines Corporation | Barrier layers in trenches and vias |
KR102492733B1 (en) | 2017-09-29 | 2023-01-27 | 삼성디스플레이 주식회사 | Copper plasma etching method and manufacturing method of display panel |
KR101977132B1 (en) | 2018-12-28 | 2019-05-10 | 인하대학교 산학협력단 | Method for Dry Etching of Copper Thin Films |
KR102562321B1 (en) * | 2020-11-13 | 2023-08-01 | 인하대학교 산학협력단 | Method for Dry Etching of Copper Thin Films |
CN117107323B (en) * | 2023-10-23 | 2024-01-12 | 武汉大学 | Method and device for improving interface stability of copper-containing part of environment-friendly gas insulation equipment |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0474421U (en) * | 1990-11-09 | 1992-06-30 | ||
US5271800A (en) | 1991-07-12 | 1993-12-21 | The United States Of America As Represented By The Administrator Of National Aeronautics And Space Administration | Method for anisotropic etching in the manufacture of semiconductor devices |
US5350484A (en) | 1992-09-08 | 1994-09-27 | Intel Corporation | Method for the anisotropic etching of metal films in the fabrication of interconnects |
JPH06224156A (en) * | 1992-11-13 | 1994-08-12 | Hitachi Ltd | Surface treating method and apparatus |
US5336363A (en) | 1993-09-24 | 1994-08-09 | Applied Materials, Inc. | Low temperature dry etch of copper |
US5993679A (en) | 1997-11-06 | 1999-11-30 | Anelva Corporation | Method of cleaning metallic films built up within thin film deposition apparatus |
US6331701B1 (en) | 1998-05-20 | 2001-12-18 | Lee Chen | RF-grounded sub-Debye neutralizer grid |
US6284052B2 (en) | 1998-08-19 | 2001-09-04 | Sharp Laboratories Of America, Inc. | In-situ method of cleaning a metal-organic chemical vapor deposition chamber |
US6352081B1 (en) | 1999-07-09 | 2002-03-05 | Applied Materials, Inc. | Method of cleaning a semiconductor device processing chamber after a copper etch process |
US6921722B2 (en) * | 2000-05-30 | 2005-07-26 | Ebara Corporation | Coating, modification and etching of substrate surface with particle beam irradiation of the same |
US6692903B2 (en) | 2000-12-13 | 2004-02-17 | Applied Materials, Inc | Substrate cleaning apparatus and method |
WO2003048407A1 (en) * | 2001-10-11 | 2003-06-12 | Epion Corporation | Gcib processing to improve interconnection vias and improved interconnection via |
WO2004003256A1 (en) | 2002-06-28 | 2004-01-08 | Tokyo Electron Limited | Anisotropic dry etching of cu-containing layers |
JP2006501651A (en) * | 2002-09-27 | 2006-01-12 | 東京エレクトロン株式会社 | Method and system for etching high-k dielectric materials |
US7476618B2 (en) * | 2004-10-26 | 2009-01-13 | Asm Japan K.K. | Selective formation of metal layers in an integrated circuit |
JP2008091645A (en) * | 2006-10-02 | 2008-04-17 | Tokyo Electron Ltd | Semiconductor manufacturing apparatus, semiconductor device manufacturing method, and storage medium |
WO2008153674A1 (en) | 2007-06-09 | 2008-12-18 | Boris Kobrin | Method and apparatus for anisotropic etching |
JP2009043974A (en) * | 2007-08-09 | 2009-02-26 | Tokyo Electron Ltd | Manufacturing method of semiconductor device, treatment device of semiconductor substrate, and storage medium |
JP5497278B2 (en) | 2008-07-17 | 2014-05-21 | 東京エレクトロン株式会社 | Method and apparatus for anisotropic dry etching of copper |
JP2011171487A (en) * | 2010-02-18 | 2011-09-01 | Tokyo Electron Ltd | Substrate rear surface flattening method |
JP2012054304A (en) | 2010-08-31 | 2012-03-15 | Tokyo Electron Ltd | Etching method and etching apparatus |
JP5811540B2 (en) * | 2011-01-25 | 2015-11-11 | 東京エレクトロン株式会社 | Metal film processing method and processing apparatus |
JP5851951B2 (en) * | 2011-09-21 | 2016-02-03 | 東京エレクトロン株式会社 | Etching method, etching apparatus, and storage medium |
JP5764445B2 (en) * | 2011-09-21 | 2015-08-19 | 東京エレクトロン株式会社 | Manufacturing method of semiconductor device |
-
2014
- 2014-06-30 US US14/319,927 patent/US10147613B2/en active Active
-
2015
- 2015-06-04 JP JP2016570113A patent/JP2017519364A/en active Pending
- 2015-06-04 WO PCT/US2015/034170 patent/WO2016003591A1/en active Application Filing
- 2015-06-04 EP EP15814512.8A patent/EP3161860A4/en not_active Withdrawn
- 2015-06-04 KR KR1020167036145A patent/KR102317702B1/en active IP Right Grant
- 2015-06-04 SG SG11201609094SA patent/SG11201609094SA/en unknown
- 2015-06-26 TW TW104120679A patent/TWI648781B/en active
-
2019
- 2019-11-11 JP JP2019203850A patent/JP6936935B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP3161860A4 (en) | 2018-03-21 |
TW201612970A (en) | 2016-04-01 |
WO2016003591A1 (en) | 2016-01-07 |
JP6936935B2 (en) | 2021-09-22 |
US10147613B2 (en) | 2018-12-04 |
KR102317702B1 (en) | 2021-10-25 |
US20150380271A1 (en) | 2015-12-31 |
JP2020036040A (en) | 2020-03-05 |
TWI648781B (en) | 2019-01-21 |
EP3161860A1 (en) | 2017-05-03 |
JP2017519364A (en) | 2017-07-13 |
KR20170023850A (en) | 2017-03-06 |
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