SG10201901162PA - Memory controller and application processor for controlling utilization and performance of input/output device and method of operating the memory controller - Google Patents

Memory controller and application processor for controlling utilization and performance of input/output device and method of operating the memory controller

Info

Publication number
SG10201901162PA
SG10201901162PA SG10201901162PA SG10201901162PA SG10201901162PA SG 10201901162P A SG10201901162P A SG 10201901162PA SG 10201901162P A SG10201901162P A SG 10201901162PA SG 10201901162P A SG10201901162P A SG 10201901162PA SG 10201901162P A SG10201901162P A SG 10201901162PA
Authority
SG
Singapore
Prior art keywords
memory controller
address
memory
performance
operating
Prior art date
Application number
SG10201901162PA
Other languages
English (en)
Inventor
Kang Hyun-Joon
Kim Tae-Hun
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SG10201901162PA publication Critical patent/SG10201901162PA/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/657—Virtual address space management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N20/00—Machine learning
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Artificial Intelligence (AREA)
  • Evolutionary Computation (AREA)
  • Medical Informatics (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
SG10201901162PA 2018-02-12 2019-02-11 Memory controller and application processor for controlling utilization and performance of input/output device and method of operating the memory controller SG10201901162PA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020180017059A KR102540964B1 (ko) 2018-02-12 2018-02-12 입출력 장치의 활용도 및 성능을 조절하는 메모리 컨트롤러, 애플리케이션 프로세서 및 메모리 컨트롤러의 동작

Publications (1)

Publication Number Publication Date
SG10201901162PA true SG10201901162PA (en) 2019-09-27

Family

ID=67399862

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201901162PA SG10201901162PA (en) 2018-02-12 2019-02-11 Memory controller and application processor for controlling utilization and performance of input/output device and method of operating the memory controller

Country Status (6)

Country Link
US (1) US10846233B2 (zh)
KR (1) KR102540964B1 (zh)
CN (1) CN110162491B (zh)
DE (1) DE102019103114A1 (zh)
SG (1) SG10201901162PA (zh)
TW (1) TWI791765B (zh)

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US11017842B2 (en) * 2019-08-29 2021-05-25 Micron Technology, Inc. Copy data in a memory system with artificial intelligence mode
US11442631B2 (en) * 2019-12-26 2022-09-13 Micron Technology, Inc. Memory operations with consideration for wear leveling
WO2022018466A1 (en) * 2020-07-22 2022-01-27 Citrix Systems, Inc. Determining server utilization using upper bound values
KR20220032808A (ko) 2020-09-08 2022-03-15 삼성전자주식회사 프로세싱-인-메모리, 메모리 액세스 방법 및 메모리 액세스 장치
TWI768731B (zh) * 2021-02-25 2022-06-21 威盛電子股份有限公司 電腦系統

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Also Published As

Publication number Publication date
US10846233B2 (en) 2020-11-24
CN110162491B (zh) 2023-08-04
KR102540964B1 (ko) 2023-06-07
US20190251038A1 (en) 2019-08-15
KR20190097528A (ko) 2019-08-21
TWI791765B (zh) 2023-02-11
DE102019103114A1 (de) 2019-08-14
CN110162491A (zh) 2019-08-23
TW201937374A (zh) 2019-09-16

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