SE9500525L - Serial data transfer device - Google Patents

Serial data transfer device

Info

Publication number
SE9500525L
SE9500525L SE9500525A SE9500525A SE9500525L SE 9500525 L SE9500525 L SE 9500525L SE 9500525 A SE9500525 A SE 9500525A SE 9500525 A SE9500525 A SE 9500525A SE 9500525 L SE9500525 L SE 9500525L
Authority
SE
Sweden
Prior art keywords
data
processing unit
data processing
parallel
transmission
Prior art date
Application number
SE9500525A
Other languages
Unknown language ( )
Swedish (sv)
Other versions
SE9500525D0 (en
Inventor
Stig Borg
Erik Johnsson
Henrik Malmstroem
Original Assignee
Essnet Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Essnet Ab filed Critical Essnet Ab
Priority to SE9500525A priority Critical patent/SE9500525L/en
Publication of SE9500525D0 publication Critical patent/SE9500525D0/en
Priority to PCT/SE1996/000183 priority patent/WO1996025708A1/en
Priority to AU47359/96A priority patent/AU4735996A/en
Publication of SE9500525L publication Critical patent/SE9500525L/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)

Abstract

In an arrangement for serial data transmission between a first data processing unit (2), arranged for sending parallel data, and a second data processing unit (4), arranged for receiving parallel data, the parallel data is converted to serial form and is then converted back to parallel form, a status signal being transmitted from the second data processing unit (4) to the first data processing unit (2) and indicating whether the said second data processing unit (4) is in data-receive status or not. The data transmission arrangement comprises a first interface unit (6) which is arranged for converting parallel data to serial data and for control signal transmission, and a second interface unit (8) which can be connected to the second data processing unit (4) and which is arranged for converting serial data to parallel data and for control signal transmission. The two said interface units (6) and (8) can be connected to one another by means of a signal transmission member (22) arranged for transmitting data signals and control signals. The status signal can be transmitted in real time to a data processor in the first data processing unit (2), the transmission of data being adapted according to the status of the second data processing unit (4).
SE9500525A 1995-02-13 1995-02-13 Serial data transfer device SE9500525L (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
SE9500525A SE9500525L (en) 1995-02-13 1995-02-13 Serial data transfer device
PCT/SE1996/000183 WO1996025708A1 (en) 1995-02-13 1996-02-13 Arrangement for serial data transmission
AU47359/96A AU4735996A (en) 1995-02-13 1996-02-13 Arrangement for serial data transmission

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9500525A SE9500525L (en) 1995-02-13 1995-02-13 Serial data transfer device

Publications (2)

Publication Number Publication Date
SE9500525D0 SE9500525D0 (en) 1995-02-13
SE9500525L true SE9500525L (en) 1996-08-14

Family

ID=20397201

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9500525A SE9500525L (en) 1995-02-13 1995-02-13 Serial data transfer device

Country Status (3)

Country Link
AU (1) AU4735996A (en)
SE (1) SE9500525L (en)
WO (1) WO1996025708A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115686164A (en) * 2021-07-26 2023-02-03 瑞昱半导体股份有限公司 Power supply terminal device, power supply system and non-transitory computer readable medium

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3879723A (en) * 1972-12-21 1975-04-22 Transign Inc Destination sign system using liquid crystal display devices
DE2813383A1 (en) * 1978-03-28 1979-10-11 Siemens Ag DATA TRANSMITTING/RECEIVING EQUIPMENT WITH PARALLEL/SERIAL AND SERIAL/PARALLEL CHARACTER CONVERSION, IN PARTICULAR FOR DATA EXCHANGE BETWEEN COMMUNICATING DATA PROCESSING SYSTEMS
US4276640A (en) * 1979-07-02 1981-06-30 General Motors Corporation Noise tolerant multiplex system
US4393464A (en) * 1980-12-12 1983-07-12 Ncr Corporation Chip topography for integrated circuit communication controller
NL8503476A (en) * 1985-12-18 1987-07-16 Philips Nv BUS SYSTEM.
DE3902849A1 (en) * 1989-02-01 1990-08-02 Vdo Schindling Circuit arrangement for exchange of data between two microcomputers
JPH034351A (en) * 1989-04-26 1991-01-10 Dubner Computer Syst Inc System-bus-data-link device
CA2017458C (en) * 1989-07-24 2000-10-10 Jonathan R. Engdahl Intelligent network interface circuit
US5455923A (en) * 1992-07-30 1995-10-03 Kaplinsky; Cecil H. Memory system for loading peripherals on power up

Also Published As

Publication number Publication date
WO1996025708A1 (en) 1996-08-22
SE9500525D0 (en) 1995-02-13
AU4735996A (en) 1996-09-04

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