SE9000245L - SEMICONDUCTOR COMPONENT AND PROCEDURE FOR ITS PREPARATION - Google Patents

SEMICONDUCTOR COMPONENT AND PROCEDURE FOR ITS PREPARATION

Info

Publication number
SE9000245L
SE9000245L SE9000245A SE9000245A SE9000245L SE 9000245 L SE9000245 L SE 9000245L SE 9000245 A SE9000245 A SE 9000245A SE 9000245 A SE9000245 A SE 9000245A SE 9000245 L SE9000245 L SE 9000245L
Authority
SE
Sweden
Prior art keywords
procedure
preparation
semiconductor component
layer
substrate
Prior art date
Application number
SE9000245A
Other languages
Unknown language ( )
Swedish (sv)
Other versions
SE465492B (en
SE9000245D0 (en
Inventor
P Svedberg
Original Assignee
Asea Brown Boveri
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asea Brown Boveri filed Critical Asea Brown Boveri
Priority to SE9000245A priority Critical patent/SE465492B/en
Publication of SE9000245D0 publication Critical patent/SE9000245D0/en
Priority to EP19910903273 priority patent/EP0513100A1/en
Priority to PCT/SE1991/000029 priority patent/WO1991011822A1/en
Priority to JP50384891A priority patent/JPH05503812A/en
Publication of SE9000245L publication Critical patent/SE9000245L/en
Publication of SE465492B publication Critical patent/SE465492B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

A semiconductor device has a substrate and an active layer (5) of silicon arranged on the substrate, in which active layer the active parts of the device are formed. Between the substrate (1) and the active layer (5), a layer (3) of diamond is arranged and between the diamond layer and the active layer, a layer (4) of silicon dioxide is arranged.
SE9000245A 1990-01-24 1990-01-24 Semiconductor component containing a diamond layer arranged between a substrate and an active layer and process prior to its preparation SE465492B (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
SE9000245A SE465492B (en) 1990-01-24 1990-01-24 Semiconductor component containing a diamond layer arranged between a substrate and an active layer and process prior to its preparation
EP19910903273 EP0513100A1 (en) 1990-01-24 1991-01-17 Semiconductor device and method for its manufacture
PCT/SE1991/000029 WO1991011822A1 (en) 1990-01-24 1991-01-17 Semiconductor device and method for its manufacture
JP50384891A JPH05503812A (en) 1990-01-24 1991-01-17 Semiconductor device and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9000245A SE465492B (en) 1990-01-24 1990-01-24 Semiconductor component containing a diamond layer arranged between a substrate and an active layer and process prior to its preparation

Publications (3)

Publication Number Publication Date
SE9000245D0 SE9000245D0 (en) 1990-01-24
SE9000245L true SE9000245L (en) 1991-07-25
SE465492B SE465492B (en) 1991-09-16

Family

ID=20378335

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9000245A SE465492B (en) 1990-01-24 1990-01-24 Semiconductor component containing a diamond layer arranged between a substrate and an active layer and process prior to its preparation

Country Status (4)

Country Link
EP (1) EP0513100A1 (en)
JP (1) JPH05503812A (en)
SE (1) SE465492B (en)
WO (1) WO1991011822A1 (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993001617A1 (en) * 1991-07-08 1993-01-21 Asea Brown Boveri Ab Method for the manufacture of a semiconductor component
US5561303A (en) * 1991-11-07 1996-10-01 Harris Corporation Silicon on diamond circuit structure
US5276338A (en) * 1992-05-15 1994-01-04 International Business Machines Corporation Bonded wafer structure having a buried insulation layer
DE69225911T2 (en) * 1992-12-18 1999-02-11 Harris Corp., Melbourne, Fla. SILICON ON DIAMOND CIRCUIT STRUCTURE AND PRODUCTION METHOD THEREFOR
US5272104A (en) * 1993-03-11 1993-12-21 Harris Corporation Bonded wafer process incorporating diamond insulator
US5376579A (en) * 1993-07-02 1994-12-27 The United States Of America As Represented By The Secretary Of The Air Force Schemes to form silicon-on-diamond structure
IT1268123B1 (en) * 1994-10-13 1997-02-20 Sgs Thomson Microelectronics SLICE OF SEMICONDUCTOR MATERIAL FOR THE MANUFACTURE OF INTEGRATED DEVICES AND PROCEDURE FOR ITS MANUFACTURING.
US6171931B1 (en) 1994-12-15 2001-01-09 Sgs-Thomson Microelectronics S.R.L. Wafer of semiconductor material for fabricating integrated devices, and process for its fabrication
EP0720223B1 (en) * 1994-12-30 2003-03-26 STMicroelectronics S.r.l. Process for the production of a semiconductor device having better interface adhesion between dielectric layers
FR2767605B1 (en) * 1997-08-25 2001-05-11 Gec Alsthom Transport Sa INTEGRATED POWER CIRCUIT, METHOD FOR MANUFACTURING SUCH A CIRCUIT, AND CONVERTER INCLUDING SUCH A CIRCUIT
FR2781082B1 (en) * 1998-07-10 2002-09-20 Commissariat Energie Atomique SEMICONDUCTOR THIN-LAYER STRUCTURE HAVING A HEAT-DISTRIBUTING LAYER
US20020089016A1 (en) 1998-07-10 2002-07-11 Jean-Pierre Joly Thin layer semi-conductor structure comprising a heat distribution layer
US6552395B1 (en) * 2000-01-03 2003-04-22 Advanced Micro Devices, Inc. Higher thermal conductivity glass for SOI heat removal
FR3079662B1 (en) * 2018-03-30 2020-02-28 Soitec SUBSTRATE FOR RADIO FREQUENCY APPLICATIONS AND MANUFACTURING METHOD THEREOF

Also Published As

Publication number Publication date
SE465492B (en) 1991-09-16
SE9000245D0 (en) 1990-01-24
EP0513100A1 (en) 1992-11-19
JPH05503812A (en) 1993-06-17
WO1991011822A1 (en) 1991-08-08

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