SE7701858L - Byggstenskoppling med minnestransistorer - Google Patents

Byggstenskoppling med minnestransistorer

Info

Publication number
SE7701858L
SE7701858L SE7701858A SE7701858A SE7701858L SE 7701858 L SE7701858 L SE 7701858L SE 7701858 A SE7701858 A SE 7701858A SE 7701858 A SE7701858 A SE 7701858A SE 7701858 L SE7701858 L SE 7701858L
Authority
SE
Sweden
Prior art keywords
memory transistors
building stone
stone connection
connection
building
Prior art date
Application number
SE7701858A
Other languages
English (en)
Other versions
SE409526B (sv
Inventor
B Rossler
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of SE7701858L publication Critical patent/SE7701858L/sv
Publication of SE409526B publication Critical patent/SE409526B/sv

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/01855—Interface arrangements synchronous, i.e. using clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17712—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays one of the matrices at least being reprogrammable
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/52—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
    • H04Q3/521—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements using semiconductors in the switching stages

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Logic Circuits (AREA)
  • Read Only Memory (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Semiconductor Memories (AREA)
SE7701858A 1976-02-20 1977-02-18 Byggstenskoppling med minnestransistorer SE409526B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19762606958 DE2606958A1 (de) 1976-02-20 1976-02-20 Bausteinschaltung mit speichertransistoren

Publications (2)

Publication Number Publication Date
SE7701858L true SE7701858L (sv) 1977-08-21
SE409526B SE409526B (sv) 1979-08-20

Family

ID=5970471

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7701858A SE409526B (sv) 1976-02-20 1977-02-18 Byggstenskoppling med minnestransistorer

Country Status (12)

Country Link
US (1) US4091359A (sv)
JP (1) JPS52101910A (sv)
AT (1) AT362828B (sv)
BE (1) BE851602A (sv)
CH (1) CH613823A5 (sv)
DE (1) DE2606958A1 (sv)
FR (1) FR2341914A1 (sv)
GB (1) GB1563939A (sv)
IL (1) IL51337A (sv)
IT (1) IT1074302B (sv)
NL (1) NL7701768A (sv)
SE (1) SE409526B (sv)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4307379A (en) * 1977-11-10 1981-12-22 Raytheon Company Integrated circuit component
US4233667A (en) * 1978-10-23 1980-11-11 International Business Machines Corporation Demand powered programmable logic array
US4327355A (en) * 1980-06-23 1982-04-27 Burroughs Corporation Digital device with interconnect matrix
GB2089160B (en) * 1980-12-05 1985-04-17 Rca Corp Programmable logic gates and networks
US4495427A (en) * 1980-12-05 1985-01-22 Rca Corporation Programmable logic gates and networks
JPS5885638A (ja) * 1981-11-17 1983-05-23 Ricoh Co Ltd プログラマブルロジツクアレイ
JPS6050940A (ja) * 1983-08-31 1985-03-22 Toshiba Corp 半導体集積回路
USRE34363E (en) * 1984-03-12 1993-08-31 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
US4870302A (en) * 1984-03-12 1989-09-26 Xilinx, Inc. Configurable electrical circuit having configurable logic elements and configurable interconnects
US4617479B1 (en) * 1984-05-03 1993-09-21 Altera Semiconductor Corp. Programmable logic array device using eprom technology
US4761768A (en) * 1985-03-04 1988-08-02 Lattice Semiconductor Corporation Programmable logic device
US5198705A (en) * 1990-05-11 1993-03-30 Actel Corporation Logic module with configurable combinational and sequential blocks
US5235221A (en) * 1992-04-08 1993-08-10 Micron Technology, Inc. Field programmable logic array with speed optimized architecture
US5384500A (en) * 1992-05-15 1995-01-24 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback and an exclusive external input line for a combinatorial mode and accommodating two separate programmable or planes
US5331227A (en) * 1992-05-15 1994-07-19 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback line and an exclusive external input line
US5300830A (en) * 1992-05-15 1994-04-05 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback and exclusive external input lines for registered and combinatorial modes using a dedicated product term for control
US5220215A (en) * 1992-05-15 1993-06-15 Micron Technology, Inc. Field programmable logic array with two or planes
US5287017A (en) * 1992-05-15 1994-02-15 Micron Technology, Inc. Programmable logic device macrocell with two OR array inputs
US5298803A (en) * 1992-07-15 1994-03-29 Micron Semiconductor, Inc. Programmable logic device having low power microcells with selectable registered and combinatorial output signals
KR960701449A (ko) * 1993-03-17 1996-02-24 더글라스 클린트 랜덤 액세스 메모리에 기초하여 구성할 수 있는 어레이(random access memory(ram) based configurable arrays)
US5936426A (en) * 1997-02-03 1999-08-10 Actel Corporation Logic function module for field programmable array
US6407576B1 (en) 1999-03-04 2002-06-18 Altera Corporation Interconnection and input/output resources for programmable logic integrated circuit devices

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3566153A (en) * 1969-04-30 1971-02-23 Texas Instruments Inc Programmable sequential logic
JPS5026048B1 (sv) * 1969-11-24 1975-08-28
JPS4874757A (sv) * 1971-12-30 1973-10-08
US3816725A (en) * 1972-04-28 1974-06-11 Gen Electric Multiple level associative logic circuits
US4004103A (en) * 1975-10-15 1977-01-18 Bell Telephone Laboratories, Incorporated Path-finding scheme for a multistage switching network

Also Published As

Publication number Publication date
FR2341914A1 (fr) 1977-09-16
JPS52101910A (en) 1977-08-26
US4091359A (en) 1978-05-23
FR2341914B1 (sv) 1982-03-05
AT362828B (de) 1981-06-25
CH613823A5 (sv) 1979-10-15
GB1563939A (en) 1980-04-02
DE2606958A1 (de) 1977-08-25
ATA77077A (de) 1980-11-15
IT1074302B (it) 1985-04-20
IL51337A (en) 1979-05-31
IL51337A0 (en) 1977-03-31
SE409526B (sv) 1979-08-20
NL7701768A (nl) 1977-08-23
BE851602A (fr) 1977-08-18

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