SE7604827L - Forfarande for framstellning av en halvledare jemte halvledare framstelld enligt detta forfarande - Google Patents

Forfarande for framstellning av en halvledare jemte halvledare framstelld enligt detta forfarande

Info

Publication number
SE7604827L
SE7604827L SE7604827A SE7604827A SE7604827L SE 7604827 L SE7604827 L SE 7604827L SE 7604827 A SE7604827 A SE 7604827A SE 7604827 A SE7604827 A SE 7604827A SE 7604827 L SE7604827 L SE 7604827L
Authority
SE
Sweden
Prior art keywords
procedure
manufacturing
semiconductor
semiconductors
manufacturing according
Prior art date
Application number
SE7604827A
Other languages
English (en)
Swedish (sv)
Inventor
D J Mcelroy
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of SE7604827L publication Critical patent/SE7604827L/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/024Defect control-gettering and annealing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/91Controlling charging state at semiconductor-insulator interface

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
SE7604827A 1975-05-01 1976-04-27 Forfarande for framstellning av en halvledare jemte halvledare framstelld enligt detta forfarande SE7604827L (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/573,696 US4061506A (en) 1975-05-01 1975-05-01 Correcting doping defects

Publications (1)

Publication Number Publication Date
SE7604827L true SE7604827L (sv) 1976-11-02

Family

ID=24293034

Family Applications (1)

Application Number Title Priority Date Filing Date
SE7604827A SE7604827L (sv) 1975-05-01 1976-04-27 Forfarande for framstellning av en halvledare jemte halvledare framstelld enligt detta forfarande

Country Status (10)

Country Link
US (1) US4061506A (xx)
JP (1) JPS51134589A (xx)
CA (1) CA1054724A (xx)
DE (1) DE2618550A1 (xx)
FR (1) FR2309978A1 (xx)
GB (1) GB1547428A (xx)
IT (1) IT1058111B (xx)
NL (1) NL7604601A (xx)
RO (1) RO72356A (xx)
SE (1) SE7604827L (xx)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4116721A (en) * 1977-11-25 1978-09-26 International Business Machines Corporation Gate charge neutralization for insulated gate field-effect transistors
US4280271A (en) * 1979-10-11 1981-07-28 Texas Instruments Incorporated Three level interconnect process for manufacture of integrated circuit devices
JPS5693367A (en) * 1979-12-20 1981-07-28 Fujitsu Ltd Manufacture of semiconductor device
US4791074A (en) * 1986-08-29 1988-12-13 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor apparatus
US4796073A (en) * 1986-11-14 1989-01-03 Burr-Brown Corporation Front-surface N+ gettering techniques for reducing noise in integrated circuits

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3541543A (en) * 1966-07-25 1970-11-17 Texas Instruments Inc Binary decoder
GB1244225A (en) * 1968-12-31 1971-08-25 Associated Semiconductor Mft Improvements in and relating to methods of manufacturing semiconductor devices
JPS5226433B2 (xx) * 1971-09-18 1977-07-14
US3789504A (en) * 1971-10-12 1974-02-05 Gte Laboratories Inc Method of manufacturing an n-channel mos field-effect transistor
US3914855A (en) * 1974-05-09 1975-10-28 Bell Telephone Labor Inc Methods for making MOS read-only memories
JPS605062B2 (ja) * 1974-09-26 1985-02-08 株式会社東芝 半導体論理回路装置

Also Published As

Publication number Publication date
JPS51134589A (en) 1976-11-22
US4061506A (en) 1977-12-06
DE2618550A1 (de) 1976-11-11
NL7604601A (nl) 1976-11-03
CA1054724A (en) 1979-05-15
FR2309978A1 (fr) 1976-11-26
DE2618550C2 (xx) 1991-09-05
FR2309978B1 (xx) 1980-01-25
GB1547428A (en) 1979-06-20
RO72356A (ro) 1981-06-26
IT1058111B (it) 1982-04-10
JPS5634100B2 (xx) 1981-08-07

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