SE382709B - Kapacitivt matrisminne, der varje sasom en tvapol uppbyggt korsningspunktselement innefattar en transistor. - Google Patents
Kapacitivt matrisminne, der varje sasom en tvapol uppbyggt korsningspunktselement innefattar en transistor.Info
- Publication number
- SE382709B SE382709B SE7115035A SE1503571A SE382709B SE 382709 B SE382709 B SE 382709B SE 7115035 A SE7115035 A SE 7115035A SE 1503571 A SE1503571 A SE 1503571A SE 382709 B SE382709 B SE 382709B
- Authority
- SE
- Sweden
- Prior art keywords
- everything
- transistor
- element includes
- crossing point
- point element
- Prior art date
Links
- 239000011159 matrix material Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/10—DRAM devices comprising bipolar components
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Electronic Switches (AREA)
- Static Random-Access Memory (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL7017342.A NL165601C (nl) | 1970-11-27 | 1970-11-27 | Geintegreerd capacitief matrixgeheugen. |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| SE382709B true SE382709B (sv) | 1976-02-09 |
Family
ID=19811655
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| SE7115035A SE382709B (sv) | 1970-11-27 | 1971-11-24 | Kapacitivt matrisminne, der varje sasom en tvapol uppbyggt korsningspunktselement innefattar en transistor. |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US3761900A (en:Method) |
| JP (1) | JPS5244182B1 (en:Method) |
| CA (1) | CA979526A (en:Method) |
| FR (1) | FR2115442B1 (en:Method) |
| GB (1) | GB1375993A (en:Method) |
| IT (1) | IT941288B (en:Method) |
| NL (1) | NL165601C (en:Method) |
| SE (1) | SE382709B (en:Method) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5434227U (en:Method) * | 1977-08-10 | 1979-03-06 | ||
| US4621205A (en) * | 1984-01-16 | 1986-11-04 | Hewlett-Packard Company | Method and apparatus for reducing varactor noise |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FI1A (fi) * | 1842-06-29 | Blåsmaskiner av järn | ||
| US3490007A (en) * | 1965-12-24 | 1970-01-13 | Nippon Electric Co | Associative memory elements using field-effect transistors |
| US3448344A (en) * | 1966-03-15 | 1969-06-03 | Westinghouse Electric Corp | Mosaic of semiconductor elements interconnected in an xy matrix |
| US3387286A (en) * | 1967-07-14 | 1968-06-04 | Ibm | Field-effect transistor memory |
| US3532945A (en) * | 1967-08-30 | 1970-10-06 | Fairchild Camera Instr Co | Semiconductor devices having a low capacitance junction |
| JPS4844581B1 (en:Method) * | 1969-03-15 | 1973-12-25 | ||
| US3533089A (en) * | 1969-05-16 | 1970-10-06 | Shell Oil Co | Single-rail mosfet memory with capacitive storage |
-
1970
- 1970-11-27 NL NL7017342.A patent/NL165601C/xx not_active IP Right Cessation
-
1971
- 1971-11-22 US US00200791A patent/US3761900A/en not_active Expired - Lifetime
- 1971-11-23 CA CA128,328A patent/CA979526A/en not_active Expired
- 1971-11-24 IT IT31562/71A patent/IT941288B/it active
- 1971-11-24 GB GB5458771A patent/GB1375993A/en not_active Expired
- 1971-11-24 SE SE7115035A patent/SE382709B/xx unknown
- 1971-11-26 FR FR7142489A patent/FR2115442B1/fr not_active Expired
- 1971-11-27 JP JP46095749A patent/JPS5244182B1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| NL7017342A (en:Method) | 1972-05-30 |
| CA979526A (en) | 1975-12-09 |
| NL165601C (nl) | 1981-04-15 |
| FR2115442A1 (en:Method) | 1972-07-07 |
| FR2115442B1 (en:Method) | 1976-12-03 |
| US3761900A (en) | 1973-09-25 |
| IT941288B (it) | 1973-03-01 |
| DE2155263A1 (de) | 1972-06-08 |
| NL165601B (nl) | 1980-11-17 |
| DE2155263B2 (de) | 1977-03-03 |
| GB1375993A (en) | 1974-12-04 |
| JPS5244182B1 (en:Method) | 1977-11-05 |
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