SE352480B - - Google Patents

Info

Publication number
SE352480B
SE352480B SE14114/68A SE1411468A SE352480B SE 352480 B SE352480 B SE 352480B SE 14114/68 A SE14114/68 A SE 14114/68A SE 1411468 A SE1411468 A SE 1411468A SE 352480 B SE352480 B SE 352480B
Authority
SE
Sweden
Application number
SE14114/68A
Inventor
Velde T Te
A Schmitz
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of SE352480B publication Critical patent/SE352480B/xx

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Luminescent Compositions (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
SE14114/68A 1967-10-21 1968-10-18 SE352480B (xx)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL6714336A NL6714336A (xx) 1967-10-21 1967-10-21

Publications (1)

Publication Number Publication Date
SE352480B true SE352480B (xx) 1972-12-27

Family

ID=19801524

Family Applications (1)

Application Number Title Priority Date Filing Date
SE14114/68A SE352480B (xx) 1967-10-21 1968-10-18

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Country Link
US (1) US3579056A (xx)
BE (1) BE722669A (xx)
BR (1) BR6803288D0 (xx)
CH (1) CH496322A (xx)
DE (1) DE1803138A1 (xx)
ES (1) ES359345A1 (xx)
FR (1) FR1591647A (xx)
GB (1) GB1250815A (xx)
NL (1) NL6714336A (xx)
SE (1) SE352480B (xx)

Families Citing this family (20)

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US3777220A (en) * 1972-06-30 1973-12-04 Ibm Circuit panel and method of construction
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BR6803288D0 (pt) 1973-01-04
NL6714336A (xx) 1969-04-23
GB1250815A (xx) 1971-10-20
BE722669A (xx) 1969-04-21
CH496322A (de) 1970-09-15
DE1803138A1 (de) 1969-06-04
ES359345A1 (es) 1970-08-16
FR1591647A (xx) 1970-05-04
US3579056A (en) 1971-05-18

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