RU2723982C1 - Semiconductor device manufacturing method - Google Patents

Abstract

FIELD: electricity.SUBSTANCE: invention relates to production of semiconductor devices, particularly, to manufacturing of field-effect transistor with low values of leakage currents. Disclosed method of making a semiconductor device by forming a layer of gate oxide with deposition rate of 1.2 nm/s at temperature of 900 °C in a mixture of silane and carbon dioxide at ratio of 1:100 in a stream of hydrogen 24 l/min, with subsequent heat treatment at temperature of 830 °C for 5 minutes in an inert medium, increases percentage output of non-defective devices and improves their reliability.EFFECT: method of manufacturing a semiconductor device is disclosed.1 cl, 1 tbl

Description

The invention relates to the field of production technology of semiconductor devices, in particular to the manufacturing technology of a field effect transistor with reduced leakage currents.

A known method of manufacturing a semiconductor device [Application 2133929 Japan, MKI H01L 21/336] using a thick layer of insulating oxide around the active structure and a heavily doped layer under this oxide to reduce leakage. The region of the p-substrate for the formation of the source-channel-drain is protected with an anti-oxidation mask, As is implanted to form a heavily doped layer and deep oxidation is used for isolation. Next, boron B is implanted to dope the channel layer, a gate electrode is formed, As is implanted to create source and drain areas, as well as operations to form a contact-metallization system. In such devices, a large number of defects are formed that degrade the electrical parameters of the devices.

A known method of manufacturing a semiconductor device [US Pat. 5134452 USA, MKI H01L 29/78] by deposition on the protective oxide layer and on the open silicon surface with the source and drain regions of a layer of conductive polysilicon, from which source and drain electrodes are then formed. After opening the channel region, reactive ion etching is carried out with the formation of a rough surface with roughness sizes up to 50 nm. Then, a thin gate oxide is created above the channel region using PFHO and a gate is formed.

The disadvantages of this method are:

- high leakage currents;

- increased density of defects;

- low manufacturability.

The problem solved by the invention: reducing leakage currents, ensuring manufacturability, improving instrument parameters, improving quality and increasing yield.

The problem is solved by that. that a gate oxide layer is formed with a deposition rate of 1.2 nm / s at a temperature of 900 ° C in a mixture of silane and carbon dioxide in a ratio of 1: 100 in a hydrogen stream of 24 l / min, followed by heat treatment at a temperature of 830 ° C for 5 min in an inert environment.

The technology of the method consists in the following: on a silicon substrate a layer of gate silicon oxide is formed with a deposition rate of 1.2 nm / s at a temperature of 900 ° C in a mixture of silane and carbon dioxide in a ratio of 1: 100 in a hydrogen stream of 24 l / min, followed by heat treatment at a temperature of 830 ° C for 5 min in an inert atmosphere.

Then, the active areas of the field-effect transistor and their electrodes were formed using standard technology.

According to the proposed method, semiconductor devices were manufactured and investigated. The processing results are presented in the table.

Experimental studies have shown that the yield of suitable structures on a batch of plates formed in the optimal mode increased by 20.3%.

Effect: reducing leakage currents, ensuring manufacturability, improving the parameters of devices, improving quality and increasing the percentage of yield.

The stability of the parameters over the entire operating temperature range was normal and consistent with the requirements.

Claims (1)

A method of manufacturing a semiconductor device with a substrate, including implantation processes, applying a gate oxide layer and the formation of active regions of the transistor, characterized in that the gate oxide layer is formed at a temperature of 900 ° C in a mixture of silane and carbon dioxide in a ratio of 1: 100 in a hydrogen stream of 24 l / min, with a deposition rate of 1.2 nm / s, followed by heat treatment at a temperature of 830 ° C for 5 min in an inert atmosphere.