RU2637728C2 - Excitation method for image fixing device and image fixing device - Google Patents

Abstract

FIELD: physics.

SUBSTANCE: image fixing device and methods of excitating an image fixing device are disclosed. The pixel part of the device includes a plurality of the first pixel rows and a plurality of the second pixel rows, each of which is arranged in such a way that it is adjacent to the first pixel row. From the first pixel row and the second pixel row arranged in such a way that they are adjacent to each other for, at least, a part of the period from the accumulation period end of the electric charge in the second pixel row to the end of the output period, in which signals from the pixels in the first pixel row are output, the electric charges accumulated in the photoelectric conversion units of the pixels in the second pixel row are reset. The first pixel row includes an image fixing pixel, and the second pixel row includes a focus detecting pixel.

EFFECT: improving the quality of image fixation while reducing the effect of interference and adverse conditions.

20 cl, 12 dwg

Description

State of the art

FIELD OF THE INVENTION

[0001] The present invention relates to a configuration in which signals are read together for each pixel group in an image pickup apparatus including a plurality of pixel groups.

Description of the Related Art

[0002] An image pickup apparatus is proposed in which a pixel group consisting of rows of pixels of image pickups and a pixel group consisting of rows of pixels of focus detection are provided on the image pickup surface and corresponding signals are read. As an example of the above image capturing apparatus, Japanese Patent Laid-Open No. 2010-074243 describes an image capturing apparatus in which lines of image capturing pixels are jointly scanned by skipping lines of focus detection pixels, and then lines of focus detection pixels are jointly scanned.

SUMMARY OF THE INVENTION

[0003] An image pickup apparatus according to an aspect of the present invention includes a pixel portion in which a plurality of pixels including a photoelectric conversion unit are arranged in a matrix, and outputs signals based on electric charges generated during periods of electric charge accumulation by sequential scanning of rows pixels, while the periods of electric charge accumulation of the respective pixels are controlled by the operation of the electronic shutter, with the peak the unit part includes a first pixel group including a plurality of rows of first pixels and a second pixel group including a plurality of rows of second pixels, each of which is arranged in such a way that it is adjacent to a row of first pixels, periods of electric charge accumulation rows of first pixels and rows of second pixels, which are arranged in such a way that they are adjacent to each other, are controlled in such a way that after the periods of electric charge accumulation correspond of the existing photovoltaic conversion nodes included in one row of pixels are completed, the periods of electric charge accumulation of the corresponding photovoltaic conversion nodes included in another row of pixels begin, signals in a plurality of rows of the first pixels and signals in a plurality of rows of the second pixels are displayed pixels of the second pixel group after the plurality of rows of the first pixels of the first pixel group in series with canceled, and from the row of first pixels and rows of second pixels, which are arranged so that they are adjacent to each other, for at least part of the period from the end of the period of accumulation of electric charge in the row of second pixels to the end of the output period in which the signals pixels in the line of the first pixels are completed, the electric charges accumulated in the nodes of the photoelectric conversion of pixels in the line of the second pixels are reset.

[0004] Further features of the present invention will become apparent from the following description of exemplary embodiments with reference to the accompanying drawings.

Brief Description of the Drawings

[0005] FIG. 1 is a block diagram of an image capturing apparatus.

[0006] FIG. 2 is a pixel circuit diagram.

[0007] FIG. 3 is an explanatory diagram for describing a pixel portion.

[0008] FIG. 4 is a reading sequence diagram.

[0009] FIG. 5 is a timing excitation diagram for describing a problem.

[0010] FIG. 6 is an excitation timing chart according to a first exemplary embodiment.

[0011] FIG. 7 is an excitation timing chart according to a second exemplary embodiment.

[0012] FIG. 8 is a timing diagram of a drive according to a third exemplary embodiment.

[0013] FIG. 9 is an excitation timing chart according to a fourth exemplary embodiment.

[0014] FIG. 10 is an excitation timing chart according to a fifth exemplary embodiment.

[0015] FIG. 11 is an excitation timing chart according to a sixth exemplary embodiment.

[0016] FIG. 12 illustrates a fluctuation in the electric potential of FD according to a sixth exemplary embodiment.

Detailed Description of Embodiments

[0017] Hereinafter, an image capturing apparatus according to exemplary embodiments of the present invention is described with reference to the drawings. Components with similar functions are assigned identical reference numbers in the drawings. In addition, duplicate descriptions are omitted in exemplary embodiments.

First Exemplary Embodiment

[0018] With reference to FIG. 1-6, an image fixing apparatus 10 according to the present exemplary embodiment is described. The configuration of the image capturing apparatus described with reference to FIG. 1 and FIG. 2 may also apply to other exemplary embodiments.

[0019] FIG. 1 is a block diagram of an image capturing apparatus 10 according to the present embodiment. The image capturing apparatus 10 includes a pixel portion 100, a control unit 160, a vertical scanning circuit 120, a signal line 115, a column circuit 140, a horizontal scanning circuit 150, and an output section 170.

[0020] The pixel portion 100 includes a plurality of pixels 101, configured to convert light to an electric charge signal and output a converted electric signal. A plurality of pixels 101 are arranged in a matrix.

[0021] The control unit 160 generates a control pulse. The vertical scanning circuit 120 receives a control pulse from the control unit 160 and supplies driving pulses to the respective pixel lines V1-Vn. The driving pulses of the control unit include a driving pulse pTX for driving a transfer transistor, which is described below, a driving pulse pRES for driving a reset transistor, and a driving pulse pSEL for driving a selection transistor. The column circuit 140 includes an analog-to-digital (AD) conversion unit, and the analog-to-digital conversion unit converts a pixel signal corresponding to an analog signal output from a single pixel to a digital signal. The horizontal scan circuit 150 outputs signals processed in parallel in the column circuit 140 to an output unit 170 for each column. It should be noted that the column circuit 140 may include an amplifier and a noise reduction circuit in addition to the components described above.

[0022] FIG. 2 illustrates an example of an equivalent pixel circuit. According to the present exemplary embodiment, the electrons are used as signal charges, and descriptions are provided provided that each transistor consists of a transistor with an n-type channel. However, it should be noted that holes can be used as signal charges, and a transistor with a p-type channel can be used as a pixel transistor.

[0023] In addition, the equivalent circuit is not limited to this, and part of the configuration can be shared by a plurality of pixels.

[0024] The pixel 101 includes a photoelectric conversion unit 103, a transfer transistor 104, a reset transistor 105, a boost transistor 106, a floating diffusion region 108 (hereinafter referred to as “FD”), and a select transistor 107.

[0025] The photoelectric conversion unit 103 generates a magnitude of a pair of electric charges in accordance with the amount of incident light through the photoelectric conversion and accumulates electrons. A photodiode is used, for example, as the photoelectric conversion unit 103.

[0026] The transfer transistor 104 transfers the electrons stored in the photoelectric conversion unit 103 to FD 108. An excitation pulse pTX is supplied to the gate of the transfer transistor 104, and the on state and off state are switched. FD 108 holds electrons carried by the transfer transistor 104.

[0027] The gate of the amplifying transistor 106 is connected to the FD 108. The amplifying transistor 106 amplifies the signal based on the electrons transferred by the transfer transistor 104 to the FD 108, and outputs the amplified signal. More specifically, the electrons transferred to the FD 108 are converted to voltage in accordance with their number, and the electric signal in accordance with the voltage is output to the signal line 115 through the amplifying transistor 106. The amplifying transistor 106 makes a source follower circuit together with a current source that is not illustrated in the drawings.

[0028] The reset transistor 105 resets the electric potential of the input node of the amplifying transistor 106. In addition, the reset operation is performed to reset the electric charges accumulated in the photoelectric conversion unit 103 (resetting the photoelectric conversion unit 103 at a predetermined electric potential) by closing the on-period of the transistor 105 reset with a turn-on period of the transfer transistor 104. An excitation pulse pRES is supplied to the gate of the reset transistor 105, and the on state and off state are switched. However, it should be noted that a configuration is adapted in this document in which the photoelectric conversion unit 103 is reset via the transfer transistor 104, but a configuration in which the reset transistor 105 is directly connected to the photoelectric conversion unit 103 to reset the unit 103 can also be adapted. photoelectric conversion.

[0029] The selection transistor 107 outputs signals of a plurality of pixels 101 located relative to one signal line 115 for a single pixel or for a plurality of pixels. The drain of the selection transistor 107 is connected to the source of the amplifying transistor 106, and the source of the selection transistor 107 is connected to the signal line 115.

[0030] As an alternative to the configuration according to the present exemplary embodiment, a selection transistor 107 may be provided between the drain of the amplifying transistor 106 and a power line to which a supply voltage is supplied. The selection transistor 107 may be arranged such that the electrically conductive state between the amplifying transistor 106 and the signal line 115 is controlled. An excitation pulse pSEL is supplied to the gate of the selection transistor 107, and the on state and off state of the selection transistor 107 are switched.

[0031] It should be noted that the selection transistor 107 may be omitted. In such a configuration, the source of the amplifying transistor 106 is connected to the signal line 115 to switch the electric potential of the drain of the amplifying transistor 106 or the gate of the amplifying transistor 106 so that the selected state and unselected state are switched. The same also applies to the following respective exemplary embodiments.

[0032] Next, with reference to FIG. 3, an arrangement of a plurality of pixel rows V1-Vn in a pixel portion 100 is described. FIG. 3, 12 lines (V1-V12) of pixels are described as an example. In the pixel portion 100, a row of first pixels is arranged in which pixels configured to receive an image are arranged to form a row 201 (hereinafter, referred to as a “row of image fixing pixels”), and a row of second pixels in which pixels configured to receive a focus detection signal are arranged to form a line 202 (hereinafter, referred to as a "line of focus detection pixels"). Pixels configured to receive an image are image capturing pixels, and pixels configured to receive a focus detection signal are focus detection pixels. A plurality of lines of image capturing pixels and a plurality of lines of focus detection pixels are arranged. A plurality of lines 201 of image capturing pixels constitute a first pixel group (hereinafter, referred to as a “pixel group of image fixing”), and a plurality of lines 202 pixels of focus detection constitute a second pixel group (hereinafter referred to as a “pixel group” focus detection "). According to the present exemplary embodiment, as illustrated in FIG. 3, a line 202 of pixels for detecting focus is arranged such that it is adjacent to a line 201 of pixels for capturing images. In addition, according to the present exemplary embodiment, the number of lines of focus detection pixels is lower than the number of lines of image fixing pixels, and a plurality of lines (V5-V7) of image fixing pixels are arranged between two lines (V4 and V8) of focus detection pixels.

[0033] FIG. 3, three rows of V4, V8, and V12 pixels correspond to lines of focus detection pixels, and other lines of pixels correspond to lines of pixels of image capturing. A row of image capturing pixels is constituted by including image capturing pixels, and a row of focus detection pixels is constituted by including focus detection pixels. The row of image capturing pixels may also include pixels for another purpose (e.g., focus detection pixels) in addition to image capturing pixels, but in this case, the number of image capturing pixels is higher than the number of pixels for another purpose. Similarly, a row of focus detection pixels may also include pixels for another purpose (e.g., image capture pixels) in addition to focus detection pixels, but in this case, the number of focus detection pixels is higher than the number of pixels for another target.

[0034] One focus direction pixel corresponds to one microlens, and a configuration can be used in which the photoelectric conversion unit is divided into many areas (or many photoelectric conversion units are provided so that they correspond to one microlens), or a configuration in which light is shielded in parts of the photovoltaic conversion assembly. Focus detection based on determining a phase difference in the prior art can be performed by using focus detection pixel signals.

[0035] FIG. 4 illustrates reading sequences of signals of respective pixel groups illustrated in FIG. 3. In FIG. 4, the vertical direction represents pixel line numbers, and the horizontal direction represents time. Rows of pixels are placed in this declared order of numbers when viewed from above. According to the present exemplary embodiment, the electric charge accumulation period Ts is controlled by operating the electronic shutter in the pixel portion 100. According to the present exemplary embodiment, when the focus is concentrated on one pixel or one row of pixels, the electric charge accumulation period begins by resetting the photoelectric conversion unit of the pixel, and after the expiration of a predetermined period, the period of accumulation of electric charge ends in the middle Twomey transfer of electric charges of the photoelectric conversion unit.

[0036] The electric charge accumulation period of each of the plurality of lines of image fixing pixels begins by sequentially resetting the electric charges accumulated in the photoelectric conversion unit of the pixel in each of the lines of image fixing pixels for each line. Then, the electric charge accumulation period of each of the plurality of lines of image fixing pixels is completed by sequentially transferring the electric charges accumulated in the photoelectric conversion unit of the pixel in each of the lines of image fixing pixels for each line.

[0037] On the other hand, the electric charge accumulation period of each of the plurality of lines of focus detection pixels begins by sequentially resetting the electric charges accumulated in the photoelectric conversion unit of the pixel in each of the lines of focus detection pixels for each line. Then, the electric charge accumulation period of each of the plurality of lines of focus detection pixels is completed by sequentially transferring the electric charges accumulated in the photoelectric conversion unit of the pixel in each of the lines of focus detection pixels for each line.

[0038] After the electric charge accumulation period ends, a plurality of pixel lines are sequentially scanned for each line, and signals based on electric charges generated in the photoelectric conversion nodes during the electric charge accumulation period are sequentially output to the signal line 115 for each line pixels. Further in this document, the period from the point in time when the period of accumulation of electric charge in a predetermined row of pixels ends to the point in time when the output of a signal based on electric charges generated in each of the nodes of the photoelectric conversion in a predetermined row of pixels into a signal line 115, terminated, is referred to as a “Top Output Period” for signals. The period indicated by the start point and end point of the arrow in FIG. 4 represents the period obtained by combining the electric charge accumulation period Ts with the output period Top in each row.

[0039] FIG. 4, a period including the beginning of an electric charge accumulation period in all rows of pixels constituting the pixel portion 100, and the end of the output period is set as a period of one frame. In case the plurality of frame periods are continuous, the respective periods are represented as a first frame period FR1 and a second frame period FR2. It should be noted that the frame period FR3 and subsequent frame periods are omitted in FIG. four.

[0040] The first period S1 and the second period S2 are set in the first frame period (in FR1), and the third period S3 and the fourth period S4 are set in the second frame period (in FR2). The first period S1 and the third period S3 correspond to a period in which a read operation for the image capturing pixel group is performed when a line of focus detection pixels 202 is skipped. The second period S2 and the fourth period S4 correspond to the period in which the read operation is performed for the focus detection pixel group, and the read operation is not performed in the first period S1 and the third period S3. In this case, the above-described frame periods are repeated for a predetermined period so that it is possible to shoot a movie.

[0041] The read operation described herein means an operation during the period from the beginning of the accumulation period Ts in a predetermined pixel row (more specifically, the beginning of the reset period Tres) to the end of the Top output period. Therefore, in the example of FIG. 4, a period of one frame corresponds to the period from the beginning of the accumulation period Ts in all rows of pixels constituting the pixel portion 100 (more specifically, the beginning of the reset period Tres), to the end of the top output period. The first period S1 and the third period S3 correspond to the period from the beginning of the accumulation period Ts in the plurality of rows of the first pixels (more specifically, the beginning of the reset period Tres) to the end of the output period Top. Similarly, the second period S2 and the fourth period S4 correspond to the beginning of the accumulation period Ts in the plurality of rows of second pixels (more specifically, the beginning of the reset period Tres) to the end of the output period Top.

[0042] FIG. 5 parts in which a line 201 of image capturing pixels and a line of 202 focus detection pixels are arranged to be adjacent to each other (pixel lines V3-V5 in FIG. 4) are extracted from the signal reading sequence for the pixel lines illustrated in FIG. 4, and the problem of the present exemplary embodiment is described. The vertical direction in FIG. 5 represents the driving pulses of the respective pixel rows V3-V5, and the horizontal direction represents the expiration of time. The horizontal scanning period HD is set by means of a horizontal synchronous pulse. The pixel selection transistor 101, from which a signal is read, read from the image pickup device during the HD horizontal scanning period, is turned on during the HD horizontal scanning period.

[0043] FIG. 5, the respective transistors are turned on during the period in which the respective drive pulses are at a high level. During the period indicated by the solid line in the excitation pulses of the respective transistors, corresponding excitation pulses (pRES, pTX and pSEL) from the vertical scanning circuit 120 are supplied to the corresponding transistors in the pixel row. Corresponding signals are not supplied from the vertical scanning circuit 120 for a period indicated by a dotted line, which means that the electrical potentials of the respective control lines are supported by stray capacitances. However, it should be noted that an exciting pulse can be supplied from the vertical scanning circuit 120 even during the period indicated by the dotted line.

[0044] First, at time t0, the first horizontal scanning period HD1 begins by means of a horizontal synchronous pulse. At this time, the driving pulse pRES3 and the driving pulse pTX3 in the pixel row V3 are switched to a high level. Then, at t1, the drive pulse pRES3 and the drive pulse pTX3 switch to a low level. Accordingly, the photoelectric conversion unit 103 is reset, the electric charge accumulation period Ts of the photoelectric conversion unit 103 of each of the pixels constituting the pixel row V3 starts. In other words, the time t1 is the initial time of the electric charge accumulation period Ts in the pixel row V3.

[0045] The period t0-t1 corresponds to a reset period Tres in which a reset operation of the photoelectric conversion unit 103 is performed. Although not illustrated in FIG. 5, pixel signals in a predetermined pixel row (for example, pixel row V1 in FIG. 4) may be output to the outside of the image pickup apparatus by the horizontal scanning circuit 150 during a portion of the first horizontal scanning period HD1 in some cases. At time t2, the first horizontal scanning period HD1 is completed.

[0046] At time t3, the second horizontal scanning period HD2 begins. At this time, the driving pulse pRES5 and the driving pulse pTX5 in the pixel row V5 are switched to a high level. Then, at time t4, the excitation pulse pRES5 and the excitation pulse pTX5 switch to a low level. Accordingly, the photoelectric conversion unit 103 is reset, and the electric charge accumulation period Ts in the pixel photoelectric conversion unit in the pixel row V5 starts. In other words, the time t4 corresponds to the initial time of the electric charge accumulation period Ts in the pixel row V5. At time t5, the second horizontal scanning period HD2 is completed.

[0047] At t6, the third horizontal scanning period HD3 begins, and the driving pulses pSEL3 and pRES3 in the pixel row V3 are switched to a high level. During t7, pRES3 switches to low. When the driving pulse pSEL3 switches to a high level, the selection transistor 107 is turned on. In addition, the excitation pulse pRES3 switches to a high level so that the FD is reset.

[0048] For this reason, the noise signal in the pixel line V3 is output to the signal line 115 during the period t7-t8.

[0049] At time t8, the drive pulse pTX3 switches to a high level, and at time t9, the drive pulse pTX3 switches to a low level. In this operation, the electric charges accumulated in the photoelectric conversion unit 103 are transferred to FD 108. The period t1-t9 from time t1 to time t9 corresponds to the period Ts of electric charge accumulation in the pixel row V3.

[0050] At t10, the driving pulse pSEL switches to a low level so that it is turned off and the third horizontal scanning period HD3 is completed.

[0051] For this reason, electric charges generated during the electric charge accumulation period Ts at the photoelectric conversion nodes constituting the corresponding pixels in the pixel row V3 are output to the signal line 115 during the period t9-t10 from time t9 to time t10. Throughout this document, the period t9-t10 is referred to as a “Top withdrawal period”.

[0052] It should be noted that when the differential processing for the signal output during the period t7-t8 and the signal output during the period t9-t10 is performed by a column circuit 140 or a double correlated sampling (CDS) circuit, which is not illustrated in In the drawing, a signal can be obtained for which noise is reduced.

[0053] During the period from the time t9 corresponding to the end of the electric charge accumulation period Ts to the time t19 corresponding to the start of the reset operation of the second frame period in the pixel row V3, a state is established in which electric charges can accumulate in the photoelectric conversion nodes 103 in the row V3 pixels. However, during this period, since the electric charges accumulated in each of the photoelectric conversion units 103 in the pixel row V3 are not used for the signal output from the pixel row V3, this period is referred to as the zero period Tnu of the pixels constituting the row V3 pixels.

[0054] It should be noted that after the reset period Tres in the pixel row V3, the electric charge storage operation in the pixel row V5 starts during the second horizontal scanning period HD2 corresponding to the next horizontal scanning period (the reset period Tres in the pixel row V5 occurs during the second period HD2 horizontal scan).

[0055] When the first period S1 (the period of the read operation of the pixel group of the image capture) ends, the second period S2 (the period of the read operation of the pixel group of the focus detection) starts from time t14. During the second period S2, an operation similar to the read operation of the image capturing pixel group performed during the first period S1, which is described with reference to FIG. 5 is performed for a focus detection pixel group (a plurality of lines of focus detection pixels V4, V8, and V12).

[0056] In this example, lines (V3, V5, V7, V9 and V11) of image capturing pixels and rows (V4, V8 and V12) of focus detection pixels are arranged so that they are adjacent to each other. The period of accumulation of electric charge of each of the line of pixels of image fixation and the line of pixels of focus detection arranged in such a way that they are adjacent to each other is controlled in such a way that after the period of accumulation of electric charge of each of the nodes of the photoelectric conversion included in one the pixel row is completed, the period of accumulation of electric charge of each of the nodes of the photoelectric conversion included in another row of pixels begins.

[0057] When the above-described signal reading sequence of the pixel portion 100 is performed, for example, the leakage of electric charges from the pixel row V4 to the pixel rows V3 and V5 arranged such that they are adjacent to the pixel row V4 occurs during the first period S1. For this reason, an adverse effect, for example, noise, can be exerted on signals output from rows (V3 and V5) of pixels arranged in such a way that they are adjacent to a row of V4 pixels to signal line 115 in some cases.

[0058] It should be noted that, as shown in FIG. 4, the adverse effect becomes more noticeable if other rows (V5-V10) of image fixing pixels from the number of lines of image fixing pixels are located between the pixel line V11 in which the read operation is performed last (or the electric charge accumulation period Ts starts last) from a plurality of rows of image fixing pixels (from a first pixel group), and a focus detection pixel line V4 in which a read operation is performed first (or an electric charge accumulation period Ts first) from the plurality of lines of focus detection pixels (from the second pixel group). An adverse effect can often occur when the amount of light reception is excessive relative to the amount of electric charge that can accumulate in the photoelectric conversion unit 103, in particular, if an image with an object having a high brightness is obtained if the zero period Tnu is large relative to the period Ts is an accumulation of electric charge, and the like. The above phenomenon often occurs if the period of accumulation of the electric charge of each pixel is controlled by the operation of the electronic shutter. However, an adverse effect may occur in cases other than the case in which the electronic shutter is operated, as in the case when an image of an object having a high brightness is obtained, and the like.

[0059] As illustrated in FIG. 4 and FIG. 5, the pixel line V4 (focus detection pixel line) is translated to the zero period Tnu during the first period S1. For this reason, when an operation is performed to read rows of V3 and V5 pixels (rows of image fixing pixels) adjacent to a row of V4 pixels (row of focus detection pixels), electric charges can flow from pixels in a row of V4 pixels to pixels in rows V3 and V5 of pixels , and an adverse effect can be exerted on the signals read from the lines V3 and V5 of the pixels, in some cases.

[0060] FIG. 6 illustrates drive timing according to the present exemplary embodiment. The difference from the drive synchronization of FIG. 5 is that the pixels in the pixel row V4 adjacent to the pixel row V3 are discarded during the top output period in the pixel row V3 (before the top output period ends). In other words, in the example of FIG. 6, during the period from the beginning of the electric charge accumulation period in one row of pixels from two adjacent rows (V3 and V4 or V4 and V5) of pixels to the end of the output period Top, the corresponding photoelectric conversion nodes in another row of pixels are reset.

[0061] In particular, at least one operation of the following three operations is performed according to a feature of the present exemplary embodiment.

[0062] The first operation is an operation for resetting the photoelectric conversion unit in the pixel row V4 during the Top output period (period t9-t10) in the pixel row V3 (before the Top output period ends). In particular, the exciting pulses pRES4 and pTX4 are set equal to a high level. Accordingly, it is possible to reduce the leakage of electric charges from the line V4 pixels in the line V3 pixels. In particular, during the output period in the pixel line V3, the signals output from the corresponding pixels 101 constituting the pixel line V3 to the signal line 115 are based on the electric charges carried in the FD 108. For this reason, the leakage of electric charges from the photovoltaic assembly can be reduced. converting in line V4 pixels to FD in line V3 pixels through the above reset operation.

[0063] The second operation is an operation for resetting the photoelectric conversion unit in the pixel line V4 during the Top output period (period t12-t13) in the pixel line V5 (before the Top output period ends) (not illustrated). In particular, the exciting pulse pRES4 and pTX4 is set equal to a high level during the period t12-t13. Accordingly, it is possible to reduce the leakage of electric charges from the row of V4 pixels to the row of V5 pixels.

[0064] The third operation is an operation for resetting the photoelectric conversion unit in one of the pixel lines V3 and V5 during the Top output period (period t17-t18) in the pixel line V4 (before the Top output period ends). In particular, the driving pulses pRES3 and pTX3 or the driving pulses pRES5 and pTX5 are set equal to a high level during the period t17-t18. Accordingly, it is possible to reduce the leakage of electric charges from at least one of the rows V3 and V5 of pixels to the row V4 of pixels.

[0065] In this document, if the first operation is compared with the second operation, during the output period in the pixel line V3 in which the read operation is previously performed, a reset in the pixel line V4 may preferably be performed. This is because the above advantage, respectively, can be invoked in both adjacent rows of pixels V3 and V5. The same also applies to the following exemplary embodiments.

[0066] Furthermore, the above three operations may be performed, but only the first operation is more preferably performed. This is because the signal output from the focus direction pixel does not require high accuracy compared to the signal output from the image capturing pixel. The reason why the first operation is better than the second operation is as described above.

[0067] The reset operation according to the present exemplary embodiment can also be applied to the pixel lines V8 and V12 in which the read operation is performed during the second period S2, similarly to the pixel line V4.

[0068] In addition, according to the present exemplary embodiment, the pixel group in which the read operation is performed during the first period S1 and the third period S3 is set as the image fixing pixel group, and the pixel group in which the read operation is performed during the second period S2 and the fourth period S4, is set as the focus focus pixel group, but the reverse configuration can also be adapted. In other words, according to the present exemplary embodiment, the first period or the second period specified in the period of one frame may occur first in the relationship "before and after", and the second period S2 may be set before or after the first period S1.

[0069] Furthermore, according to the present exemplary embodiment, the read operation of the focus detection pixel group is performed after the read operation of the image fixing pixel group, but the order is not limited to this established order. For example, after a read operation of one pixel group can be performed several times, a read operation of another pixel group may be performed. In this case, for example, after the first period S1, the first period S1 occurs again within one frame, and after that the second period S2 occurs.

[0070] Furthermore, according to the present exemplary embodiment, an example is illustrated in which the pixels constituting the pixel portion 100 are image capturing pixels and focus direction pixels, but the advantage described in accordance with the present exemplary embodiment is obtained even if the pixels constituting the pixel portion 100 are only image fixing pixels or only focus direction pixels. For example, the above advantage is obtained by the resetting operation according to the present exemplary embodiment also in the case where the pixel portion 100 consists of only a plurality of image fixing pixel lines, a read operation on predetermined pixel lines except for a part of the pixel lines is performed during the first period S1, and the read operation on the part of the rows of pixels is performed during the second period S2.

[0071] According to the present exemplary embodiment, during the Top output period in a specific pixel row, when a pixel row located so that it is adjacent to a specific pixel row corresponds to a zero period Tnu, an effect such as noise on the signal can be reduced. derived from the above-defined specific row of pixels in the signal line.

Second Exemplary Embodiment

[0072] With reference to FIG. 7, an image fixing apparatus according to the present exemplary embodiment is described.

[0073] The difference between drive synchronization according to the present exemplary embodiment illustrated in FIG. 7, and the drive synchronization illustrated in FIG. 6 according to a first exemplary embodiment, is to synchronize when a reset operation is performed. According to the present exemplary embodiment, the photoelectric conversion unit in the line V4 of the focus detection pixels adjacent to the line of image fixing pixels is reset at the same time as the reset operation that starts the electric charge accumulation period of the line of image fixing pixels. In particular, the driving pulses pRES4 and pTX4 of the line V4 of the focus detection pixels are set to a high level during a period t0-t1 corresponding to a reset period Tres in the line V3 of image capturing pixels.

[0074] Accordingly, the beginning of the electric charge accumulation period Ts in the pixel row V3 and the beginning of the zero period Tnu in the pixel row V4 can be synchronous with each other. For this reason, it is possible to reduce the likelihood that electric charges leak from the pixel row V4 to the pixel row V3 during the electric charge accumulation period Ts in the image fixing pixel row V3.

[0075] In addition, at least one of the image fixing pixel lines V3 and V5 can be reset simultaneously with the reset operation, which starts the electric charge accumulation period Ts in the pixel line V4. In particular, as illustrated in FIG. 7, the image fixing pixel lines V3 and V5 may be reset during the reset period Tres (period t14-t15) in the pixel line V4.

[0076] According to the present exemplary embodiment, similar advantages can be obtained with respect to the first exemplary embodiment. Furthermore, according to the present exemplary embodiment, the control signals pTX3 and pRES3 in the pixel line V3 adjacent to the pixel line V4, or the control signals pTX5 and pRES5 in the pixel line V5 adjacent to the pixel line V4 are used as the control signals pTX4 and pRES4 in a row of V4 pixels. Accordingly, the control unit 160 does not need to generate new control signals.

Third Exemplary Embodiment

[0077] With reference to FIG. 8, an image capturing apparatus according to the present exemplary embodiment is described. The difference between drive synchronization according to the present exemplary embodiment illustrated in FIG. 8 and the drive synchronization illustrated in FIG. 6 according to the first exemplary embodiment, the photoelectric conversion unit in the focus detection pixel line V4 is reset during the electric charge accumulation period Ts in the image pickup pixel line V3 (period t1-t9). According to the present exemplary embodiment, it is also possible to reduce the leakage of electric charges from the pixels in the line V4 of the focus detection pixels to the pixels in the line V3 of the image fixing pixels. In addition, similarly to the above-described exemplary embodiment, the photoelectric conversion nodes in the image fixing pixel lines V3 and V5 may be reset during the electric charge accumulation period Ts in the focus detection pixel line (period t15-t17). It should be noted that the reset operation is preferably performed simultaneously at the photoelectric conversion nodes of the respective pixel rows in the image fixing pixel line V3 and the image fixing pixel line V5 during the electric charge accumulation period Ts in the focus detection pixel line.

[0078] According to the present exemplary embodiment, it is also possible to obtain similar advantages with respect to the above-described exemplary embodiment.

Fourth Exemplary Embodiment

[0079] With reference to FIG. 9, an image capturing apparatus according to the present exemplary embodiment is described.

[0080] The difference between the drive synchronization illustrated in FIG. 9 according to the present exemplary embodiment, and the drive synchronization illustrated in FIG. 6 according to a first exemplary embodiment, is synchronization for a reset operation. In particular, the difference is that the photoelectric conversion unit in the pixel row V4 is reset for at least a portion of the time from t18 corresponding to the end of the output period Top in the focus detection pixel row V4 to the time t19 corresponding to the start of the reset period Tres in line V3 pixels of image capture. According to the present exemplary embodiment, the leakage of electric charges from the pixels in the line V4 of the focus detection pixels to the pixels in the line V3 of the image fixing pixels can also be reduced. The photoelectric conversion unit in the pixel line V3 may be reset during at least a portion of the time from a time t10 corresponding to the end of the output period Top in the image fixing pixel line V3, to a time t14 corresponding to the start of the reset period Tres in the focus detection pixel line V4. In addition, the photoelectric conversion unit in the pixel line V5 may be reset for at least a portion of the time from a time t13 corresponding to the end of the Top output period of the image fixing pixels in the line V5, to a time t14 corresponding to the start of the reset period Tres in the focus detection pixel line V4 .

[0081] According to the present exemplary embodiment, similar advantages can also be obtained with respect to the first exemplary embodiment.

Fifth Exemplary Embodiment

[0082] With reference to FIG. 10, an image capturing apparatus according to the present exemplary embodiment is described.

[0083] The difference between the drive synchronization illustrated in FIG. 10 according to the present exemplary embodiment, and the drive synchronization illustrated in FIG. 6 according to the first exemplary embodiment, the photoelectric conversion unit in the pixel row V4 continues to be reset during all periods except for the electric charge accumulation period Ts and the output period Top in the pixel focus detection line V4. According to the present exemplary embodiment, since most of the electric charges generated during the zero period Tnu in the pixel row V4 are discarded, the leakage of electric charges to the pixel rows V3 and V5 adjacent to the pixel row V4 can be reduced compared to the above exemplary embodiments.

[0084] Furthermore, according to the present exemplary embodiment, as illustrated in FIG. 10, an operation similar to the above-described reset operation performed for the pixel row V4 can also be performed for the image capturing pixel rows V3 and V5.

Sixth Exemplary Embodiment

[0085] As a drive synchronization of the present exemplary embodiment of FIG. 11 illustrates the modified example of drive synchronization of FIG. 7. In this document, FIG. 7 is used as an example, but drawings other than FIG. 7. Descriptions regarding excitation similar to the timing excitation diagram of FIG. 7 are lowered.

[0086] According to the present exemplary embodiment, the pixel in the image fixing pixel row V1 and the pixel in the image fixing pixel row V2 illustrated in FIG. 3, share the FD 108. The pixel in the line V3 of the image capturing pixels and the pixel in the line V4 of the focus detection pixels share FD 108. The two pixels in the next pixel lines also switch FD 108 on the next switch. Therefore, the pixel in the plurality of fixation pixels of images and a pixel in a row of focus detection pixels share FD 108.

[0087] Regarding the pixels in another part of the plurality of lines of image fixing pixels (for example, V1), the mutual pixels in the lines of image fixing pixels share FD. In addition to the above, a configuration can also be adapted in which a pixel in a portion of a pixel row of image capturing pixels and a pixel in a pixel row for a purpose other than image capturing or focus detection are shared between FD 108.

[0088] According to the present exemplary embodiment, pixels that share the FD 108 share a reset transistor 105, an amplifying transistor 106, and a selection transistor 107. For this reason, the reset operation in the line V3 of the image capturing pixels and the line V4 of the focus detection pixels is controlled by the driving pulses pSEL3 and pRES3.

[0089] During the period t7-t10 from the time t7, when the driving pulse pRES3, which resets the FD in the image fixing pixel lines V3 and V4, is turned off until the time t10, when the output period Top ends in the first period S1, the signal in the pixel line V4 focus detection is not output to FD 108 by turning off the pTX4 excitation pulse.

[0090] Accordingly, the signal in the focus detection pixel line V4 is suppressed so that it is mixed when a noise signal is output in the image fixing pixel line V3, or when the signal in the image fixing pixel line V3 is output. In this document, descriptions are provided provided that the first period is used as an example. A similar advantage can be obtained by turning off pRES3 during the period t22-t18 in the second period S2.

[0091] It should be noted that according to the present exemplary embodiment, in the case where the time when the drive pulse pTX4 or pTX3 is turned off and the time when the reset operation FD 108 is completed that is closest to the output period in which the signals are output of the pixels in the part of the corresponding rows of pixels during each of the periods is the same time in the first period S1 and the second period S2, the electric potential FD 108 is oscillated by the communication capacitance of the gate of the transistor 104 ca and FD 108 and reverse electric charges generated when the transfer transistor 104 is turned off, and noise may be generated.

[0092] In view of the foregoing, in the first period S1 and the second period S2, the time when the drive pulse pTX4 or pTX3 is turned off from the on state is preferably set ahead of time when the reset operation FD 108 is completed which is closest to the output period in which the signals from pixels in the part of the corresponding rows of pixels are displayed during each of the periods.

[0093] Preferably, the operation for turning off the excitation pulse pTX4 or pTX3 from the on state is not performed during the horizontal scanning period HD including the time when the reset operation FD 108 is completed which is closest to the output period in which the signals from the pixels in portions of the corresponding pixel rows are output in the first period S1 and the second period S2. In this case, for example, the above operation is performed during the previous HD horizontal scanning period before the above horizontal horizontal scanning period. Accordingly, it is possible to suppress noise generated when the electric potential FD fluctuates.

[0094] As an alternative to the above, if the capacitance FD is 3-6 fF, as illustrated in FIG. 12, before 9 μs or more expires from the time when the reset operation of the FD 108 is completed, which is closest to the output period in which signals from the pixels in part of the corresponding pixel rows are output, an operation to turn off the excitation pulse pTX4 or pTX3 from the on state not executed in the first period S1 and the second period S2. According to the above configuration, the fluctuation of the electric potential FD 108, which is caused by turning off the excitation pulse pTX4 or pTX3, is suppressed. Accordingly, kTC noise included in the output signal can be suppressed.

[0095] The present invention has been described above by way of specific exemplary embodiments, but the present invention is not limited to the respective exemplary embodiments, and modifications and combinations within the scope of the idea may be appropriately carried out.

[0096] Mutually different reset periods are defined according to the first to fourth exemplary embodiments, but corresponding reset periods can be appropriately combined with each other to perform.

[0097] In addition, since the reset operation is sequentially performed for each row of pixels in accordance with the respective exemplary embodiments, the signal is read by means of a shift shutter operation in which the electric charge accumulation period is different for each row of pixels. Nevertheless, work can be performed in the global electronic shutter mode, in which the periods of electric charge accumulation are set identical. Instead, work may be performed in which the periods of electric charge accumulation are different for every few pixel lines.

[0098] When operating in the global electronic shutter mode, for example, the initial times of the accumulation period Ts in all rows of image fixing pixels can be set identical, as well as the ending times of the accumulation period Ts in all rows of image fixing pixels can be set identical. In addition, with respect to the line of focus detection pixels, also the initial times of the accumulation period Ts in all rows of focus detection pixels can be set identical, and the end times of the accumulation period Ts can be identical for a period different (a period that does not overlap) from the accumulation period Ts in the pixel row of image capture.

[0099] Further, according to the above corresponding exemplary embodiments, an example is illustrated in which one row (V4) of focus detection pixels is arranged between two rows (V3 and V5) of image fixing pixels, but a plurality of rows (V4) of focus detection pixels can also be placed between two rows (V3 and V5) of image capture pixels.

[00100] Furthermore, the position of the line of focus detection pixels is not particularly limited, provided that the line of focus detection pixels is adjacent to at least one of the lines of image capturing pixels. For example, a mode may be adapted in which one or a plurality of lines of focus detection pixels are arranged at the farthest ends of the pixel portion 100 without being placed between two lines (V3 and V5) of image capturing pixels. For example, if n rows (V1-Vn) of pixels are arranged in the pixel portion 100, a row of V1 pixels and / or a row of Vn pixels may be specified as rows of focus detection pixels. In addition, for example, from a pixel row V1 to a pixel row V5 and / or from a pixel row Vn-4 to a pixel row Vn can be specified as focus detection pixel rows. In addition, according to the corresponding respective exemplary embodiments described above, the image capturing pixel group and the focus detection pixel group are defined as a combination of the respective pixel groups, but the configuration is not limited thereto. For example, the pixel focus detection group may be replaced by a pixel group configured to determine the temperature, or a pixel group configured to determine the infrared beam in the near range of the spectrum.

[00101] Although the present invention has been described with reference to exemplary embodiments, it should be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the appended claims should be accorded the broadest interpretation so that it encompasses all such modifications and equivalent structures and functions.

Claims (61)

1. An excitation method for an image capturing apparatus including a plurality of rows of pixels constituting a first pixel group including a plurality of rows of first pixels and a second pixel group including a plurality of rows of second pixels, each row of pixels including a plurality pixels, and each pixel includes a photovoltaic conversion unit, wherein said driving method comprises the steps of: control the first period from the start of the reset operation performed on the photovoltaic conversion nodes in the first pixel row from the plurality of first pixel rows to start the electric charge accumulation period in the photovoltaic conversion nodes in the first pixel row until the end of reading signals based on electric charges in the corresponding photovoltaic conversion nodes in the row of first pixels from the row of first pixels and the second period from the beginning of the reset operation performed on the nodes of the photoelectric transformations in a row of second pixels from a plurality of rows of second pixels for starting a period of electric charge accumulation in the nodes of the photoelectric conversion in a row of second pixels, the row of second pixels being adjacent to the row of first pixels, until the end of reading signals based on electric charges in the corresponding nodes of the photoelectric conversion in a row of second pixels from a row of second pixels during a period of one frame so that the second period begins after the first period is completed; and resetting the corresponding nodes of the photoelectric conversion in the row of the second pixels during the first period before the reading of the signals from the row of the first pixels is completed, wherein the first pixel row includes an image fixing pixel, and the second pixel row includes a focus detection pixel. 2. The method of excitation according to claim 1, in which the accumulation of electric charges in the plurality of rows of the first pixels begins by sequentially resetting the electric charges accumulated in the nodes of the photoelectric conversion of pixels in the corresponding rows of the first pixels for each row, and ends by sequentially transferring the electric charges accumulated in the nodes of the photoelectric conversion of pixels in the corresponding rows of the first pixels for each row, and wherein the accumulation of electric charges in a plurality of rows of the second pixels begins by sequentially resetting the electric charges accumulated in the nodes of the photoelectric conversion of pixels in the corresponding rows of the second pixels for each row, and ends by sequentially transferring the electric charges accumulated in the nodes of the photoelectric conversion of pixels in the corresponding rows of the second pixels for each row. 3. The method of excitation according to claim 2, in which the nodes of the photoelectric conversion of pixels in the line of the second pixels adjacent to the line of the first pixels are reset at the same time as the reset operation is performed to start the accumulation of electric charges in the line of the first pixels. 4. The method of excitation according to claim 2, in which the nodes of the photoelectric conversion of pixels in a row of second pixels adjacent to a row of first pixels are reset during at least part of the period from the end of the accumulation of electric charges in the row of first pixels to the end of reading signals in the row of first pixels. 5. The method of excitation according to claim 2, wherein the photoelectric conversion nodes in the second pixel row adjacent to the first pixel row are reset during at least a portion of the period from the beginning of the electric charge accumulation period in the first pixel row to the end of the electric charge accumulation period in the first pixel row. 6. The method of excitation according to claim 2, in which the nodes of the photoelectric conversion of pixels in a row of second pixels are reset during the period from the end of reading signals from a row of second pixels to the beginning of accumulation of electric charges in a row of first pixels adjacent to the row of first pixels. 7. The method of excitation according to claim 2, in which the nodes of the photoelectric conversion of pixels in the line of the second pixels continue to be reset during the period except for the period from the beginning of the accumulation of electric charges in the line of the second pixels to the end of the read signals. 8. The method of excitation according to claim 1, in which the nodes of the photoelectric conversion of pixels in a row of second pixels are reset during the entire first period. 9. The method of excitation according to claim 1, wherein each of the plurality of pixels includes a floating diffusion region, and while part of the pixels in the row of the first pixels and part of the pixels in the row of the second pixels use a common floating diffusion region. 10. The method of excitation according to claim 9, wherein each of the plurality of pixels includes an amplifying transistor configured to amplify a signal based on electric charges accumulated in a floating diffusion region; and a selection transistor configured to control an electrically conductive state between the amplifying transistor and the signal line, wherein the selection transistor of the pixel included in the predetermined row of pixels is in the on state during the horizontal scanning period, which begins when the selection transistor is opened and ends when the selection transistor is locked, and wherein the reset of the photovoltaic conversion nodes in the row of the second pixels is performed during the horizontal period, which is one or more periods before the horizontal period, including the output period during which the signal is output from the row of the first pixels, and the reset of the photovoltaic conversion nodes in the row of the second pixels are not executed during a horizontal period including an output period during which a signal is output from a row of first pixels. 11. The method of excitation according to claim 1, in which the set of lines of the second pixels is smaller than the set of lines of the first pixels. 12. The method of excitation according to claim 11, in which another row of pixels from the plurality of rows of the first pixels is placed between the row of pixels in which the accumulation of electric charges starts last from the plurality of rows of the first pixels and the row of pixels in which the accumulation of electric charges starts first from the plurality of rows of second pixels for a period of one frame . 13. The method of excitation according to p. 12, in which at least a portion of the pixel rows of the plurality of rows of the first pixels are arranged between one row of pixels and another row of pixels of the plurality of rows of the second pixels. 14. The method of excitation according to claim 13, in which the accumulation of electric charges in the respective nodes of the photoelectric conversion in the plurality of rows of the first pixels sequentially begins for each row, and the accumulation of electric charges in the corresponding nodes of the photoelectric conversion in the plurality of rows of the second pixels sequentially begins for each row. 15. The method of excitation according to claim 1, wherein each of the plurality of pixels includes a reset transistor, and however, for each of the photovoltaic conversion nodes included in the second pixel row, the photovoltaic conversion nodes are reset when the reset transistor included therein is in the on state. 16. An excitation method for an image capturing apparatus including a plurality of rows of pixels, each row of pixels including a plurality of pixels and each pixel including a photoelectric conversion unit, wherein the plurality of rows of pixels include a first pixel group consisting of a plurality of rows of first pixels and a second pixel group consisting of a plurality of rows of second pixels, and moreover, one row of pixels from a plurality of rows of second pixels is adjacent to at least one row of pixels from a plurality of rows of first pixels, wherein said driving method comprises the steps of: control so as to start the periods of electric charge accumulation of the respective nodes of the photoelectric conversion of the second pixel group after the periods of electric charge accumulation of the respective nodes of the photoelectric conversion of the first pixel group are completed; and resetting the corresponding photoelectric conversion nodes in at least one row of pixels from the plurality of first pixel rows to start electric charge accumulation periods of the respective photoelectric conversion nodes in at least one row of pixels, and dropping the corresponding photoelectric conversion nodes in one row of pixels from the plurality of second pixels that are adjacent to at least one row of pixels from the number of rows of the first pixels at the same time, however, a plurality of rows of pixels includes a plurality of rows of first pixels and a plurality of rows of second pixels, less than the number of rows of first pixels wherein one row of pixels from the plurality of rows of the first pixels is adjacent to each of the plurality of rows of the second pixels, and wherein another row of pixels from the plurality of rows of the first pixels is placed between the row of pixels in which the accumulation of electric charges starts last from the plurality of rows of the first pixels and the row of pixels in which the accumulation of electric charges starts first from the plurality of rows of second pixels for a period of one frame . 17. A device for capturing images containing: a plurality of rows of pixels constituting a first pixel group including a plurality of rows (201) of a first pixels and a second pixel group including a plurality of rows (202) of a second pixel, each row of pixels including a plurality of pixels, and each pixel including in itself a node of photovoltaic conversion; and control node while the control node: controls the first period from the start of the reset operation performed on the photovoltaic conversion nodes in the first pixel row from the plurality of first pixel rows to start the electric charge accumulation period in the photovoltaic conversion nodes in the first pixel row, until the end of reading signals based on electric charges in the corresponding photovoltaic conversion nodes in the row of first pixels from the row of first pixels and the second period from the beginning of the reset operation performed on the nodes of the photoelectric transformations in a row of second pixels from a plurality of rows of second pixels for starting a period of electric charge accumulation in the nodes of the photoelectric conversion in a row of second pixels, the row of second pixels being adjacent to the row of first pixels, until the end of reading signals based on electric charges in the corresponding nodes of the photoelectric conversion in a row of second pixels from a row of second pixels during a period of one frame so that the second period begins after the first period is completed, and flushes the corresponding nodes of the photoelectric conversion in the row of the second pixels during the first period before the reading of the signals from the row of the first pixels is completed, and wherein the first pixel row includes an image fixing pixel and the second pixel row includes a focus detection pixel. 18. The device for fixing images according to p. 17, in which a plurality of lines of pixels includes a plurality of lines of first pixels and a plurality of lines of second pixels, less than the number of lines of first pixels wherein one row of pixels from the plurality of rows of the first pixels is adjacent to each of the plurality of rows of the second pixels. 19. The device for capturing images according to claim 18, in which another row of pixels from the plurality of rows of the first pixels is placed between the row of pixels in which the accumulation of electric charges starts last from the plurality of rows of the first pixels and the row of pixels in which the accumulation of electric charges starts first from the plurality of rows of second pixels for a period of one frame . 20. The device for fixing images according to p. 17, wherein each of the plurality of pixels includes a floating diffusion region, and wherein part of the pixels in the plurality of lines of the first pixels and part of the pixels in the plurality of lines of the second pixels share a floating diffusion region.

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