RU2510862C1 - Stabilised quasiresonent converter - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: invention relates to converting equipment and it can be used for power supply systems of radar stations, radio-technical facilities, automatic and computer facilities. Stabilised quasiresonant converter contains two in-series charging MIS transistors, two series-connected recuperating diodes, two series-connected capacitors, series-connected resonant capacitor and choke, power transformer, two rectifiers, two voltage dividers, filter capacitor, load resistor, modulating MIS transistor, two single-ended PLM-controllers, two control transformers, time-setting RC-circuit, emitter follower, two differentiating RC-circuits. There is measuring winding of power transformer, the second modulating MIS transistor, two single-ended PLM-controllers, three time-setting RC-circuits, two differentiating RC-circuits, the second emitter follower, two summators, integrator, filter, clock-pulse generator, trigger, two logical AND components with respective relations.

EFFECT: improving operational performance of the converter, reducing its weight and dimensions, increasing efficiency factor, improving reliability and expanding its application scope due to exclusion of magnet flux direct component in power transformer.

1 dwg

Description

The invention relates to a conversion technique and can be used in power systems of radar stations, radio engineering devices, automation and computer technology.

Known stabilized quasi-resonant Converter with pulse-width modulation [1]. The converter contains the positive and negative terminals of the power source, two recuperating diodes, a power transformer with primary and two secondary windings, two rectifiers, a load resistor, a filter capacitor, a resonant inductor, a resonant capacitor, two charging MOS transistors, two capacitors, a modulating MOS transistor , single-cycle and push-pull PWM controllers [2], time-setting resistor and capacitor, voltage feedback circuit, control transformer.

The analogue has the following disadvantages:

1. The presence of a second secondary winding increases the size and weight of the transformer;

2. In the operating mode, when a pulse of maximum duration is supplied to the gate of the modulating MOS transistor, the transformer operates in short circuit mode. The charging circuit current flows through the primary winding, the second secondary winding of the transformer, the second rectifier, modulating the MOS transistor, which reduces the efficiency of the converter;

3. The presence of a second secondary winding leads to the formation of additional spurious "LC" circuits, which leads to an increase in the level of radio interference;

4. Voltage feedback is carried out by a rather complex circuit and contains many elements, which reduces its speed and permissible dynamic instability of the output voltage.

The noted disadvantages limit the scope of the analog circuit.

The closest in technical essence is a stabilized quasi-resonant converter [3], adopted for the prototype, which contains a power source, two series-connected charging MOS transistors, two series-connected recovery diodes, two series-connected capacitors, two rectifiers, a power transformer, series-connected resonant capacitor and inductor, filter capacitor, load resistor, modulating MOS transistor, two voltage dividers, one push-pull and two single-ended PWM controller, timing capacitor and resistor, two control transformer emitter follower, two differentiating circuits.

The disadvantage of the above devices is that when the output voltage of the converter is stabilized, under conditions of cyclically changing load, when intervals of a significant (nominal) load alternate with intervals of a small load (modes close to idling), which occurs under the conditions of application of converters in radar stations, there is a significant change in the duration of the conductive state of the modulating transistor and the values of volt-second voltage integrals on the windings with silt transformer.

When the device is operating on a large load interval, the duration of the conductive state of the modulating transistor is small and the voltage to the transformer windings is applied for a long period, the volt-second integrals and increments of the magnetic induction of the transformer are significant.

In the low-load interval, the duration of the conducting state of the modulating transistor is significant and the voltage is applied to the transformer windings for a short time interval, the volt-second integrals are small, and the magnetic induction in the transformer changes little, maintaining the value that was at the time the previous cycle ended. As a result, a constant component of induction appears in the magnetic circuit of the transformer.

With the beginning of a new cycle, at the first half-period of operation of the converter with a large load due to a decrease in the duration of the conductive state of the modulating transistor and a significant increase in volt-second integrals, the induction of the transformer magnetic core receives a significant increment, which is summed with the constant component of the induction from the previous cycle. As a result, the induction value exceeds the nominal value even without taking into account the possible successive succession of several similar cycles, when there is a process of continuous increase in magnetic induction.

The appearance of a constant component of induction causes saturation of the magnetic circuit of the power transformer and a sharp increase in the current of the primary winding, which leads to current overloading of charging MOS transistors and their failure. The reliability of the quasi-resonant converter is reduced.

To eliminate the saturation effect in the prototype, magnetic cores with a small slope of the magnetization curve are used. Such magnetic cores have a low magnetic permeability, and transformers with such magnetic cores have a low magnetization inductance and a large magnetizing current. Therefore, to obtain the required magnetization current in the prototype, it is necessary to increase the number of turns of the transformer windings, which, in turn, leads to an increase in its mass and dimensions, losses in the windings and lower efficiency.

The technical result of the invention is the improvement of the operational characteristics of the converter (reducing overall dimensions, increasing efficiency, increasing reliability, as well as expanding the scope of its application) by eliminating the constant component of the magnetic flux in the magnetic core of the power transformer of the quasi-resonant converter.

The technical result is achieved by the fact that the proposed stabilized quasi-resonant converter containing two series-connected charging MOS transistors, two series-connected recovery diodes, two series-connected capacitors, series-connected resonant capacitor and inductor, power transformer, two rectifiers, two voltage dividers, capacitor filter, load resistor, modulating MOS transistor, two single-cycle PWM controllers, two control transf a rimator, a “KS” circuit, an emitter follower, two differentiating “KS” circuits, an additional measuring transformer winding, a second modulating MOS transistor, two single-cycle PWM controllers, three “KS” circuits, two differentiating “KS” circuits are additionally introduced KS "-chains, the second emitter repeater, two adders, an integrator, a filter, a clock, a trigger, two logical elements" AND ".

In this case, as in the prototype, in the proposed converter, the drain of the first charging MOS transistor, the cathode of the first recovery diode and the first output of the first capacitor are connected to the positive terminal of the power supply, and the source of the second charging MOS transistor, the anode of the second recovery diode and the second output of the second capacitor connected to the negative terminal of the power source, the common connection point of the charging MOS transistors and recovery diodes through a resonant capacitor and inductor are connected to the beginning of the primary windings of the power transformer, the end of which is connected to the common point of the capacitors connection, and the first rectifier is connected to the secondary winding of the power transformer, the output of which is connected to a load resistor shunted by the filter capacitor, and the second rectifier, to the positive terminal of which is connected the drain of the modulating MOS transistor, and to the negative connected to the negative output of the first rectifier, its source, the outputs of the first and second control transformers are connected to the gates of the first and second charging DP-transistors. In addition, unlike the prototype, in the proposed converter, the drain-source of the second modulating MOS transistor is connected to the drain-source of the first modulating MOS transistor, the end of the measuring winding of the power transformer is connected to the negative terminal of the first and second rectifiers, and the beginning to the input of the integrator , the output of which through a filter is connected to the first inputs of the first and second adders, the output of the first voltage divider, the input of which is connected to the plus terminal of the first rectifier, is connected to a non-inverting input house “IN” [2, page 4] (input 2 - W2) of the fourth PWM controller and the second input of the first adder, the output of which is connected to the non-inverting input “IN” of the third PWM controller, the input of the second voltage divider is connected to the output of “REF »Of the third PWM controller, and its output is connected to the inverting input“ IN ”[2, p. 4] (input 1 - W1) of the third PWM controller and to the second input of the second adder, the output of which is connected to the inverting input“ IN ”of the fourth PWM controller, the output of the clock generator is connected to the input of the trigger and the second inputs p of the first and second logical elements “AND”, the first and second outputs of the trigger are connected to the first inputs of the first and second logical elements “And”, respectively, the output of the first logical element “And” through the first emitter repeater is connected to the inputs of the second and fourth differentiating “RC” -circuits, and the output of the second logical element “AND” through the second emitter follower is connected to the inputs of the first and third differentiating “RC” circuits, the outputs of the first, second, third and fourth differentiating “RC-circuits are connected to the third Am of the first, second, third and fourth time-setting “RC” circuits, pins 1, 2 of which are connected to the pins “R” and “C” of the first, second, third and fourth PWM controllers, respectively, the outputs “B” of the first and second PWM controllers are connected to the inputs of the first and second control transformers, and the outputs "B" of the third and fourth PWM controllers are connected to the gates of the first and second modulating MOS transistors.

The drawing shows a structural diagram of the proposed stabilized quasi-resonant transducer, where the following notation:

1, 2 - positive and negative terminals of the power source;

3, 4 - the first and second charging MOS transistors;

5, 6 - the first and second recovery diodes;

7, 8 - the first and second capacitors;

9 - resonant capacitor;

10 - resonant inductor;

11 - power transformer;

12 - measuring winding of a power transformer;

13, 14 - the first and second rectifiers;

15, 16 - the first and second modulating MOS transistors;

17 - the first voltage divider;

18 - filter capacitor;

19 - load resistor;

20, 21 - the first and second adders;

22, 23 - the first and second control transformers;

24 - the second voltage divider;

25, 26, 27, 28 - the first, second, third and fourth PWM controllers;

29 - integrator;

30 - filter;

31, 32, 33, 34 - the first, second, third and fourth time-defining “RC” chains;

35, 36, 37, 38 — the first, second, third, and fourth differentiating “RC” chains;

39 - clock generator;

40 - trigger;

41, 42 - the first and second logical elements "AND";

43, 44 - the first and second emitter repeaters.

The dots in the diagram indicate the beginning of the windings of the power transformer 11.

The stabilized quasi-resonant converter is powered by two power sources not shown in the drawing. Two series-connected charging MOS transistors 3, 4, two series-connected recovery diodes 5, 6 and two series-connected capacitors 7, 8 are connected to the terminals 1, 2 of the first power source. In this case, the drain of the first charging MOS transistor 3, the cathode of the first regenerating diode 5 and the first output of the first capacitor 7 are connected to the positive terminal of the power source 1, and the source of the second charging MOS transistor 4, the anode of the second recovery diode 6 and the second output of the second capacitor 8 to the negative terminals e of the power source 2. The common connection point of the charging MOS transistors 3, 4 and the recovery diodes 5, 6 through the resonant capacitor 9 and the inductor 10 are connected to the beginning of the primary winding of the power transformer 11, the end of which is connected to the common connection point of the capacitors 7 and 8.

The secondary winding of the power transformer 11 is connected to the inputs of the rectifiers 13 and 14, the negative outputs of which are interconnected. In parallel with the output of the first rectifier 13, a filter capacitor 18 and a load resistor 19 are connected.

The input of the first voltage divider 17, the output of which is connected to the non-inverting input “IN” of the fourth PWM controller 28, and the input 2 of the first adder 20, the output of which is connected to the non-inverting input “IN” of the third PWM controller 27, is connected to the positive output of the first rectifier 13. The outputs of the modulating MOS transistors 15 and 16 are connected to the positive output of the second rectifier 14, and their sources are connected to the negative output.

The input of the second voltage divider 24 is connected to the output "REF" of the third PWM controller 27, and its output is connected to the inverting input "IN" of the third PWM controller 27, as well as to the second input of the second adder 21, the output of which is connected to the inverting input "IN "Fourth PWM controller 28.

The end of the measuring winding 12 is connected to the negative terminal of the rectifiers 13 and 14, and its beginning is connected to the input of the integrator 29, the output of which through the filter 30 is connected to the first inputs of the adders 20 and 21.

The gates of the first and second charging MOS transistors 3 and 4 through the first and second control transformers 22 and 23 are connected to the non-inverting outputs "B" of the first 25 and second 26 PWM controllers.

The gates of the first 15 and second 16 modulating MOS transistors are connected to the non-inverting outputs "B" of the third and fourth PWM controllers 27, 28.

The output of the clock generator 39 is connected to the input of the trigger 40 and to the second inputs of the first 41 and second 42 logic elements "And", the first inputs of which are connected to the first and second outputs of the trigger 40, respectively.

The pins “R” and “C” of the first 25, second 26, third27 and fourth 28 PWM controllers are connected to pins 1, 2 of the first 31, second 32, third 33 and fourth 34 of the timing “RC” circuits. The outputs of the first 35, second 36, third 37, and fourth 38 differentiating “RC” circuits are connected to the third inputs of the first 31, second 32, third 33, and fourth 34 time-specifying “RC” circuits. The inputs of the first 35 and third 37 differentiating "RC" circuits are connected to the output of the second emitter follower 44, and the inputs of the second 36 and fourth 38 differentiating "RC" circuits are connected to the output of the first emitter follower 43.

The inputs of the first and second emitter repeaters 43 and 44 are connected to the outputs of the first and second logic elements "And" 41 and 42, respectively.

Stable quasi-resonant transducer operates as follows.

After supplying power to the active devices of the converter from an additional source, not shown in the drawing, and supplying voltage to terminals 1, 2, the clock generator 39, trigger 40, logic elements “I” 41, 42, emitter repeaters 43, 44, PWM -controllers 25, 26, 27, 28, integrator 29. Generator 39 generates clock pulses of the required frequency and duration, approximately equal to 1/10 of their period.

From the output of the generator 39, the generated pulses are fed to the input of the trigger 40, causing its periodic switching. At the same time, pulses from the output of the generator 39 are fed to the second inputs of the first 41 and second 42 logical elements "AND". From the first and second outputs of the trigger 40 pulses are fed to the first inputs of the first 41 and second 42 logic elements "And".

From the output of the first logical element “AND” 41, the pulses through the first emitter follower 43 are fed to the inputs of the second 36 and fourth 38 differentiating “RC” circuits, the outputs of which pulses are fed to the third inputs of the second 32 and fourth 34 timing “RC” circuits. This ensures the synchronous operation of the second 26 and fourth 28 PWM controllers.

From the output of the second logical element “AND” 42 pulses through the second emitter follower 44 are fed to the inputs of the first 35 and third 37 differentiating “RC” circuits, the outputs of which pulses are fed to the third inputs of the first 31 and third 33 timing “RC” circuits. This ensures the synchronous operation of the first 25 and third 27 PWM controllers.

From the non-inverting outputs "B" of the first 25 and second 26 PWM controllers through the first 22 and second 23 control transformers, pulses of the required duration are fed to the gates of the first 3 and second 4 charging MOS transistors, ensuring their alternate switching on. The duration of these pulses is approximately equal to 1/2 the repetition period of the clock pulses of the generator.

From the non-inverting outputs “B” of the third 27 and fourth 28 PWM controllers, control pulses are fed to the gates of the first 15 and second 16 modulating MOS transistors, ensuring their alternate switching on.

The magnitude of the voltage across the load resistor 19 with its constant resistance is determined by the magnitude of the voltage at the outputs of the first 17 and second 24 voltage dividers. The same voltages determine the duration of the pulses at the non-inverting outputs "B" of the third 27 and fourth 28 PWM controllers and, therefore, the duration of the conductive state of the first 15 and second 16 modulating MOS transistors. With increasing duration of the conductive state of the first 15 and second 16 modulating MOS transistors, the voltage across the load resistor 19 decreases.

After turning on the power at the first moment of time, the third 27 and fourth 28 PWM controllers provide a smooth start-up of the converter, forming pulses of maximum duration at their outputs "B". The modulating MOS transistors 15, 16 are open, and through the rectifier 14 they close the secondary winding of the power transformer 11. At the primary winding of the power transformer 11, the voltage is almost zero, since the reduced resistance of the resonant circuit is zero. The voltage at the output of the rectifier 13 and, therefore, at the load resistor 19 is also equal to zero.

When you turn on the first charging MOS transistor 3, the direct current of the resonant circuit flows through the circuit: positive terminal 1, drain-source of the MOS transistor 3, resonant capacitor 9, resonant inductor 10, primary winding of the power transformer 11, capacitor 8, negative terminal 2. Since the active resistance of the resonant circuit is almost zero, there is a reverse current that flows through the circuit: negative terminal 2, capacitor 8, primary winding of the power transformer 11, resonant inductor 10, resonant condenser Sator 9, recovery diode 5, positive terminal 1. Energy is recovered to the converter power circuit.

When the second charging MOS transistor 4 is turned on, the direct current of the resonant circuit flows through the circuit: positive terminal 1, capacitor 7, primary winding of the power transformer 11, resonant inductor 10, resonant capacitor 9, drain-source of the MOS transistor 4, negative terminal 2. Since the active resistance of the resonant circuit is almost zero, a reverse current arises that flows through the circuit: negative terminal 2, recovery diode 6, resonant capacitor 9, resonant inductor 10, primary winding of the power supply descriptor 11, capacitor 7, positive terminal 1. Energy is being recovered to the converter power circuit.

During start-up at the non-inverting outputs “B” of the third 27 and fourth 28 PWM controllers, the duration of the control pulses gradually decreases. Time intervals are formed where the rectifier 14 does not close the secondary winding of the power transformer 11. A current flows through the primary winding of the power transformer 11. The output of the rectifier 13 and, therefore, the load resistor 19 appears voltage.

As the filter capacitor 18 charges and the voltage across the load resistor 19 increases, the reduced active resistance of the resonant circuit increases, the return current decreases and then only forward current flows.

Soft start continues until the time when the voltage across the load resistor 19 reaches the rated value. Voltage feedback starts to work. The converter goes into voltage stabilization mode on the load resistor 19.

The voltage across the load resistor 19 through the voltage divider 17 of the voltage feedback circuit is supplied to the non-inverting inputs “IN” of the third 27 and fourth 28 PWM controllers. There is a change in the duration of the pulses from the non-inverting outputs “B” of the third 27 and fourth 28 PWM controllers, which ensures that the voltage across the load resistor 19 is constant.

At the minimum allowable voltage at terminals 1, 2, the gates of the first 15 and second 16 modulating MOS transistors are supplied with pulses from the “B” outputs of the third 27 and fourth 28 PWM controllers of minimum duration.

With a short circuit in the load, the current in the resonant circuit of the converter is limited by its wave impedance.

With a constant value of the load resistance 19 volt-second integrals of the voltage applied to the windings of the transformer 11 are unchanged. Moreover, the induction curve of the magnetic core of the transformer 11 and the voltage at the output of the integrator 29 contain only a variable component and do not have a constant component, and the voltage of the filter 30 is zero, that is, the feedback on the constant component of the induction does not work.

With a dynamic load, characterized by alternating time intervals with large and small load resistance 19, the volt-second integrals of the voltage applied to the windings of the transformer 11 have different values, which causes the appearance of a constant component of induction, as well as the voltage at the output of the integrator 29 and at the output of the filter 30. Feedback begins on the constant component of induction.

When the device is operating on a heavy load interval, the duration of the volt-second integrals and the increments of the magnetic induction of the transformer are significant.

In the low-load interval, the volt-second integrals are small and the magnetic induction in the transformer changes little, maintaining the value that was at the time the previous cycle ended. As a result, a constant component of induction appears in the magnetic circuit of the transformer.

The appearance of a constant component of induction causes saturation of the magnetic circuit of the power transformer and a sharp increase in the current of the primary winding, which leads to current overloading of charging MOS transistors and their failure.

The pulse duration at the non-inverting output "B" of the third 27 and fourth 28 PWM controllers and the duration of the conductive state of the first 15 and second 16 modulating MOS transistors also depends on the resistance of the resistor in the second divider 24 and the output voltage of the filter 30.

With the connection of the circuit elements shown in the drawing, transistors 3 and 15 operate at a positive voltage on the windings of the power transformer 11, when the potential of the beginning of each winding of the transformer 11 is positive relative to its end, and transistors 4 and 16 operate at a negative voltage.

The alternating voltage taken from the measuring winding 12 is supplied to the input of the integrator 29, the output voltage of which is proportional to the induction of the magnetic circuit of the power transformer 11, and then to the input of the filter 30. The output voltage of the filter 30 is proportional to the constant component of the induction of the magnetic circuit of the power transformer 11.

When the value of the constant component of the induction of the magnetic core of the power transformer 11 is zero, the output voltage of the filter 30 is zero. At the same time, the voltage from the second divider 24, which determines the value of the output voltage of the converter, is applied to the inverting inputs “IN” of the third 27 and, through the adder 21, the fourth 28 of PWM controllers. The non-inverting inputs “IN” of the third 27 and fourth 28 PWM controllers are supplied with voltage from the output of the first divider 17, which is a feedback signal.

The polarity of the output voltage of the filter 30 is determined by the difference of the total volt-second integrals, which are provided by the first 3 and second 4 charging MOS transistors when the converter is operating on a heavy load interval.

If the positive volt-second integral due to the operation of the charging MOS transistor 3 is greater than the negative volt-second integral due to the operation of the MOS transistor 4, then at the end of the heavy load interval, the potential of the beginning of each winding of the transformer 11 is positive relative to its end. In this case, the output voltage of the filter 30 is positive, the output voltage of the adders 20 and 21 increases.

The voltage at the non-inverting input “IN” of the first PWM controller 27 increases. Due to this, the duration of its pulse at the output “B” increases. The duration of the conducting state of the MOS transistor 15 and the duration of the shunting of the winding of the transformer 11 on the positive half-cycle of the voltage on it also increase.

At the same time, the voltage supplied to the inverting input “IN” of the second PWM controller 28 increases, which leads to a decrease in the duration of its pulse at the non-inverting output “B”. The duration of the conducting state of the MOS transistor 16, and the duration of the shunting of the winding of the transformer 11 on the negative half-cycle of the voltage on it are reduced.

All this causes a decrease in the positive volt-second integral, an increase in the negative volt-second integral and a decrease in the constant component of the induction of the magnetic core of the power transformer 11 to zero.

Due to the feedback implemented in this way on the constant component of the induction at the beginning of each interval of a large load, the change in the induction occurs from a zero value of its constant component, which eliminates the saturation of the magnetic circuit of the power transformer 11 and the current overload of the charging MIS transistors 3, 4.

The exception of saturation of the magnetic core of the power transformer allows you to:

- implement a transformer with a small cross section of the magnetic circuit and a small number of turns, which ensures a reduction in the mass and dimensions of the transducer as a whole, and an increase in its efficiency;

- to prevent a sharp increase in the current of the primary winding, the current overload of the charging MOS transistors and their failure during operation of the proposed quasi-resonant converter to dynamic load, which increases the reliability of the invention;

- realize the operation of the transformer of the converter under various operating modes of the load, which ensures the expansion of its scope.

Thus, due to the introduction of new elements and the relationships between them, it is ensured:

- improving reliability in all operating modes of the load and efficiency of the Converter as a whole;

- reduction of its mass and dimensions;

- expanding the scope of the proposed quasi-resonant converter due to the possibility of its use under dynamic load.

Information sources

1. Patent for the invention of the Russian Federation No. 2385526, Stabilized quasi-resonant transducer / Kirienko VP, Strelkov VF, Bull. No 9, 2010

2. Schemes of PWM controllers 1156EU2.3. // Scientific and technical center of circuitry and integrated technologies. - Bryansk, 2000.22 s.

3. Patent for the invention of the Russian Federation No. 2418355, Stabilized quasi-resonant transducer / Kirienko VP, Strelkov VF, Vanyaev VV, Bull. No.13, 2011

Claims (1)

A stabilized quasi-resonant converter containing two series-connected charging MOS transistors, two series-connected recovery diodes, two series-connected capacitors, series-connected resonant capacitor and inductor, a power transformer with primary and secondary windings, two rectifiers, a filter capacitor, a load resistor, a modulating MPD -transistor, two voltage dividers, two single-cycle PWM controllers, two control transformers, timing RC "circuit, emitter follower, two differentiating" RC "circuits, with the drain of the first charging MOS transistor, the cathode of the first recovery diode and the first output of the first capacitor connected to the positive terminal of the power source, and the source of the second charging MIS transistor, anode the second recovery diode and the second output of the second capacitor are connected to the negative terminal of the power source, the common connection point of the charging MOS transistors and recovery diodes through a resonant capacitor and inductor are connected to the beginning at the primary winding of the power transformer, the end of which is connected to a common point of connection of the capacitors, and the first rectifier is connected to the secondary winding of the power transformer, the output of which is connected a load resistor shunted by the filter capacitor, and a second rectifier, to the positive terminal of which is connected the drain of the modulating MOS transistor and to the negative connected to the negative output of the first rectifier, its source, the outputs of the first and second control transformers are connected to the gates of the first and second of charging MOS transistors, characterized in that the measuring winding of the power transformer, the second modulating MOS transistor, the third and fourth single-cycle PWM controllers, the second, third and fourth timing RC “circuits, the third and fourth differentiating RC” are introduced circuit, second emitter follower, first and second adders, integrator, filter, clock, trigger, first and second logic gates "And", and the drain-source of the second modulating MOS transistor is connected to the drain-source of the first module MOS transistor, the end of the measuring winding of the power transformer is connected to the negative terminal of the first and second rectifiers, and the beginning is connected to the input of the integrator, the output of which through the filter is connected to the first inputs of the first and second adders, the output of the first voltage divider, the input of which is connected to the positive terminal the first rectifier, connected to the non-inverting input “IN” of the fourth PWM controller and the second input of the first adder, the output of which is connected to the non-inverting input “IN” of the third PWM controller, input the second voltage divider is connected to the output "REF" of the third PWM controller, and the output of the second voltage divider is connected to the inverting input "IN" of the third PWM controller and to the second input of the second adder, the output of which is connected to the inverting input "IN" of the fourth PWM controller , the output of the clock generator is connected to the input of the trigger and the second inputs of the first and second logic elements "And", the first and second outputs of the trigger are connected to the first inputs of the first and second logic elements "And" of the logical element "And" through the first emitter follower is connected to the inputs of the second and fourth differentiating "RC" circuits, and the output of the second logical element "And" through the second emitter follower is connected to the inputs of the first and third differentiating "RC" circuits, the outputs of the first , the second, third and fourth differentiating “RC” circuits are connected to the third terminals of the first, second, third and fourth time-setting “RC” circuits, the terminals 1, 2 of which are connected to the terminals “R” and “C” of the first, second, third and the fourth single-cycle PWM counter respectively, the outputs “B” of the first and second PWM controllers are connected to the inputs of the first and second control transformers, and the outputs “B” of the third and fourth PWM controllers are connected to the gates of the first and second modulating MOS transistors.