RU2472279C1 - Frequency-width-pulse controller of ac voltage with distributed load - Google Patents

Abstract

FIELD: electricity.

SUBSTANCE: device comprises a terminal for connection of a setting signal source, a summator, an integrator, from the first to the third relay elements, from the first to the sixth comparators, from the first to the third dynamic D-triggers, terminals of buses with grid voltages of phases A, B, C, from the first to the ninth power switches, load resistors, a zero potential bus, current sensors, from which every one comprises a current transformer, a demodulator (rectifier) and a smoothing filter. The substantial difference of the proposed device is represented by its higher energy indices, achieved due to the fact that each of grid voltage phases operates n the mode of multizone frequency-width-pulse modulation, which becomes possible due to introduction of power switches into A, B, C phases and their appropriate connection to outputs of D-triggers.

EFFECT: higher energy indices of a voltage controller, due to load current balancing between phases.

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Description

The invention relates to power conversion technology and can be used in temperature controllers.

Known multi-zone integrating deploying converter (MCI) (SU No. 1283801, G06G 7/12, application. 22.05.85, publ. 15.01.87, bull. No. 2) containing adders, a group of parallel integrators, an odd number of relay elements.

The device is characterized by high reliability in case of single failures of relay elements and belongs to the class of systems with self-diagnosis of active components of the circuit and automatic commissioning of workable elements (Tsytovich L.I. Multi-zone deploying converter with a structure adaptable to the fault function of active components // Devices and Technique experiment. - M.: USSR Academy of Sciences, 1988. - No. 1. - P.81-85).

A disadvantage of the known technical solution is its low energy performance, since there is no possibility of "equalization" of the load current between the relay elements.

Known MCI (SU No. 1183988, G06G 7/12, decl. 04/27/84, publ. 07.10.85, bull. No. 37), containing adders, integrator, relay elements, input and output terminals.

The device belongs to the class of self-oscillating frequency-latitude-pulse (CWPM) converters of the integrating type, has high noise immunity and accuracy, due to the closed nature of the MCI structure and the presence of an integrator in the direct control channel.

However, the known technical solution also has low energy performance, which prevents its use in powerful AC voltage regulators.

Closest to the proposed device is a multi-zone AC voltage regulator (patent SU No. 2408969, IPC Н02М 5/293, application form 23.12.09, publ. 10.01.11, bulletin No. 1), containing a reference signal source and a first adder, connected in series, the output of which is connected to the inputs of three relay elements, the outputs of which are connected to the inputs of the second adder, the output of which is connected to the second input of the first adder, three comparators, the inputs of which are connected to the output of the corresponding relay elements, three key elements, each of which rykh is connected between the source of the corresponding phase of the three-phase voltage source and the load connected by a star circuit with a zero output, the output of the second and third comparators are connected to the control input of the second and third key elements, respectively, the fourth comparator and the dynamic D-trigger, and the input of the fourth comparator connected to the power input of the first key element, and the output is connected to the C-input of the D-trigger, the D-input of the D-trigger is connected to the output of the first comparator, and the output of the D-trigger is connected to the control the input of the first key element.

The disadvantage of the prototype device is its low energy performance, since there is also no possibility of a stable and uniform distribution of the load current between the phases of the mains voltage.

The basis of the invention is a technical problem, which consists in increasing the energy performance of the voltage regulator, due to the equalization of the load current between the phases.

The specified technical problem is solved in that a frequency-latitude-pulse AC voltage regulator with distributed load, containing a sequentially connected reference signal source - an input terminal, an adder, an integrator, the output of which is connected to the input of the first second and third relay elements, the outputs of which are connected to the inputs the first, second and third comparators, respectively, the output of the first comparator is connected to the D-input of the first dynamic D-flip-flop, phase buses A, B, C, connected respectively through h first, second and third power switches to a three-phase load with zero output, and the phase A bus is also connected to the input of the fourth comparator, the output of which is connected to the C-inputs of the first D-trigger, characterized in that the outputs of the first, second and third relay elements connected to the corresponding inputs of the adder, introduced the fifth and sixth comparators, as well as the second and third D-flip-flops, while the inputs of the fifth and sixth comparators are connected to the phase buses B and C, respectively, and the outputs are connected to the C-inputs of the second and third D-flip-flops ditch, respectively, the D-input of the second and third D-flip-flops is connected to the output of the second and third comparators, respectively, the fourth and fifth power switches are additionally introduced into phase A, the sixth and seventh power switches are in phase B, the eighth and ninth phases are in phase C, and the load in each phase is a parallel connection of three circuits, and the output of the first, fourth and fifth power switch, respectively, is connected to the first, second and third load circuit of phase A, the output of the sixth, second and seventh power switch is respectively connected to howling, the second and third phase B load circuit, the output of the eighth, ninth and third power switch, respectively, is connected to the first, second and third phase C load circuit, the output of the first D-trigger is connected to the control input of the first, sixth and eighth power switch, the output of the second The D-flip-flop is connected to the control input of the fourth, second and ninth power switch, the output of the third D-flip-flop is connected to the control input of the fifth, seventh and third power switch, phase current sensors A, B, C are introduced, the outputs of which are connected to the corresponding the adder inputs.

The technical result of the proposed device is its increased energy performance, namely the reduction in energy consumption, achieved due to the fact that each of the phases of the mains voltage operates in the multi-zone frequency-pulse-width modulation mode. Moreover, due to the stable and uniform distribution of the load current between the phases of the mains voltage, the reliability of the device is further increased.

A distinctive feature of the claimed solution is that a second and third D-trigger, a fifth and sixth comparator and three current sensors for each of the phases are additionally introduced into the frequency-pulse-width AC voltage regulator. In this case, the load in each phase is a parallel connection of three circuits connected to the bus of the corresponding phase by three power switches, which are controlled from three D-flip-flops. Moreover, the output of the first, fourth and fifth power switch is respectively connected to the first, second and third phase A load circuit, the output of the sixth, second and seventh power switch is respectively connected to the first, second and third phase B load circuit, the output of the eighth, ninth and third power the key is respectively connected to the first, second and third phase C load circuit, the output of the first D-trigger is connected to the control input of the first, sixth and eighth power switch, the output of the second D-trigger is connected to the control input of the fourth , of the second and ninth power switch, the output of the third D-trigger is connected to the control input of the fifth, seventh and third power switch, phase current sensors A, B, C are also introduced, the outputs of which are connected to the corresponding inputs of the adder.

The invention is illustrated by drawings, which represent the following:

Figure 1 - functional diagram of the proposed device;

Figure 2 is a functional diagram of a current sensor;

Figure 3, a-d - characteristics of the main elements of the voltage regulator;

4, a-e are timing diagrams of signals for a simplified functional diagram of a voltage regulator;

Figure 5, a-l - timing diagrams of the voltage regulator signals.

The structure of the device (Fig. 1) includes a sequentially connected source of the reference signal - input terminal 1, adder 2 and integrator 3, the output of which is connected to the input of the first 4, second 5, and third 6 relay elements. The outputs of the relay elements 4, 5, 6 are connected to the corresponding inputs of the adder and to the inputs of the first 7, second 8 and third 9 comparators, respectively. D-inputs of dynamic D-flip-flops 10, 11 and 12 are connected to the output of the first 7, second 8 and third 9 of the comparator, respectively. C-inputs of D-flip-flops 10, 11 and 12 are connected to the outputs of the fourth 13, fifth 14 and sixth 15 of the comparator, respectively. The inputs of the comparators 13, 14 and 15 are connected to the phase buses A, B, C, respectively. Phase A, B, C buses - terminals 16, 17, 18 are connected through the first 19-1, second 20-2 and third 21-3 power switches to a three-phase load with zero output 22. Two more power switches are additionally introduced into each phase So, the fourth 19-2 and fifth 19-3 power switch are introduced into phase A, the sixth 20-1 and seventh 20-3 power switches are entered into phase B and the eighth 21-1 and ninth 21-2 power switches are entered into phase C. Moreover, the load 22 in each phase is a parallel connection of three circuits. Terminal 23 is for measuring the current in the neutral wire. The output of the D-trigger 10 is connected to the control inputs of the power switches 19-1, 20-1 and 21-1 connected to phase A. The output of the D-trigger 11 is connected to the control inputs of the power keys 19-2, 20-2 and 21-2 connected to phase B. The output of the D-flip-flop 12 is connected to the control inputs of the power switches 19-3, 20-3 and 21-3 connected to phase C. The current sensors 24, 25, 26 of phases A, B, C, respectively, have analog output connected to the corresponding inputs of adder 2.

The composition of the current sensors 24, 25, 26 includes (FIG. 2) a current transformer 27, a demodulator (rectifier) 28, a smoothing filter 29.

The blocks of the voltage regulator have the following characteristics (figure 3).

The adder 2 is made with equal transmission coefficients for each of the inputs. In the future, we believe that these transmission coefficients are equal to 1.0.

Integrator 3 is implemented with a transfer function of the form W (p) = 1 / T _and p, where T _and is the time constant. Its output signal increases linearly with a jump in the input action with a sign opposite to the sign of the input signal (Fig. 3 a).

Relay elements 4, 5, 6 have a symmetrical hysteresis loop and switching thresholds that satisfy the condition

| ± b ₁ | <| ± b ₂ | <| ± b ₃ |,

where ± b _i are the switching thresholds of the corresponding relay elements 4, 5, 6. The output signal of each of the relay elements 4, 5, 6 varies discretely within ± A / 3 (Fig. 3 b).

The comparators of the first group 7, 8, 9 have a non-inverting characteristic with zero switching thresholds, are designed to convert a bipolar input signal into unipolar pulses (Fig.3c) and perform the functions of repeaters with a truth table

entrance Exit A / n one -A / n 0

where ± A is the maximum value of the output signal of the adder 2.

The comparators of the second group 13, 14, 15 have a characteristic similar to the comparators of the first group 7, 8, 9, and switch to state “1” with a positive half-wave of the phase voltage (Fig. 3d).

D-flip-flops 10, 11, 12 are dynamic and switch on the leading edge of the pulse at the C-input to a state that has a D-input (Fig. 3d).

Power switches 19-1, 19-2, 19-3, 20-1, 20-2, 20-3, 21-1, 21-2, 21-3 are normally open, go into the closed position when the signal is logical "1" at their control entrance.

The load 22 is active, where each of the resistors has a value of 3R.

The current sensors 24, 25, 26 (figure 2) are linear and implement the feedback loop of the AC voltage regulator for the load current.

In the signal diagrams (Fig. 4), constructed for a simplified functional diagram of a pulse-frequency pulse-width AC voltage regulator with distributed load, the following notation is adopted:

X _I - input signal (terminal 1);

Y _and (t) is the output signal of the integrator 3;

Y _p1 , Y _p2 (t), Y _p3 (t) - output signals of relay elements (RE) 4, 5, 6, respectively;

Y _o (t) is the total signal at the output of RE 4, 5 and 6;

Y ₀ - the average value of the total signal at the output of RE 4, 5, 6.

The principle of operation of a pulse-width-frequency-pulse AC voltage regulator with distributed load is as follows.

When you turn on the AC voltage regulator with distributed load and zero input signal X _I on terminal 1, the relay elements 4, 5, 6 are set arbitrarily, for example, in the state + A / 3 (figv, d, e). Under the action of the sweep signal from the output of the integrator 3 (Fig. 4 b), two relay elements 4 and 5 are sequentially switched to the position -A / 3 (since the relay elements 4 and 5 have the lowest switching thresholds b ₁ and b _2, respectively) (Fig. 4c, d, time instants t ₀₁ , t ₀₂ ), after which the direction of the sweep transform changes, and the output signal Y _and (t) at the output of the integrator 3 rises in the positive direction.

Thus, the frequency-latitude-pulse AC voltage regulator with distributed load enters the stable self-oscillation mode when the amplitude of the sweep signal at the output of the integrator 3 is limited by the ambiguity zone of the first relay element 4 (with minimum switching thresholds b ₁ ), and the relay elements 5 and 6 are in states that are static and opposite in sign of the output signals.

In the absence of a signal X _I (Fig. 4a, t <t ₀ ) at terminal 1, the total average value of the signals at the output of relay elements 4, 5, 6 is zero.

влечет за собой изменение частоты и скважности импульсов выходных импульсов релейного элемента 4, так как в одном из интервалов преобразования t₁ (фиг.4в) развертка на выходе интегратора 3 изменяется под действием разности сигналов, подаваемых на сумматор 2, а в другом интервале преобразования t₂ - зависит от суммы этих воздействий. В результате изменяется скважность выходных импульсов релейного элемента 4 (фиг.4в).The presence of the reference signal at the terminal 1 X _I (A / 3) (figa,

entails a change in the frequency and duty cycle of the pulses of the output pulses of the relay element 4, since in one of the conversion intervals t ₁ (Fig. 4c) the sweep at the output of the integrator 3 changes under the influence of the difference of the signals supplied to the adder 2, and in the other conversion interval t ₂ - depends on the sum of these effects. As a result, the duty cycle of the output pulses of the relay element 4 is changed (Fig. 4c).

If the input signal X _BX increased discretely to a value of (A / 3) <X _BX <A (Fig. 4a), then the pulse-frequency pulse-width AC voltage regulator with distributed load goes to the stage of reorientation of the states of two relay elements 5 and 6, which ends when the third relay element 6 switches to the position -A / 3 (fig.4d). The total output signal of the relay elements 4, 5, 6 reaches level -A (Fig.4e), and the frequency-pulse-width AC voltage regulator with distributed load goes into the second modulation zone, where the speed of the scan signal at the output of the integrator 3 is also determined by the difference or the sum of the signals acting on the adder 2.

The transition of a system from one modulation zone to another for small increments of the input signal is accompanied by the transition of a frequency-latitude-pulse AC voltage regulator with distributed load through characteristic points with a zero value of the frequency of carrier oscillations (frequency-zero conjugation of modulation zones).

Let us consider the operation of a pulse-width-frequency-pulse AC voltage regulator with distributed load for the first modulation zone, when the first relay element 4 is in the switching state, the second relay element 5 has a static state + A / 3, and the third relay element 6 has a static state -A / 3 (Fig. 4 c, d, d). In this case, the output signal of the integrator 3 is limited by the switching thresholds ± b1 (Fig.4b).

The comparators of the first group 7, 8, 9 convert the bipolar input signal (Fig.3c) into unipolar pulses, which set the desired state of the D-flip-flops 10, 11, 12.

The comparators of the second group 13, 14, 15 switch to the state "1" during the formation of a positive half wave of phase voltage (Fig. 3d).

Dynamic D-flip-flops 10, 11, 12 switch on the leading edge of the pulses from the outputs of the comparators of the second group 13, 14, 15 to the state that their D-input has (Fig. 3d). If the frequency of intrinsic self-oscillations of a frequency-latitude-pulse AC voltage regulator with distributed load is much lower than the mains voltage period, then the delay introduced by D-triggers 10, 11, 12 is negligible. This makes it possible to consider the switching times of the first relay element 4 (Fig. 4c) coinciding with the transition of the sawtooth sweep signal of the corresponding switching threshold ± b1.

The comparator 13 generates the pulses "1" synchronously with the "positive" half-wave voltage of phase A (figa, b). Relay element 4 (Fig.5d) sets the necessary state of comparator 7 (Fig.5e) and D-trigger 10 (Fig.5i), into which it switches by the first pulse that matches the signal "1" at the output of comparator 7 (Fig. 5e). Turning off the D-trigger 10 occurs on the first pulse within the "zero" state of the comparator 7 (Fig.5e, and). As a result, on the interval t ₀₁ -t ₀₂ (Fig.5i), a “zero” pause is formed in the load.

Current sensors 24, 25, 26 form a negative feedback loop of a frequency-pulse-width AC voltage regulator for the load current.

Thus, in the mode of frequency-pulse-width-pulse modulation, the keys 19-1, 20-1, 21-1 (FIG. 5 and) of phase A work, the keys 19-2, 20-2, 21-2 are constantly turned on (FIG. 5 k) of phase B, and in the “off” state are the keys 19-3, 20-3, 21-3 (Fig. 5 l) of phase C. Moreover, each of the load resistors 22 has a resistance of 3R, which is applied to the device the prototype is equivalent to the inclusion in each of the phases of the resistance equal to R.

As a result, all phases of the mains voltage are equally loaded with current, which improves the energy characteristics of the system as a whole.

Thus, the introduction of an alternating voltage into the frequency-pulse-width regulator with a distributed load of additional power switches and their corresponding connection with the D-triggers 10, 11, 12 positively affects the energy characteristics of the voltage regulator.

The considered frequency-latitude-pulse alternating voltage regulator with distributed load is supposed to be used as a temperature regulator in the hydrothermal synthesis process control system in the manufacture of radio engineering quartz crystals at OJSC "South Ural Plant" Crystal ".

Claims (1)

Frequency-pulse-width AC voltage regulator with distributed load, containing sequentially connected reference signal source - input terminal, adder, integrator, the output of which is connected to the inputs of the first, second and third relay elements, the outputs of which are connected to the inputs of the first, second and third comparators accordingly, the output of the first comparator is connected to the D-input of the first dynamic D-trigger, phase buses A, B, C, connected respectively through the first, second and third power switches to three phase load with a zero output, and the phase A bus is also connected to the input of the fourth comparator, the output of which is connected to the C-inputs of the first D-trigger, characterized in that the outputs of the first, second and third relay elements are connected to the corresponding inputs of the adder, the fifth and the sixth comparators, as well as the second and third D-flip-flops, while the inputs of the fifth and sixth comparators are connected to the phase buses B and C, respectively, and the outputs are connected to the C-inputs of the second and third D-flip-flops, respectively, D-inputs of the second and third D-flip-flops are connected to the outputs of the second and third comparators, respectively, the fourth and fifth power switches are additionally introduced into phase A, the sixth and seventh power switches are in phase B, the eighth and ninth are in phase C, and the load in each phase is a parallel connection of three circuits moreover, the outputs of the first, fourth and fifth power switches are respectively connected to the first, second and third phase A load circuits, the outputs of the sixth, second and seventh power switches are respectively connected to the first, second and third load circuits phase B, the output of the eighth, ninth and third power keys are respectively connected to the first, second and third load circuits of phase C, the output of the first D-trigger is connected to the control inputs of the first, sixth and eighth power keys, the output of the second D-trigger is connected to the control inputs of the fourth, second and ninth power switches, the output of the third D-trigger is connected to the control inputs of the fifth, seventh and third power switches, phase current sensors A, B, C are also introduced, the outputs of which are connected to the corresponding inputs of the adder.

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