RU2371731C1 - Method of sorting microchips of random access memory as to uninterrupted operation level - Google Patents

Abstract

FIELD: information technologies.

SUBSTANCE: determination of integrity of the recorded test information and sorting of RAM microchips as to resistance to the effect of impulse ionising radiation (IIR) is performed during manufacture of microchips on all the products of the manufactured batch. At that, microchips are exposed to radiation not less than twice with impulse radiation of the laser simulating the effect of gamma-radiation as per the required uninterrupted operation level (UOL) with the following determination of integrity of the information pre-recorded to the microchip. As information code, there used are "diagonal" and "inverse diagonal" codes.

EFFECT: possibility of imitating impulse ionising radiation, performing the sorting of microchips of RAM as per Uninterrupted Operation Level parametre during the manufacturing process, and determining the actual UOL and operability of RC circuit in each cell and each certain RAM microchip as a whole to the effect of impulse ionising radiation.

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Description

The invention relates to the field of electronic technology, in particular, is intended for sorting chips of random access memory (RAM) with high resistance to the level of smooth operation (UBR).

Known methods for sorting microcircuits by radiation resistance, when radiation resistance is understood as resistance to the accumulated dose of exposure to ionizing radiation (AI).

A known method of selection of radiation-resistant electronic products [1], including irradiating a batch of products with a relatively small dose of gamma rays or electrons, followed by selection and exclusion from the batch of devices with the largest changes in parameters. It is also possible to irradiate with a full dose equivalent to the expected absorbed dose of radiation in real operating conditions, and restore the initial parameters after irradiation by annealing at elevated temperature.

The disadvantage of this method is the inability to predict the level of failure of the chip when exposed to pulsed ionizing radiation.

The closest analogue to the prototype of the invention is [2] a method for sorting a batch of integrated memory devices in terms of radiation resistance to ionizing radiation, mainly according to the level of smooth operation, including selecting from a batch of integrated circuits a representative sample of memory devices for testing, numbering, measuring electrical parameters and radiation tests of these microcircuits, sorting out the entire batch of storage devices into resistance groups, including marking, and before the measurement of the electrical parameters of the sample of microcircuits, the supply voltage of each microcircuit is supplied with a voltage that increases linearly to the nominal value and the contents of the matrix of memory elements of the tested storage device are read element-wise into the additional memory of the controller, then this content is bitwise inverted into the test information array in the controller, which is recorded in the same memory elements of the corresponding test storage device, when After electrical measurements are determined, for each sample chip, the value of the retention time of the corresponding test information array in the memory elements of the memory device when the supply voltage of the microcircuit is pulsed off, after radiation testing, the correlation relationship between the storage time of the test information array during the pulse power off of the microcircuit is set for the chip selection levels of failure of these microcircuits when exposed AIs determine the number of sorting groups and the corresponding boundary values of the storage time of the test information array by the magnitude of the values of the level of trouble-free operation, when sorting a batch of storage devices by resistance groups, they are fed to the power bus in turn each linear microchip linearly increasing to the rated value of the supply voltage, the contents are read out elementwise the matrix of memory elements of this microcircuit to the controller, bitwise invert this content into the test information array, which is recorded in the same memory elements of the classified microcircuit, the time of storage of the test information array in the memory elements of this microcircuit is measured when the supply voltage is switched off, the numerical value of which marks the microcircuit with the label of the corresponding group.

The disadvantages of this method are:

- the impossibility of determining the operability of RAM with increased requirements for UBR (in the presence of an RC circuit in the memory cells);

- indirect (indirect) forecasting of the UBR of memory chips by the time the test information array was stored during a pulsed shutdown of the supply voltage, which does not guarantee that devices with high UBR get into the consumer;

- the absence of a relationship between the storage time of the test information signal and the information code recorded in RAM;

- UBR determination by methods of influencing a definite sample of gamma radiation microcircuits leads to irreversible changes in microcircuit parameters and the impossibility of their further application;

- the complexity of the process of sorting.

The technical result consists in the fact that the proposed method allows you to simulate pulsed ionizing radiation (III), to sort out RAM circuits by the parameter "level of trouble-free operation" in the manufacturing process and to determine the real UBR and the operability of the RC circuit in each cell and each specific RAM circuit in in general to the effects of III.

The technical result is achieved by the fact that in the inventive method of sorting RAM chips according to the level of trouble-free operation by determining the safety of the recorded test information, the RAM chips are sorted by resistance to the effects of III during the manufacturing of chips on all products of the batch produced by irradiating the chips with laser pulses at least two times simulating the effect of gamma radiation at the required level of UBR, with the subsequent determination of the safety previously recorded in mic information schema, and as an information code used "diagonal" codes and "inverse diagonal".

Figure 1 shows the topology of the RAM memory cell with increased requirements for the level of smooth operation. The safety of information in RAM memory cells at high levels of exposure to dose rate is carried out using an RC chain connected between the shoulders of the cell trigger (figure 1) [3].

An RC circuit is a capacitor of the order of 0.6-0.8 pF and a resistor with a resistance of the order of 30-40 kOhm. The capacitor is formed, as a rule, by an active structure doped with phosphorus (lower lining), a thin layer of oxide (about 300-400 angstroms) and polysilicon in the “gate” layer (upper lining). The resistor is formed, as a rule, from an active structure with high resistance.

Approximate areas occupied on the crystal by RC-circuit elements (in one cell): capacitor - 1500 μm ² , resistor - 75 μm ² .

Hence, the main feature of RAM resistant to UBR is that most of the crystal area is occupied by capacitors in cells (for example, for a RAM with an information capacity of 64 kbit, the total area of the capacitors will be 100 mm ² ).

The role of the RC chain is to "remember" the state of the trigger "0" or "1" and restore this state after the end of the action of the III. The time constant of the RC chain is chosen much longer than the duration of the III, so that during the action of the III, the capacitor charge does not change significantly. Under normal conditions of operation of the microcircuit, in the absence of the effect of III and the formation of ionization currents, the presence of an RC circuit in the memory cell circuit does not affect the operation of the microcircuit and there is no way to check the resistance of the cell to UBR other than applying pulsed ionizing radiation to the microcircuit. The defectiveness of the initial structures and the defectiveness introduced in the manufacture of microcircuits can lead to a change in the design value of the RC chain, which will affect the UBR of the finished microcircuits, which means that they can save information in the required conditions.

Radiological rejection of samples of microcircuits collected on polyimide carriers, according to the UBR parameter, was carried out on the basis of the results of monitoring the safety of information in the microcircuit drive after equivalent radiation exposure with a level corresponding to the required level of microcircuit resistance. Information security control was carried out at supply voltages Ucc = 4.5 V in the following sequence. Prior to exposure, an information code was recorded in all LSI memory cells. During the exposure, the LSI worked in the information storage mode. After exposure, information was read from the LSI memory cells and compared with the data recorded before exposure. The working criterion was the coincidence of the read and written information after two actions of the III, provided that there was no failure in the storage of information after each exposure.

During functional control, the information codes “diagonal” and “inverse diagonal” were used, since they are the least resistant to impulse action [4].

Bibliography

1. Chernyshev A.A., Vedernikov V.V., Galeev A.I., Goryunov N.N. Radiation rejection of semiconductor devices and integrated circuits. - Foreign electronic technology, 1979. Issue 5, C.3-25.

2. The method of sorting a batch of integrated storage devices for radiation resistance (RF Patent No. 2149417, IPC G01R 31/28, G06F 11/22, publ. 05/20/2000, retrospective set of descriptions of the inventions of the Russian Federation for 2000 on DVD) (prototype).

3. Kirgizova A.V., Grigoriev N.G., Petrov A.G. Problems of simultaneously ensuring high fault tolerance and information capacity of RAM when using RC circuits in memory cells. - Sat scientific works. T.1 - M .: MEPhI, 2006, S.185-186.

4. Kirgizova A.V. The influence of the information code on the fault tolerance of CMOS SPS RAM. - Electronics, micro- and nanoelectronics. Sat scientific works. - M .: MEPhI, 2004, S.321-325.

Claims (1)

A method for sorting RAM chips according to the level of trouble-free operation by determining the safety of recorded test information, characterized in that the RAM chips are sorted for resistance to pulsed ionizing radiation during the manufacturing of chips on all products of a batch by irradiating the chips with laser pulses at least two times, simulating the effect of gamma radiation at the required level of uninterrupted operation, with the subsequent determination of the preservation of pre wrote in the chip information, and as an information code used "diagonal" codes and "inverse diagonal".