RU2267137C1 - Monopulse radar station - Google Patents

Abstract

FIELD: the invention refers to radiolocation systems primarily to coherent target detecting radars with continuous radiation.

SUBSTANCE: exceeding requirements are demanded from these systems using a linear frequency modulation signal additionally modulated on the frequency to reduce the time of observation of the scene and an amplitude summary-differential mono pulse pattern of direction finding of targets working on mobile bearers. The arrangement has an antenna block, a summary-differential transformer, an antenna switch, a power amplifier, a directed coupler, a commutated filter of transmission, a multiplier of a frequency, a synthesizer of a probing signal, a driver, a generator of manipulated sequences, a synchronizer, an arrangement for processing of information, a measuring unit of the speed and the angle of drift, commutated filters of summary and differential channels, a two-channel summary-differential receiver, phase detectors of the summary and the differential channels, amplifiers of a Doppler frequency of the summary and the differential channels, an automatic regulation of strengthening, blocks of Doppler filters of the summary and the differential channels, interrogation blocks of the summary and the differential channels, a combining block of quadratures, an angle discriminator, a divisor, an antenna driving gear, two-channel amplifier of a high frequency, a two-channel balance mixer, a two-channel amplifier of an intermediate frequency, blocks of secondary and initial processing.

EFFECT: provides possibility for working of an airborne mono impulse radar with a single receiving-transmitting antenna in continuous mode.

1 cl, 16 dwg

Description

The present invention relates to radar systems (radar), mainly to coherent radar for detecting targets with continuous radiation, which are subject to increased requirements for reducing scene viewing time using an LFM signal, additionally frequency-manipulated, and an amplitude total-difference single-pulse direction finding principle operating on mobile carriers.

In known on-board monopulse radars, the pulse mode of the transceiver is used. An example is a device [2, Fig. 1.9]. In this device, the transmitter signal through the antenna switch and the sum-difference converter enters the monopulse antenna of the amplitude type and is emitted along all the rays in the direction of the target, the reflected signals received by the monopulse antenna after the sum-difference conversion are supplied from its first (total) output through a series-connected antenna a switch, mixer, and amplifier of the total channel at the first input of the phase detector, a difference signal arrives at the second input of the phase detector, coming from the second (differential) output of the total-differential converter through a series-connected mixer and the IF amplifier of the differential channel. As a result of phase detection, a signal of the angular mismatch of the target with respect to the equal signal direction (RSN) is generated, which through the amplifier controls the antenna control system, respectively, the position of the RSN antenna. The error signal is used in the auto tracking mode of the target by angle. To ensure the independence of the steepness of the direction-finding characteristic of the device in angle from the level of the input signal, both IFs using the AGC connected at the input to the output of the IFS of the total channel are covered by feedback.

The disadvantage of this device is the operation in pulsed mode with a simple non-coherent signal, which requires an increased pulse power of the transmitter and low noise immunity.

A device is known for a monopulse radar operating with a chirp signal in a pulsed low duty cycle (quasi-continuous mode) measuring the range and angular coordinates of the target [2, Fig. 1.22, p. 41], containing the first mixers of the total and difference channels, where the received high-frequency signals are heterodyned , then sequentially amplified in the IFA of the total and difference channels and transferred using 2 mixers to the video frequency. The reference frequency arriving at the second inputs of the 2 mixers is the LFM signal modulating the probing signal shifted to the first intermediate frequency. The sum and difference signals after 2 mixers are fed to the Doppler frequency amplifiers (UDM) of the total and difference channels, where they are filtered in the working difference frequency band of the reflected signal. UDM signals after mixing with the tracking oscillator frequency are fed to the Doppler filters (DF) of the total and difference channels. Thus, the DF signals of the sum and difference channels contain signals filtered in a narrow band of the DF, corresponding to one of the purposes for which the frequency shift of the reflected signal relative to the probing one (the frequency shift corresponds to the distance to the target) corresponds to the setting of the tracking local oscillator. The frequency control of the tracking local oscillator comes from a frequency discriminator connected to the differential channel DF. When capturing the shear frequency of the reflected signal relative to the probe, the output signal of the phase detector (error signal) connected to the DF outputs of the sum and difference channels corresponds to the angular deviation of the target from the RSN and is used later on by fixing the angular position of the RSN when the error signal goes through zero when scanning the antenna . In addition, measuring the frequency of the tracking local oscillator in the capture mode allows you to determine the range to the target.

The disadvantage of this monopulse radar is that, when operating in quasi-continuous mode, it has at least twice the peak transmitter power compared to the power of the transmitter operating in continuous mode. In addition, in the review mode, it takes a long time to search for the target signal (scene review) in the entire operating range, since for analyzing the signal at each range, it is necessary to adjust the repetition frequency of the probe pulses, which ensures that the reflected signal is between the probing ones.

Another quasimonopulse radar operating with a continuous probing signal [3], formed by the manipulation of 2 carrier frequencies modulated by a single continuous LFM signal, monitors the Earth’s surface for lateral sighting from an aircraft (LA) in the direction of the elevated RSN formed by two RSNs periodically switched antenna beams. Each beam has its own carrier frequency.

The disadvantage of this device is that due to the alternate switching of the transmitter to the antenna beams, the efficiency of using the transmitter power is two times lower than in a single-pulse radar that emits, receives and analyzes the signal along the rays at the same time. As in the previous quasicontinuous radar, the analysis of the presence of signals in a wide working range of ranges requires a tuning of the carrier frequency manipulation frequency, which increases the necessary time for target search (scene review) in the review mode.

The closest in technical essence to the proposed monopulse radar and adopted as a prototype is a device [1]. The prototype device allows the tuning of the carrier frequency from pulse to pulse and uses a signal with intrapulse phase shift keying. The reflected signals after the total-differential conversion are fed into two channels - the total and the differential. Each channel represents a series-connected high-frequency amplifier (UHF), a mixer, an intermediate-frequency amplifier (UHF), a block of phase detectors, amplitude quantizers of signals from phase detectors, and a digital matched filter. The quadrature components of the signals obtained at the outputs of the digital matched filters are then sent to the angle discriminator, where the deviation of the target from the PCN is determined (the angle discriminator performs the scalar product operation). The quadrature components of the total signal, in addition, through the quadrature combining unit enter the information processing device, which includes the primary processing unit (signal accumulation and detection, primary measurement of target coordinates), a tracking range finder, and a secondary signal processing unit (analysis of the Doppler signal spectrum expansion by range analyzed by the quadrature components of the total signal and target classification, target selection for auto tracking, output of initial target range data to tracking yes target number and azimuth to the antenna drive).

The disadvantage of this device is the pulsed radiation mode, in which the peak transmitter power is at least two times higher than the value for continuous radiation. In reality, this value is more than two, since in the search mode to view the target situation in a wide range of ranges, it is necessary to reconstruct the duration of the phase-manipulated probe signal, and accordingly, increase the duty cycle so that the minimum signal delay is longer than the probe duration. With a small overlap of the reflected phase-manipulated signal with the probe signal in the prototype device, the number of bits of the reference signal code is reduced (the bits of the shift registers of the digital matched filter are reset) and the detection threshold is changed depending on the distance to the target being analyzed. However, this does not provide parallel reception and detection of the signal (in order to reduce the airtime when searching for a signal) in a wider range of ranges with a large percentage overlap of the probing signal with the reflected signal, including a continuous signal.

An object of the invention is to enable the on-board monopulse radar to operate with a single transceiver antenna in continuous mode (a factor facilitating the implementation of a highly reliable small-sized output device of the transmitter on semiconductor elements) while reducing the airtime when viewing the scene due to the use of time-frequency isolation of the receiving path from the radiated LFM signal, manipulated in frequency according to a tunable discrete-time law. The spacing of adjacent manipulated carrier frequencies corresponds to the intermediate frequency of the receiver, and each frequency manipulated by a code unit is emitted and at the same time is heterodyne for reflected signals that are frequency-manipulated by code zero and vice versa.

The essence of the invention lies in the fact that in a monopulse radar, comprising: series-connected power amplifier, antenna switch, sum-difference converter and antenna block, as well as a pathogen, synchronizer, information processing device (UOI), 2-channel sum-difference receiver, phase detectors of the sum and difference channels, quadrature combining unit, angle discriminator and antenna drive, the output of the antenna drive being kinematically connected to the antenna unit, the input of the antenna drive connected to watts the second output of the VOI, the second (informational) output of the antenna drive is connected to the sixth input of the VOI, the 2-channel sum-difference receiver contains two-channel high-frequency amplifier, a balanced mixer, and a 2-channel intermediate frequency amplifier connected in series at the two inputs-outputs of the total and difference channels (UPCH), the heterodyne input of the balanced mixer is the third heterodyne input of the 2-channel sum-difference receiver, the first and second inputs of the high-frequency amplifier are inputs, and the first and the second outputs of the intermediate-frequency amplifier are the outputs of the sum and difference channels of the 2-channel sum-difference receiver, respectively, the UOI contains a primary processing unit and a secondary processing unit, the first output of the primary processing unit is connected to the first input of the secondary processing unit, respectively, the third, fourth and first outputs secondary processing units are the second, fourth and third outputs of the UOI, the third input of the UOI is connected to the first input of the primary processing unit, the fourth output of the pathogen with dinene with the first inputs of the phase detectors of the sum and difference channels, the third output of the synchronizer is connected to the fourth input of the UOI, the first output of the 2-channel sum-difference receiver is connected to the second input of the phase detector of the total channel, the second output of the 2-channel sum-difference receiver is connected to the second the input of the phase detector of the difference channel, the output of the quadrature combining unit is connected to the third input of the IOI, the sounding signal synthesizer (SES) is connected in series, the multiplier is often you, a switched transmission filter and a directional coupler, the second output of which is connected to the input of the power amplifier, a series-connected amplifier of the Doppler frequency of the total channel and a block of Doppler filters of the total channel, series-connected amplifier of the Doppler frequency of the difference channel and the block of Doppler filters of the differential channel, polling units of the total and differential channels, automatic gain control (AGC) circuit, the output of which is connected to the third inputs of the amplifiers Doppler th frequency of the total and difference channels, the generator of manipulating sequences, switched filters of the total and difference channels, a speed and drift meter and a divider, the third output of the directional coupler is connected to the third (heterodyne) input of the 2-channel total-difference receiver, the first output of the antenna switch via a switched the total channel filter is connected to the first (total) input of the 2-channel total-differential receiver, the second (differential) output of the total-differential converter connected through a switched filter of the difference channel to the second (differential) input of the 2-channel total-difference receiver, the output of the phase detector of the total channel is connected to the second input of the amplifier of the Doppler frequency of the total channel, the output of which is additionally connected to the input of the AGC, the output of the phase detector of the difference channel is connected to the second input of the amplifier of the Doppler frequency of the difference channel, the second output of the synchronizer is connected to the first input of the synthesizer of the probing signal, the fifth input of the UOI and the third the odes of the blocks of the Doppler filters of the total and differential channels, the third output of the pathogen is connected to the first input of the generator of the manipulating sequences, the input of the synchronizer, with the first inputs of the blocks of the Doppler filters of the total and difference channels and the seventh input of the UOI, the first and second outputs of the pathogen are connected respectively to the second and third input probe synthesizer, the first synchronizer output through the manipulator sequence generator is connected to the sixth input of the probe synthesizer signal and the second (control) input of the switched transmission filter, the second (inverse) output of the generator of the manipulating sequences is connected to the second (control) inputs of the switched filters of the total and difference channels, the third and fourth outputs of the UOI are connected respectively to the fifth and fourth inputs of the probe signal synthesizer, the first output of the UOI is connected to the first (control) inputs of the amplifiers of the Doppler frequency of the total and difference channels, the outputs from the first to the Nth block of Doppler fil ntrov of the total channel are connected respectively to the inputs of the polling unit of the total channel from the second to (N + 1) -th, the outputs from the first to N-th block of Doppler filters of the difference channel are connected respectively to the inputs of the polling unit of the difference channel from the second to (N + 1) -th, the third output of the synchronizer is additionally connected to the first inputs of the polling units of the total and differential channels, the output of the polling unit of the difference channel through series-connected angle discriminator and the divider is connected to the eighth input of the UOI, the output of the polling unit ummar channel is connected to the input of the quadrature combining unit and the first input of the angle discriminator, the output of the quadrature combining unit is additionally connected to the first input of the divider, the first and second output of the speed and drift angle meter are connected respectively to the first and second input of the UOI, the first, second, fourth and sixth UOI inputs are connected to the fourth, fifth, second and sixth inputs of the secondary processing unit, respectively, the second output of the secondary processing unit is the first output of the UOI, the fourth input of the primary processing unit ki is the eighth input of the UOI, the seventh entrance of the UOI is connected to the third input of the primary processing unit, the fifth input of the UOI is connected to the second input of the primary processing unit, the second output of the primary processing unit is connected to the third input of the secondary processing unit.

The probe signal synthesizer (SES) consists of 2 channels, each of which contains a linear-frequency-modulated signal generator, a phase detector, a balanced mixer, a directional coupler, a low-pass filter and a voltage-controlled generator to the probe synthesizer output through the first the switch passes the signal of one of the channels, while the first input of the SES is connected to the first synchronizing inputs of the first and second generators of the linear-frequency-modulated voltage, the fourth and fifth inputs of the SZ connected to the second inputs of the first and second linear-frequency-modulated voltage generators, respectively, the output of the first linear-frequency-modulated voltage generator in series through the third phase detector, the first low-pass filter and the first voltage-controlled generator, connected to the input of the second directional coupler, the first whose output through the second balanced mixer is connected to the second input of the third phase detector, the second output of the second directional coupler through the first the switch is connected to the output of the SZS, the output of the second linear-frequency-modulated voltage generator is sequentially through the fourth phase detector, the second low-pass filter and the second voltage-controlled generator is connected to the input of the third directional coupler, the first output of which is connected to the second input through the third balanced mixer the fourth phase detector, the second output of the third directional coupler is connected to the third input of the first switch, the second and third input of the SES are connected to the first I second and third rows balanced mixers, respectively, a sixth input coupled to a first ESS (control) input of the first switch.

The invention is illustrated by a further description and drawings, which show:

Figure 1 - structural diagram of a monopulse radar;

Figure 2 is a plot explaining the structure of the probe and reflected signal,

Figure 3 is a structural diagram of a switched filter (CF),

Figure 4 is a structural diagram of a synthesizer sounding signal (SES),

5 is a structural diagram of a synchronizer (C),

6 is a structural diagram of amplifiers Doppler frequency (UDM),

7 is a view of the amplitude-frequency characteristics of the amplifiers of Doppler frequency (UDM),

Fig. 8 is a block diagram of Doppler filter blocks (BDF),

Fig.9 is a structural diagram of a block combining quadratures (BOC),

Figure 10 is a structural diagram of an angle discriminator (DU),

11 - diagrams explaining the timing diagram of the blocks,

12 is a block diagram of a primary signal processing unit (BPO),

Fig - block diagram of the algorithm of the secondary processing unit (BVI),

Fig is a structural diagram of a threshold detector,

Fig - structural diagram of drives,

Fig is a structural diagram of an angular selector.

According to the structural diagram of figure 1 in the proposed monopulse radar adopted the following notation:

1 - antenna unit (AB),

2 - total differential Converter (PSA.),

3 - antenna switch (AP),

4 - power amplifier (UM)

5 - directional coupler (BUT),

6 - switched filter transmission (KF-P),

7 - frequency multiplier (UCH),

8 - synthesizer sounding signal (SZS),

9 - pathogen (B),

10 - manipulator sequence generator (GMF),

11 - synchronizer (C),

12 - information processing device (UOI),

13 - speed meter and drift angle (ASC),

14 - switched filter of the total channel (KF-S),

15 - switched filter differential channel (KF-R),

16 - 2-channel total-difference receiver (Pr),

17 - phase detector of the total channel (FD-S),

18 - phase detector of the difference channel (FD-R),

19 - amplifier Doppler frequency of the total channel (UDC-S),

20 - amplifier Doppler frequency difference channel (UDC-R),

21 - automatic gain control (AGC),

22 - block Doppler filters of the total channel (BDF-S),

23 - block Doppler filters of the difference channel (BDF-R),

24 - block survey of the total channel (BO-S),

25 - block polling the differential channel (BO-R),

26 - block combining quadratures (BOK),

27 - angle discriminator (DU),

28 - divider (Affairs),

29 - antenna drive (PA),

30 - 2-channel high-frequency amplifier (UHF),

31 - 2-channel balanced mixer (BSM),

32 - 2-channel intermediate frequency amplifier (IFA),

33 - block secondary processing (BVI),

34 - primary processing unit (BPO).

In the structural diagram of figure 1, the proposed monopulse radar contains serially connected power amplifier 4, antenna switch 3, sum-difference converter 2 and antenna block 1, as well as pathogen 9, synchronizer 11, information processing device (UOI) 12, 2-channel total differential receiver 16, phase detectors of total 17 and differential 18 channels, quadrature combining unit 26, angle discriminator 27 and antenna drive 29, the output of the antenna drive 29 being kinematically connected to the antenna unit 1, the input of the antenna drive 29 It is connected to the second output of the AOI 12, the second (information) output of the antenna drive 29 is connected to the sixth input of the AOI 12, a 2-channel sum-difference receiver 16 contains two-channel high-frequency amplifier 30, a balanced mixer, connected in series via two inputs-outputs of the total and difference channels 31 and 2-channel intermediate frequency amplifier (IFA) 32, the heterodyne input of the balanced mixer 31 is the third heterodyne input of the 2-channel sum-difference receiver 16, the first and second inputs of the high-frequency amplifier 30 are inputs, and the first and second outputs of the intermediate frequency amplifier 32 are outputs of the total and differential channels of the 2-channel total-differential receiver 16, respectively, UOI 12 contains a primary processing unit 34, a secondary processing unit 33, the first output of the primary processing unit 34 is connected to the first the input of the secondary processing unit 33, the third, fourth and first outputs of the secondary processing unit 33 are the second, fourth and third output of the UOI 12, the third input of the UOI 12 is connected to the first input of the primary processing unit 34, h the fourth output of the pathogen 9 is connected to the first inputs of the phase detectors of the total 17 and the differential 18 channels, the third output of the synchronizer 11 is connected to the fourth input of the UOI 12, the first output of the 2-channel total-differential receiver 16 is connected to the second input of the phase detector of the total channel 17, the second the output of the 2-channel sum-difference receiver 16 is connected to the second input of the phase detector of the difference channel 18, the output of the quadrature combining unit 26 is connected to the third input of the UOI 12, the probe signal synthesizer (SES) 8 after Therefore, through a frequency multiplier 7 and a switched transmission filter 6, it is connected to a directional coupler 5, the second output of which is connected to the input of the power amplifier 4, the output of the Doppler frequency amplifier of the total channel 19 is connected to the second input of the Doppler filter unit of the total channel 22, and the output of the Doppler frequency amplifier of the difference channel 20 is connected to the second input of the block of Doppler filters of the difference channel 23, the output of the AGC circuit 21 is connected to the third inputs of the amplifiers of the Doppler frequency of a total of 19 and difference about 20 channels, the third output of the directional coupler 5 is connected to the third (heterodyne) input of the 2-channel sum-difference receiver 16, the first output of the antenna switch 3 through the switched filter of the total channel 14 is connected to the first (total) input of the 2-channel sum-difference receiver 16, the second (differential) output of the total-differential converter 2 is connected via a switched filter of the differential channel 15 to the second (differential) input of the 2-channel total-differential receiver 16, the output of the phase detector is about channel 17 is connected to the second input of the Doppler frequency amplifier of the total channel 19, the output of which is additionally connected to the input of the AGC 21, the output of the phase detector of the difference channel 18 is connected to the second input of the amplifier of the Doppler frequency of the difference channel 20, the second output of the synchronizer 11 is connected to the first input of the probe synthesizer signal 8, the fifth input of the UOI 12 and the third inputs of the Doppler filter blocks of the total 22 and the differential 23 channels, the third output of the pathogen 9 is connected to the first input of the manipulator sequence 10, the input of the synchronizer 11, with the first inputs of the Doppler filter blocks of the total 22 and the differential 23 channels and the seventh input of the UOI 12, the first and second outputs of the pathogen 9 are connected respectively to the second and third input of the probe synthesizer 8, the first output of the synchronizer 11 through the generator manipulating sequences 10 is connected to the sixth input of the probe synthesizer 8 and the second (control) input of the switched transmission filter 6, the second (inverse) output of the generator manipulating 10 sequences is connected to the second (control) inputs of the switched filters of a total of 14 and 15 differential channels, the third and fourth outputs of the UOI 12 are connected respectively to the fifth and fourth inputs of the probe signal synthesizer 8, the first output of the UOI 12 is connected to the first (control) inputs of the Doppler frequency amplifiers total 19 and differential 20 channels, outputs from the first to the Nth block of Doppler filters of the total channel 22 are connected respectively to the inputs of the polling unit of the total channel 24 from the second to (N + 1) th, outputs from the first to the Nth block of Doppler filters of the difference channel 23 are connected respectively to the inputs of the polling unit of the difference channel 25 from the second to the (N + 1) -th, the third output of the synchronizer 11 is additionally connected to the first inputs of the polling units of the total 24 and difference 25 channels, the output of the polling unit of the differential channel 25 through a series-connected discriminator of the angle 27 and the divider 28 is connected to the eighth input of the UOI 12, the output of the polling unit of the total channel 24 is connected to the input of the block combining quadrature 26 and the first input of the angle discriminator and 27, the output of the quadrature combining unit 26 is additionally connected to the first input of the divider 28, the first and second output of the speed and drift angle meter 13 are connected respectively to the first and second input of the UOI 12, the first, second, fourth and sixth inputs of the UOI 12 are connected to the fourth, the fifth, second and sixth inputs of the secondary processing unit 33, respectively, the second output of the secondary processing unit 33 is the first output of the AOI 12, the fourth input of the primary processing unit 34 is the eighth input of the AOI 12, the seventh input of the AOI 12 is connected to the third input of the unit primary processing 34, the fifth input of the UOI 12 is connected to the second input of the primary processing unit 34, the second output of the primary processing unit 34 is connected to the third input of the secondary processing unit 33.

Figure 2 shows diagrams explaining the structure of the probe and reflected signal. Designations in figure 2:

f ₁ - the law of variation of the frequency of the first chirp signal,

f ₂ - the law of variation of the frequency of the second chirp signal,

t _r - delay of the reflected signal relative to the probing,

f _r + f _d1 - frequency shift of the reflected signal relative to the probing for the first chirp signal

f _r + f _d2 - frequency shift of the reflected signal relative to the probing for the second chirp signal

f _d1 and f _d2 - Doppler frequency shift of the reflected signal for probing signals with frequencies f ₁ and f ₂ respectively,

f _op - Δf _cm / 2 - frequency shift between the first and second chirp signal.

f _op - reference intermediate frequency,

F _CR1 - the intermediate frequency for the first chirp of the reflected signal,

F _CR2 - intermediate frequency for the second chirped reflected signal.

Switched filters (CF) 6, 14, 15 are similar, designed for controlled frequency selection of the signals passing through them, and are made according to the circuit shown in Fig.3.

In figure 3, the following notation:

35 - the first switch (Kom 1),

36 - first filter (F1),

37 - second filter (F2),

38 - the second switch (Kom 2).

In the circuit of the switched filter 6 (Fig. 3), the first input of the first switch 35 is the first input of the switched filter 6, the second input of which is connected to the second and third input of the first 36 and second 37 switches, respectively, the first output of the first switch 35 through the first filter 36 is connected to the first input of the second switch 38, the second output of the first switch 35 through the second filter 37 is connected to the second input of the second switch 38, the output of which is the output of the switched filter 6.

Switches 35 and 38 can be implemented on a NMMS-2027 microchip, which is commercially available.

The probe signal synthesizer (SES) 8 is part of the transmitting device and is intended for the primary generation of a continuous LFM signal, frequency-manipulated by the time sequence of the GMF generator 10, and is made according to the scheme in Fig. 4.

In the diagram according to figure 4 of the synthesizer of the probe signal 8, the following notation:

39 - the first generator of the chirp signal (GLFM 1),

40 - the first low-pass filter (low-pass filter 1),

41 - the third phase detector (PD 3),

42 - the first generator controlled by voltage (VCO 1),

43 - the second balanced mixer (BSM 2),

44 - the second directional coupler (HO 2),

45 - the second generator of the chirp signal (GLFM 2),

46 - the fourth phase detector (PD 4),

47 - the second low-pass filter (low-pass filter 2),

48 - the third balanced mixer (BSM 3),

49 - the second voltage-controlled generator (VCO 2).

50 - the third directional coupler (BUT 3),

51 - the first switch (Kom 1).

The probe signal synthesizer 8 (Fig. 4) consists of 2 channels, each of which contains a linear frequency-modulated signal generator 39 (45), a phase detector 41 (46), a balanced mixer 43 (48), a directional coupler 44 (50) , a low-pass filter 40 (47) and a generator controlled by voltage 42 (49), to the output of the probe synthesizer 8 through a third switch 51, controlled by an external command, the signal of one of the channels passes, while the first input of the probe synthesizer 8 is connected to the first (synchronizing) inputs of the first 39 and the second 45 generators of linear frequency-frequency-modulated voltage, the fourth and fifth inputs of the synthesizer of the probe signal 8 are connected to the second inputs of the first 39 and second 45 generators of linear-frequency-modulated voltage, respectively, the output of the first generator of frequency-frequency-modulated voltage 39 in series through the third phase detector 41, a first low-pass filter 40 and a first voltage-controlled oscillator 42, connected to the input of the second directional coupler 44, whose first output is through the second the balance mixer 43 is connected to the second input of the third phase detector 41, the second output of the second directional coupler 44 through the third switch 51 is connected to the output of the probe signal synthesizer 8, the output of the second linear-frequency-modulated voltage generator 45 in series through the fourth phase detector 46, the second low filter frequency 47 and a second generator controlled by voltage 49 is connected to the input of a third directional coupler 50, the first output of which is connected to a second balanced mixer 48 the input of the fourth phase detector 46, the second output of the third directional coupler 50 is connected to the third input of the third switch 51, the second and third input of the probe synthesizer 8 are connected to the first inputs of the second 43 and third 48 balanced mixers, respectively, the sixth input of the probe synthesizer 8 is connected to the first (control) input of the first switch 51.

The construction of the channels of the synthesizer of the probing signal 8 on the basis of phase locked loop (PLL) allows you to generate an output signal with low amplitude-phase noise. The high speed of the frequency tuning of the output signal of the generators controlled by voltage 42 (49) of each channel under the law of tuning the corresponding generator of the linear-frequency-modulated signal with coherence is ensured by the high frequency of the signals arriving at the channel phase detectors. The channel structure based on the PLL is given in [5, p. 190, fig. 4.10, 4.11].

The synchronizer (C) 11 is designed to generate synchronization pulses, the repetition period of which determines the modulation period of the probing continuous LFM signal, the scan code of the filtered reflected signal in range and the control code of the law of temporal manipulation of the frequency of the probing signal. The synchronizer 11 is made according to the diagram in figure 5.

On the structural diagram of the synchronizer 11 (figure 5) adopted the following notation:

52 - the first code bus (KSh 1),

53 - the first counter (SI 1),

54 - the first trigger (Tg 1),

55 second code bus (KSh 2),

56 - second counter (SI 2),

57 - the third counter (SI 3).

In the synchronizer circuit 11 (Fig. 5), the input of the synchronizer 11 is connected to the first (counting) inputs of the first 53 and second 56 counters, the transfer output of the first counter 53 through the first trigger 54 is connected to the second (installation) input of the second counter 56, the second output of the first trigger 54 is connected to the second (installation) input of the first counter 53, the counting input of the third counter 57 and is the second output of the synchronizer 11, the first output (transfer output) of the second counter 56 is connected to the second input of the first trigger 54, the output of the first code bus 52 is connected the third input of the first counter 53, the output of the second code bus 55 is connected to a third input of the second counter 56, a third counter 57 output is the first output of the synchronizer 11, the output code from the second output of the second counter 56 is supplied to the third output of the synchronizer 11.

Amplifiers of Doppler frequency 19 and 20 are similar and are part of the receiving path. Amplifiers 19 and 20 carry out frequency filtering of the reflected signal in the calculated working area of delays and Doppler shifts.

The frequency response of the Doppler amplifiers 19 and 20 to ensure the receiver operates in a wide dynamic range has a slope of 12 dB / octave towards low frequencies, in addition, to suppress signals from the Earth received along the main beam, it has a notch frequency controlled by an external code.

Amplifiers Doppler frequency (UDM) 19 and 20 are made according to the circuit shown in Fig.6, which indicates:

58 - analog filter with digital control (AFTSU),

59 - controlled analog attenuator (UAA),

60 - the third low-pass filter (low-pass filter 3).

In the diagram of the Doppler frequency amplifier (UDM) in Fig.6, the second input of the UDC is sequentially through an analog filter with digital control 58, the controlled analog attenuator 59 and the third low-pass filter 60 is connected to the output of the UDC, the first input of the UDC is connected to the first input of the analog filter with a digital control 58, the third input of the UDC connected to the second input of a controlled analog attenuator 59.

An example of the implementation of an analog filter with digital control (AFCU) 58 with a gain blockage towards the low frequencies of 12 dB / octave and an additionally controlled notch frequency is a filter consisting of a series-connected high-pass filter and a notch filter, frequency-controlled by a common digital code for the tuning frequency. The high-pass filter represents an RC circuit whose lower frequency bandwidth is tuned by adjusting the resistor setting controlled by an external code.

Frequency-tuned notch filter can be performed according to the scheme [4, p. 65 ... 67, Fig. 7.5]. The tunable filter element is a code-controlled resistor that can be made on the basis of a parallel connection of weight resistors through keys controlled by bits of code, type 564 KTZ.

The controlled analog attenuator 59 can be implemented as a resistive-diode divider, the output voltage of which does not linearly depend on the input signal of the divider and corresponds to the required regulation law. A similar controlled analog attenuator (linearizer) is used in the AGC circuit of the sea ice thickness meter A-038 [9, l.20 / 2] and in the DR1-363I block [10, l.13].

Two amplitude-frequency characteristics (AFC) of the Doppler frequency amplifiers 19 and 20 are shown in Fig. 7 for two rejection frequencies f _ud1 and f _udc2 , defined by an external digital code. The abscissa axis is the frequency (logarithmic scale), the ordinate axis is the attenuation, expressed in dB.

On Fig shows a variant of building a block of Doppler filters 22 and 23, which adopted the following notation:

61 - the first circuit And, (And 1),

62 - second trigger, (Tg 2),

63 - the fourth counter, (SI 4),

64 ₁ ... 64 _N - first, ... N-th Doppler filters,

65 ₁ ... 65 _N - first ... N-oe read-only memory (ROM1) ... (ROM _N ),

66 ₁ ... 66 _N - the first multiplier of the first Doppler filter (Smart 1 ₁ ) ... the first multiplier of the N-th Doppler filter (Smart 1 _N ),

67 ₁ ... 67 _N - the second multiplier of the first Doppler filter (Smart 2 ₁ ) ... the second multiplier of the N-th Doppler filter (Smart 2 _N ),

68 ₁ ... 68 _N - the second integrator of the first Doppler filter (Int 2 ₁ ) ... the second integrator of the N-th Doppler filter (Int 2 _N ),

69 ₁ ... 69 _N is the third integrator of the first Doppler filter (Int 3 ₁ ) ... the third integrator of the N-th Doppler filter (Int 3 _N ).

70 - the second circuit And (And 2),

71 - analog-to-digital Converter (ADC).

In the diagram of the Doppler filter unit (BDF) in Fig. 8, the second input of the BDF is connected to the second input of the analog-to-digital converter (ADC) 71, the output of which is connected to the first inputs of the first multipliers 66 ₁ ... 66 _N and the first inputs of the second multipliers 67 ₁ ... 67 _N , the outputs of the first 66 ₁ ... 66 _N and the second multipliers 67 ₁ ... 67 _N through the corresponding second 68 ₁ ... 68 _N and the third integrators 69 ₁ ... 69 _{N are} connected to the first .. N-th output of the BDF, the first input of the BDF is connected to the first inputs of the ADC 71, the second circuit And 70 and the second input of the second trigger 62, the output of the second circuit And 70 is connected to the first account the input of the fourth counter 63, the first inputs of the integrators 68 ₁ ... 68 _N and 69 ₁ ... 69 _{N the} output of the fourth counter 63 is connected to the inputs from the first to the N-th ROM 65 ₁ ... 65 _N , the first outputs of which are connected respectively, with the second inputs of the first multipliers 66 ₁ ... 66 _N , the second outputs of the ROM 65 ₁ ... 65 _{N are} connected respectively with the second inputs of the second multipliers 67 ₁ ... 67 _N , the third input of the BDF is connected to the first input of the second trigger 62, the first input of the first circuit And 61 and the second input of the second circuit And 70, the output of the second trigger 62 through the first circuit And 61 is connected to the second input fourth counter 63, with third inputs of the second 68 ₁ ... 68 _N and third integrators 69 ₁ ... 69 _N.

Block combining quadrature 26 on the quadrature components of the input signal calculates its power. An option to build a block combining quadratures 26 is shown in Fig.9, where it is indicated:

72 - the third multiplier (Smart 3),

73 - the fourth multiplier (Smart 4),

74 - the first adder (Sum 1).

In the diagram of the quadrature combining unit 26 (Fig. 9), the quadrature cosine component of the signal supplied to the input of the quadrature combining unit 26 is connected to the first and second inputs of the third multiplier 72, the sine quadrature component of the signal coming from the input of the quadrature combining unit 26 is connected to the first and to the second inputs of the fourth multiplier 73, the outputs of the multipliers 72 and 73 are connected respectively to the first and second input of the first adder 74, the output of which is the output of the quadrature combining unit 26.

The angle discriminator 27 performs the scalar product of quadrature signals arriving at its input from the polling units of Doppler filters with a total of 24 and a difference of 25 channels.

A variant of the construction of the angle discriminator (DU) 27 is shown in figure 10, where the following notation:

75 - the fifth multiplier (Smart 5),

76 - the sixth multiplier (Smart 6),

77 - the second adder (Sum 2).

In the diagram of the angle discriminator 27 (FIG. 10), the quadrature cosine component of the signal supplied to the first input of the angle discriminator 27 is connected to the first input of the fifth multiplier 75, the second sine quadrature component of the signal supplied to the first input of the angle discriminator 27 is connected to the first input of the sixth of the multiplier 76, the quadrature cosine component of the signal supplied to the second input of the angle discriminator 27 is connected to the second input of the fifth multiplier 75, the second sine quadrature component of the signal received to the second input of the angle discriminator 27, connected to the second input of the sixth multiplier 76, the outputs of the fifth 75 and sixth 76 multipliers are connected respectively to the first and second inputs of the second adder 77, the output of which is the output of the angle discriminator 27.

Plots explaining the time cycle of the blocks of Doppler filters 22, 23 and the primary processing unit 34 are shown in Fig.11, where it is indicated:

78 is the clock cycle specified by the driver 9 at the third output, T _in (determines the clock cycle of the signal in the ADC of the Doppler filter blocks 22 and 23, the clock cycle of the signal at the outputs of the polling blocks 24 and 25, the clock cycle of signal reception in the information processing device 12),

79 - synchronization pulse issued by synchronizer 11 at the second output (T _chm - interval of sweep of the chirp saw signal, T _bo - interval of return of the chirp saw signal to its initial state, during this interval the settings of the blocks are calculated and the necessary codes are issued to them from the processing device information 12)

80 - delayed by one clock clock pulse generated by the second trigger 62 (Fig),

81 - reset pulse of integrators 68 and 69, issued by the second circuit And 70 (Fig),

82 - delayed by NT _{in the} synchronization pulse generated by the first shift register 85 (Fig),

83 - a packet of shear pulses, synchronizing the reception of the implementation of signals from the block combining quadrature 26 and the output of the divider 28 to the drives of the primary processing unit 34 is formed by the third circuit And 84 (Fig.12).

In the diagram of the primary processing unit (BPO) 34 (Fig.12), the following notation:

84 - the third scheme AND (FROM),

85 - the first shift register (SDR 1),

86 - threshold detector (ON),

87 - the second shift register (SDR 2),

88 - the first drive (H1),

89 - angular selector (CSS),

90 - the fourth scheme And (I4),

91 - the fifth scheme And (I5),

92 - frequency divider (DF),

93 - decoder (DS).

In the diagram of the primary processing unit (BPO) 34 (Fig. 12), the second input of the primary processing unit 34 is connected to the second input of the third circuit AND 84, the input of the frequency divider 92 and the first input of the first shift register 85, the output of which is connected to the third input of the third circuit And 84, the third input of the primary processing unit 34 is connected to the first input of the third AND circuit 84 and the second (shift) input of the first shift register 85, the first input of the primary processing unit 34 is connected through a threshold detector 86 in series and the second shift register 87 is connected with the first input of the fourth circuit And 90, the output of the third circuit And 84 is connected to the first inputs of the threshold detector 86, the first drive 88 and the first input of the fifth circuit And 91, the output of the fifth circuit And 91 is connected to the first inputs of the angular selector 89 and the second input of the second shift register 87, the output of the angular selector 89 through the fourth circuit And 90 is connected to the first output of the primary processing unit 34, the output of the first drive 88 is connected to the second input of the angular selector 89, the output of the frequency divider 92 through the signal decoder 93 is connected to the second input p of the AND circuit 91 and the third output of the preprocessing unit 34, the fourth input of the primary processing unit 34 is connected to a second input of the first accumulator 88.

The block diagram of the algorithm of the secondary processing unit 33 is shown in Fig.13, which adopted the following notation:

ACB - a command to enter the code for the initial position of the scanning sector by angle in the antenna drive 29,

PC - read permission (formed on the second output of the primary processing unit 34),

KO - the command to enable the review (KO = 1), when turning off the review KO = 0,

P (m, j) is a scan of the range marks of the azimuth range-angle cells in which the target is detected (formed at the first output of the primary processing unit 34),

m is the current range code issued by the synchronizer 11 to the secondary processing unit 33,

j is the current code of the azimuthal angle of the direction of the RSN relative to the axis of the aircraft,

j _N - code of the lower boundary of the angular position of the scanning sector (viewing mode), which begins the review of the scene,

j _k code of the final (upper) position of the scanning sector when viewing in the azimuth angle,

V is the speed of the aircraft,

α is the drift angle of the aircraft.

The threshold detector 86 is made according to the known scheme (Fig. 14) described in [7, Fig. 2.39, p. 189] and on which the following notation is adopted:

94 ₁ ... 94 _k - shift registers SDR 3 ₁ ... SDR 3 _k ,

95 - the fourth shift register SDR 4,

96 - the third adder (Sum 3),

97 - the fourth adder (Sum 4),

98 - digital comparator (CC).

According to Fig. 14, the second input of the threshold detector 86 is connected to the first input of the shift register SDR 3 ₁ (position 94 ₁ ), the shift registers SDR 3 ₁ ... SDR 3 _k (position 94 ₁ ... 94 _k ) are connected in series, the outputs shift registers SDR 3 ₁ ... SDR 3 _k (pos. 94 ₁ ... 94 _k ) are connected to the “k” inputs of the third adder 96, the output of which is connected to the first input of the fourth shift register 95, the outputs from the first to the L-th the fourth shift register 95 are connected to the inputs of the same name of the fourth adder 97, the output of which is connected to the second input of the digital comparator 98, the first the output of the digital comparator 98 is connected to the middle (L + 1) / 2 output of the fourth shift register 95, the output of the digital comparator 98 is the output of the threshold detector 86.

The structural diagram of a variant of the drive (H) 88 is shown in Fig. 15, which takes the following notation:

99 ₁ ... 99 _r - shift registers SDR 5 ₁ ... SDR 5 _r ,

100 - fifth adder (Sum 5).

In the drive circuit 88 (Fig. 15), the second drive input 88 through serially connected shift registers SDR 5 ₁ ... SDR 5 _r (pos 99 ₁ ... 99 _r ) is connected to the second output of drive 88, the outputs of the shift registers SDR 5 ₁ ... SDR 5 _p (pos 99 ₁ ... 99 _r ) are connected to the p inputs of the fifth adder 100, the output of which is the first output of the drive 88, the first input of the drive 88 is connected to the second (shift) inputs of the shift registers SDR 5 ₁ .. . SDR 5 _p (pos 99 ₁ ... 99 _p ).

The angular selector (CSS) 89 is designed to form a mark of coincidence of the RSN with the direction to the target and is made according to the scheme [8] shown in Fig. 16, which takes the following notation:

101 ₁ ... 101 _q - shift registers (SDR 6 ₁ ... SDR 6 _q ),

102 ₁ ... 102 _q - weight amplifiers (VU 1 ₁ ... VU 1 _q ),

103 - sixth adder (Sum 6),

104 - threshold decision device (PRU).

In the diagram of the angular selector 89 (Fig. 16), the first input of the shift register SDR 6 ₁ (pos. 101 ₁ ) is the second input of the angular selector 89, the shift registers SDR 6 ₁ ... SDR 6 _q , (pos. 101 ₁ ... 101 _q ) are connected in series, the outputs q of the shift registers SDR 6 ₁ ... SDR 6 _q (pos. 101 ₁ ... 101 _q ) through the corresponding weight amplifiers VU1 ₁ ... VU 1 _q (pos. 102 ₁ ... 102 _q) connected to q inputs of the sixth adder 103, the output of which through a threshold decision unit 104 connected to the output of the angular selector 89, a first input angular selector 89 is coupled to second inputs of q shift Regis SDR trench 6 ₁ ... 6 SDR _q (pos. 101 101 ₁ ... _q).

The antenna unit (AB) 1 can be built in the form of a mirror with a 4-horn feed connected by waveguides to a sum-difference converter (SRP) 2.

The sum-difference converter (SRP) 2 can be built on the basis of waveguide T-bridges.

Antenna switch (AP) 3 can be performed, for example, in the form of a three-arm ferrite Y - circulator.

The power amplifier (Um) 4 can be implemented depending on the required power and the band of amplified frequencies based on an amplitron, a traveling wave lamp, or a semiconductor device [5, p. 19 ... 52, 103 ... 107.144.].

The causative agent (B) 9 generates four continuous reference frequencies, each of which can be obtained either by digital synthesis or by directly multiplying the frequency of the crystal oscillator an integer number of times. The theory, calculation and construction options for digital frequency synthesizers are given in [5].

The generator of manipulating sequences (GMF) 10 can be constructed according to the scheme of a frequency synthesizer [5, Fig.1.17, p.35], tunable by a code on “k” of previously known calculated frequencies, where k is the number of non-coherently accumulated signal implementations. Between the input of the generator of the manipulating sequences 10 and the control input of the synthesizer is a code converter executed on a read-only memory (ROM).

Option meter speed and angle of drift (ASC) 13 may be a Doppler speed meter and angle of drift [6]

The secondary processing unit 33, included in the information processing device 12, can be built on the basis of a digital computer, the operation of which consists in sequentially solving the problems presented on the block diagram of the algorithm (Fig.13).

According to the invention, the device (figure 1) works as follows. The sounding signal synthesizer (SES) 8 generates a continuous signal representing a combination of 2 continuous LFM signals with frequencies f ₁ and f ₂ , time-manipulated by a signal coming from the manipulating sequence generator (GMF) 10 to the sixth input of the sounding signal synthesizer 8. The frequency of the output signal of the SES 8 after the frequency multiplier (UCH) 7 increases n times and has the form shown in figure 2.

Wherein

f ₁ (t) = n (f _op1 + (k ₃ · t + f _n1 )) = F ₁ + flchm ₁ (t),

f ₂ (t) = n (f _op2 + (k _{3 ·} t + f _n2 )) = F ₂ + flchm ₂ (t),

Where

f ₁ (t) and f ₂ (t) - the law of frequency change of the first and second chirp signals at the output of the frequency multiplier 7,

n is the frequency multiplier (integer) in the frequency multiplier 7,

f _op1 = k ₁ · f ₀ - the first reference frequency coming to the second input of the SES 8 from the first output of the pathogen 9,

f _op2 = k ₂ · f ₀ - the second reference frequency coming to the third input of the SES 8 from the second output of the pathogen 9,

f ₀ - reference frequency at the fourth output of the pathogen 9, multiplying (dividing) which receive other reference frequencies in the pathogen 9 at the outputs from the first to the third,

k ₁ and k ₂ - factors - integers,

k ₃ - coefficient determining the slope of the chirp signal

f _n1 - set the initial frequency shift during the formation of the frequency f ₁ , comes together with the value of k ₃ in the form of a code on the fourth input of the SES 8 from the fourth output of UOI 12,

f _n2 = f _n1 + Δf _cm / 2n - the specified initial frequency shift during the formation of the frequency f ₂ , comes together with the value of k ₃ in the form of a code on the fifth input of SES 8 from the third output of UOI 12,

Δf _cm is the calculated difference in the Doppler shifts of the reflected signals at frequencies f ₁ and f ₂ ,

t is the current time.

A continuous signal from the output of the frequency multiplier 7 is fed to a switched transmission filter (KF-P) 6, controlled, like the synthesizer of the probing signal 8, by a signal from the first output of the generator of the manipulating sequences 10, while the frequencies f ₁ and f _{2 are} matched to it the output, then through a series-connected directional coupler 5, a power amplifier 4, an antenna switch 3 and a sum-difference converter 2, the signal enters the antenna unit 1 and is emitted by it in the scanned direction through all the rays. Reflected, delayed by time t _r , the total signal (Fig. 2) through series-connected antenna unit 1, sum-difference converter 2, antenna switch 3 is fed to the first input of the switched filter of the total signal (KF-S) 14. The difference reflected signal is removed from the second output of the sum-difference converter (SRP) 2 and goes to the first input of the switched filter of the difference channel (KF-R) 15.

The switched filters of the total and difference channels 14 and 15 are controlled from the second (inverse) output of the manipulating sequence generator (GMF) 10, and the switched transmission filter 6 from the first output of the manipulating sequence generator 10, therefore, during the passage of the signal through the switched transmission filter 6 of frequency f ₁ , a reflected signal at a frequency f ₂ and vice versa passes through switched filters 14 and 15.

Switched filters 6, 14, 15 are similar. The filter circuit is shown in figure 3. Management of the switches 35 and 48 is performed by a signal arriving at the second input of the switched filter 6 (14, 15). The switching circuit of the switches ensures the passage of the signal from the input of the switched filter 6 (14, 15) to its output only either along the upper branch at the tuning frequency f ₁ or along the lower branch at the tuning frequency f ₂ through filters 36 and 37, respectively.

The frequencies of the manipulation of the carrier frequencies f ₁ and f _{2 of the} generator of the manipulating sequences 10 are successively switched with the synchronization pulse cycle (Fig. 11, item 79) by the synchronizer code 11. The number of codes is equal to the accepted estimated number of non-coherently accumulated signal implementations k. Each implementation of the signal is received in the interval T _LChM (Fig. 11, item 79) with a fixed value of the code at the first output of the synchronizer 11. The repetition frequency of the manipulating sequences f _{mn is a} variable selected more than twice the maximum frequency shift of the reflected signal relative to the probing one. This construction is caused by the fact that the reception of reflected signals, with the coincidence in time of the delayed law of frequency manipulation with the law of manipulation of the frequencies of the emitted is impossible. Switching the frequencies of the manipulation of the carrier frequencies of the probing signal provides the possibility of receiving any signal ranges delayed in the calculated area on most other (k-1) manipulating sequences out of the total number k.

Indeed, from physical considerations it is clear that for the selected initial frequency of manipulation f _mn0 and the admissible power loss of the received signal by 3 dB to view the "dead" zone equal to 1/2 f _mn0 , it is necessary to ensure a delay in the law of manipulation of the reflected signal relative to the emitted by 1 / 2 f _mn0 , which is provided by reducing the period of the manipulating function by 1 / 2nf _mn0 , where n is the ambiguity coefficient of the selected period of manipulation in range. It follows that the tuning range defined for the minimum n = 1 lies in the range from f _mn0 to 3/2 (f _mn0 ), and the step of the possible tuning of the frequency synthesizer used as a generator of manipulating sequences is f _mn0 / 2n.

The total and difference signals from the outputs of the switched filters 14 and 15 are amplified by a two-channel high-frequency amplifier (UHF) 30 and fed to a 2-channel balanced mixer (BSM) 31, to the heterodyne input of which (the third input of the 2-channel receiver 16) a signal from the directional coupler 5, while the outputs of the 2-channel balanced mixer 31 get the frequency

F _pr1 = f ₁ (t) -f ₂ (t) + f _r + f _d1 = f _op -Δf _cm / 2 + f _r + f _d1 ,

F _pr2 = f ₁ (t) -f ₂ (t) -f _r -f _d2 = f _op -Δf _cm / 2-f _r -f _d2 ,

Where

f _op = (k ₁ -k ₂ ) nf ₀ , the frequency generated by the pathogen 9 at the fourth output, which is fed to the first inputs (inputs of the reference signal) of the phase detectors (FD-S and FD-R) of the total 17 and differential 18 channels,

f _r - the frequency difference of the probe and reflected signals associated with the delay of the signal t _r ,

f _r = Δf _vir t _r / T _LFM = 2Δf _vir R / sT _LFM ,

T _LCH - the interval of formation of the LFM saw signal (11, pos. 79),

Δf _dev - the frequency deviation of the signals with frequencies f ₁ and f ₂ in the interval T _LCHM ,

R is the range to the irradiated target,

c is the speed of light

f _d1 and f _d2 Doppler frequency shifts of the reflected signals at frequencies f ₁ and f ₂ ,

f _di = f _i 2Vcos (B + α) / c,

V is the speed of the aircraft relative to the Earth,

In - the angle of sight of the RSN, counted from the axis of the aircraft,

α is the drift angle of the aircraft,

Δf _cm = f _d1 -f _d2 .

Given the substitution of f _d2 through the values Δf _cm and f _d1 in the expression for F _CR1 we get

F _p1 = f _op + (f _r + f _d2 + Δf _cm / 2),

F _np2 = f _op - (f _r + f _d2 + Δf _cm / 2).

After amplifying them in a 2-channel amplifier of intermediate frequency 33 and subsequent phase detection in phase detectors of a total of 17 and a difference of 18 channels, the sum and difference signals are transferred to the same video frequency equal to

f _in = f _r + f _d2 + Δf _cm / 2,

and correspond to the same permitted areas of the target (surface). As a support to the first inputs of the phase detectors 17 and 18 from the fourth output of the pathogen 9 comes a signal with a frequency f _op . Next, the sum and difference signals are fed to the Doppler frequency amplifiers 19 and 20, where they are amplified and filtered in the frequency range corresponding to the range of working delays of the signal with an additional extension equal to the range of Doppler shifts of the reflected signals f _d1 and f _d2 .

The structural diagram of the Doppler frequency amplifiers (UDM) 19 and 20 is shown in Fig.6. The amplitude-frequency characteristic (AFC) of the Doppler amplifier is shown in Fig. 7 and has a rise of 12 dB / octave towards high frequencies, determined by an analog filter with digital control 58, taking into account a decrease in the power of the reflected signal by 12 dB with an increase in the signal delay to the target in 2 times. Beyond the boundary of the working band of the signal, the frequency response of the Doppler frequency amplifier has a fast-falling decay formed by the frequency response of a sequential third low-pass filter (LPF 3) 60. To ensure operation of the block of Doppler filters 22 (23) behind the Doppler frequency amplifier 19 (20) in the required dynamic range The input signals between the digital filter with digital control 58 and the third low-pass filter 60 include a controlled analog attenuator (UAA) 59, to which an analog AGC signal from AGC 21 is connected. ie the input signal to the AGC circuit is the output of the third low-pass filter 60 amplifier Doppler frequency sum signal of the analog filter 19. A feature of digital control 58 in UDCH circuits 19 and 20 is that it is controllable at rejected code frequency (f _udch), coming from the first the output of the information processing device 12 to its first input. At the same time, at a given frequency of rejection f _udc = (f _d1 + f _d2 ) / 2, interference signals from the Earth arriving along the main beam are significantly attenuated due to a dip in the frequency response of the digital filter 58 (see Fig. 7). The increase in frequency response at frequencies above the notch frequency (f> f _Udd ) is determined by the expression

K (f) = K ₀ + 12 log ₂ (ff _uach ),

where K ₀ is the amplification of the path of the total and difference channels at the notch frequency.

The total and difference signals from the outputs of the UDC 19 and 20 are supplied to the corresponding blocks of Doppler filters 22 and 23, where narrow-band Doppler filtering at frequencies

f _m = m / 2 T _kg

Where

T _kg = T _LChM -2R _max / s,

T _kg - coherent signal accumulation time corresponding to the forward stroke of the chirp saw signal T _lchm .

The outputs of the blocks of Doppler filters total 22 and differential 23 channels receive quadrature components of the signal at frequencies f _m , respectively, signals from ranges

R _m = s T _LFM f _m / 2Δf _virgin

A variant of constructing blocks of Doppler filters 22 and 23 is shown in Fig. 8 and will be discussed below.

By interrogating the Doppler filter blocks of the total 22 and the differential 23 channels through the polling units (BO-C) 24 and (BO-R) 25, the corresponding quadrature target signals with a frequency (range) scan arrive at the first and second input of the angle discriminator (DU) 27. The polling sequence of the filters of the block of Doppler filters 22 and 23 is set by the synchronizer code 11, which arrives at the first inputs of the polling blocks of the total 24 and differential 25 channels.

The angle discriminator (DU) 27 is constructed according to the scheme shown in Fig. 10 and performs scalar multiplication of the total and difference signals coming in quadrature from the outputs of the polling units 24 and 25.

The output of the angle discriminator 27 for the mth polled frequency is

Е _m = C _Σ (m) * С _Δ (m) + S _Σ (m) * S _Δ (m) = | Σ _m | * | Δ _m | cosφ _m ,

where C _Σ (m) and C _Δ (m) are the cosine components of the signals at the outputs of the blocks

polls 24 and 25 respectively

S _Σ (m) and SΔ (m) are the sine components of the signals at the outputs of the polling units

24 and 25 respectively

| Σ _m | - the module of the total signal at the m-th polled frequency,

| Δ _m | - the difference signal module at the mth polled frequency,

φ _m is the angle between the signal vectors of the total and difference channels at the outputs of the polling units 24 and 25 for the mth polled frequency (0, π).

For further unambiguous correspondence of the measured angular deviation of the target from the RSN by the divider 28, the signal is normalized from the output of the angle discriminator 27 by the signal power in the total channel at the same m-th frequency (receiving an error signal by angle):

γ _m = E _m / | Σ _m | ² = | Δ _m | cosφ _m / | Σ _m |.

Power calculation | Σ _m | ^{2 is} performed by a quadrature combining unit (BOC) 26, the structure of which is shown in FIG. 9. The output of the quadrature combining unit 26 is connected to the first input of the divider 28. The output signal of the quadrature combining unit 26 is:

| Σ _m | ² = C _Σ ² (m) + S _Σ ² (m).

The relationship of the direction-finding reference γ _m formed by the divider 28 and then fed to the eighth input of the information processing device 12 with the angular deviation of the target from the RSN ΔB _m is determined by the expression:

ΔВ _m = γ _m · ρ,

where ρ is the scale factor.

To the information processing device (UOI) 12, the signal from the quadrature combining unit 26 is received in the range-angle coordinates. In this case, the range R _m corresponds to the number m (code) of the interrogated frequency generated by the synchronizer 11 and arriving at the fourth input of the UOI 12, and the angle between the direction of the RSN and the axis of the aircraft is determined, on the one hand, by the angle between the RSN and the axis of the aircraft coming to the sixth input the information processing device 12 from the second (information) output of the antenna drive 29, on the other hand, is specified by the directional reading γ _{m of the} deviation of the target from the RSN, which comes from the divider 28 to the eighth input of the information processing device 12.

Work (UOI) 12 occurs in accordance with the algorithm (Fig. 13) and the logical state of the synchronization pulse coming to the fifth input of the primary processing unit 34 from the second output of the synchronizer 11. The primary processing unit 34 receives the information received at it and, after preliminary processing, issues to the secondary processing unit 33, information about target detection (P (m, j) = 1) in the resolvable cell (m, j) at the first output accompanied by its read permission signal (PC) at the second output.

First, the radar is turned on, after which the secondary processing unit 33 (Fig.13) sets the initial operating conditions:

code of the lower boundary of the scanning sector j _n ,

the value of the upper boundary of the scanning sector

j _k = j _o + Δj, where Δj is the angular size of the scanning sector,

the sign of the inclusion of the review is formed (KO = 1),

issued to the second input of the antenna drive 29 command AC _in = 1 input code of the initial azimuthal position of the antenna and its value j _n = j _o .

Next, the secondary processing unit 33 is in the standby mode of the arrival of the permission for information retrieval (PC = 1) from the second output of the primary processing unit 34 (in time this is the beginning of the interval T _Bo , Fig. 11, item 79) to its third input. When PC = 1, the secondary processing unit 33 receives a scan of the sign of target detection P (m, j) from the first output of the primary processing unit 34. Reception ends when the value of the read permission signal (PC = 0) arrives at the third input of the secondary processing unit 33 from the primary processing unit 34.

The primary processing unit 34 on the same interval with PC = 1 produces:

- accumulation of the implementation of the signal from the block combining quadrature 26 over all N ranges of the operating range in a sliding azimuth window of k sweeps by range, accumulation of the implementation of the signal of the angular mismatch of targets from the RSN received at the fourth input of the primary processing unit 34 over all N ranges in the same azimuthal a window of k sweeps in range,

- detection of the signal on the accumulated implementation from the block combining quadrature 26,

- gives a sweep of the target detection signal P (m, j) in a sliding window of 2s * 2q cells in range and azimuth (s and q are the maximum number of range and azimuth cells occupied by the target, respectively). For non-zero values of P (m, j), the coordinates (m, j) correspond to the position of the detected resolved target or its part.

After receiving P (m, j), when PC = 0, the secondary processing unit 33, in accordance with the algorithm of Fig. 13, reads information about the speed V and the drift angle α coming to it at the fourth and fifth inputs from the first and second outputs of the meter speed and drift angle 13, respectively. In addition, the secondary processing unit 33 reads the value of the current code of the azimuthal angle j arriving at its sixth input from the second (information) output of the antenna drive 29, after which it calculates the tuning frequency of the probe synthesizer 8 (f _n2 ) and the notch frequency (f _udc ) for amplifiers of Doppler frequencies 19 and 20 by sequential calculation of the expressions:

f ₁ ≅n (k ₁ f ₀ + f _н1 ),

f ₂ ≅n (k ₂ f ₀ + f _н1 ),

f _d1 (j) = 2f ₁ Vcos (B (j) + α) / c,

f _{d2 (j)} ≅2f ₂ Vcos (B (j) + α) / c,

Δf _cm = f _d1 -f _d2 ,

f _n2 = f _n1 + Δf _cm / 2n,

f _Udd = (f _d1 + f _d2 ) / 2,

where V is the speed of the aircraft relative to the Earth,

B (j) is the angle of sight of the RSN, counted from the axis of the aircraft, arriving in the form of code j at the sixth input of the secondary processing unit 33 from the second output of the antenna drive 29 through the sixth input of the AOI 12,

α is the drift angle of the aircraft,

f _n1 is a constant frequency selected for reasons of convenience of implementation of the GFM 39.

The values of the settings f _n1 and f _n2 and the slope of the LFM signal k ₃ are output from the fourth and fifth outputs of the secondary processing unit 33, respectively, to the fourth and fifth inputs of the probe synthesizer 8, the value f _ff is given from the sixth output of the secondary processing unit 33 to the first inputs of the amplifiers Doppler frequency 19 and 20.

Next, the secondary processing unit 33 analyzes (Fig.13) the current value of the azimuthal angle of the antenna direction j and compares it with the calculated final j _k . For j≤j _k . (the rotation of the antenna did not reach the end of the scanning sector) the scene continues to be scanned in the same scanning sector from j _n to j _k , but the secondary processing unit 33 goes into standby mode when the information retrieval resolution appears again (PC = 1), and the cycle receiving the next P (m, j), V, α, j, calculating and issuing f _n1 , f _n2 , f _udc , k1 to the corresponding nodes is repeated. When j> j _k (the antenna rotation reaches the end of the scanning sector), the sign of the survey changes to KO = 0 (end of the survey) and the radiation of the radar probe signal is turned off. After that, the secondary processing unit 33 refines the coordinates of the detected targets, where P (m, j) = 1

m _c (j) = msm _cm (j),

j _c = jp.

Given the price of the least significant bit of the range code m, equal to

c T _LChM / 4T _kg Δf _virgins ,

the first given coordinate of the target in range is

R _c = c T _lchm m _c (j) / 4T _kg Δf _virgins

The second coordinate - the azimuth of the target issued to the aircraft control system is

B _c = j _c Δaz,

where m is the value of the range code, where P (m, j) = 1,

j is the value of the azimuthal angle code, where P (m, j) = 1,

m _cm (j) =] 2f _fr (j) T _kg [, is the range offset code caused by the Doppler signal shift and Δf _cm ,

][ - the integer part of number,

s is the window size parameter in range, in which the presence of the target in the primary processing unit 33 is determined,

p is the window size parameter in the azimuth angle, which determines the presence of the target in the primary processing unit 33,

T _kg is a constant determined by the passband of Doppler filters (coherent accumulation time),

j _c is the azimuthal angle code of the RSN direction of the antenna unit 1 relative to the axis of the aircraft, issued by the antenna drive 29 from the second output to the sixth input of the secondary processing unit 33 through the sixth input of the AOI 12,

Δ _az - the price of the least significant bit of the azimuthal angle code.

Further, according to the algorithm of FIG. 13, the secondary processing unit 33 outputs the previously measured target coordinates to the control system for further classification and target selection for tracking and goes into standby mode when a new radar power-up command arrives with new conditions being set.

To synchronously receive the information signal from the block combining quadrature 26 and issue a sweep of the detection signal in range to the first (shear) input of the threshold detector 86, packets of N shear pulses (Fig. 11, pos. 83) with a period of synchronization pulses arrive (Fig. 11, POS. 79). The formation of packs of N shear pulses is performed by a circuit consisting of a first shear register 85, which provides a delay of the synchronization pulse by N periods of pulses T _in (Fig. 11, pos. 82), and a third circuit And 84, which receives the synchronization pulse itself (second input), it is also delayed by N shift pulses (third input), and clock pulses arriving at the first input (Fig. 11, position 78). Due to the selected logic and the connection of the synchronizing pulse through the inverting (second) input of the second AND 84 circuit, at its output we have a pack of N pulses in the first half of the interval T _Bo (Fig. 11, pos. 83).

An embodiment of the threshold detector 86 is shown in FIG. 14. The operation of the threshold detector 86 is as follows.

The implementation of the sweep of the signal from the block combining quadrature 26 is fed to the first input of the shift register SDR 3 ₁ (item 94 ₁ ), which is the first in k series-connected shift registers SDR 3 ₁ ... SDR 3 _k . The number k is equal to the number accumulated in the moving interval of implementation. Each of the registers is designed for a sequential sliding record of N parallel n-bit codes supplied to its informational first input. The number N is equal to the number of analyzed range cells in the range sweep (the number of 24 Doppler filters 22 being interrogated by the polling unit). The clock of receiving information in the shift registers from SDR 3 ₁ to SDR 3 _k (pos. 94 ₁ ... 94 _k ) is synchronized with the clock of receiving information from the block of combining quadrature 26 and is provided by the input to the second inputs of the shift registers from SDR 3 ₁ to SDR 3 _k (pos. 94 ₁ ... 94 _k ) packs of N shear pulses. As a result of summing the information from the outputs of the SDR 3 ₁ ... SDR 3 _k (pos. 94 ₁ ... 94 _k ) at the output of the third adder 96, we have a scan of the signals at N ranges accumulated over k realizations coming to the first input of the fourth shift register 95. From the first to the Lth outputs of the fourth shift register 95 (L is greater than twice the maximum radial size of the target), they are connected to the inputs of the same name of the fourth adder 97, at the output of which a sliding threshold is formed, which arrives at the second input of the digital comparator 98. The digital comparator 98 compares t signal (L + 1) / 2 - the central exit of the fourth shift register 95 - with the weighted threshold value. If the weighted threshold is exceeded (signal detection), a logical unit is output at the output of the digital comparator, which is output to the output of the threshold detector.

From the output of the threshold detector 86, the detection signal is supplied to the second shift register 87 of the primary processing unit 34 for a delay in order to coordinate the time of arrival of the detection signal to the fourth AND circuit 90 with the signal delay in the angular selector 89.

In parallel with the solution of the target signal detection problem in the primary processing unit 34, unit marks of the coincidence of the scanning direction of the RSN of the antenna unit 1 with the direction to the target are formed. Initially, the implementation of the sweep of the angular deviation of the targets from the RSN in range, coming from the divider 28 to the fourth input of the primary processing unit 34, does not coherently accumulate on the moving interval from the k implementation in the first drive 88 (Fig. 15). As in the threshold detector 86, in the first drive 88 the signal is accumulated in the entire operating range of N ranges. The synchronous reception of the implementation of the angular deviation of targets from RSN in range to the first drive 88 and the issuance of a sweep of the result of accumulation of range by distance to the angular selector 89 is provided by the output pulses of the third circuit AND 84, received at the first input of the first drive 88. The output implementation of the scan of the angular deviation of targets from RSN range from the output of the first drive 88 goes to the angular selector 89. In the overview mode, the output information of the angular selector 89 is a scan of single marks on the coincidence of the RSN with the target in the whole range working range zone.

The angular selector 89 (Fig. 16) generates marks of coincidence of the RSN with a direction to the target at each range. It uses differential correlation processing of the implementation of the angular error signal at each range. This eliminates the formation of false azimuthal marks of coincidence of the RSN for the purpose when receiving a signal from the side lobes of the radiation pattern of the antenna unit 1. The reception of input information from the first drive 88 and the output of the output marks of the direction to the target are synchronized by thinned packets of shear pulses arriving at the first input of the angular the selector 89 from the fifth circuit AND 91. The shift registers SDR 6 ₁ ... SDR 6 _q (pos. 101 ₁ ... 101 _q ) are designed for sliding reception of an angular error signal at N range cells. The number of registers q corresponds to twice the size of the direction-finding characteristic of antenna unit 1 in the azimuthal plane. Due to the weighted summation of the signals from the outputs of q shift registers, we have a signal close to zero at the output of the sixth adder 103, when the direction of the RSN coincides with the direction to the target. This moment is fixed by a threshold resolver 104, the output of which is the output of the angular selector 89.

The output of the angular selector 89 is connected to the second input of the fourth circuit And 90, the first input of which receives the output signal of the threshold detector 86 through the second shift register 87. The delay of the signal of the threshold detector 86 in the shift register 87 is chosen equal to the delay between the appearance of a zero signal of an angular error at the output of the first drive 88 and the appearance of a mark on the coincidence of the RSN with the direction to the target in the angular selector 89. Thus, the input signals of the fourth circuit And 90 correspond in range and angle to the same center and. The output of the fourth AND 90 circuit is the first output of the primary processing unit 34. A single signal value at the output of the fourth And 90 circuit occurs when the detection of the target signal coincides and the target is found on the RSN.

The scheme for the formation of thinned packs of shear pulses consists of a frequency divider 92, a decoder 93, and a fifth AND 91 circuit. A synchronization pulse (Fig. 11, pos. 79) arrives at the frequency divider 92, the frequency of which is divided by q times. In this case, the pulse period at the output of the frequency divider 92 corresponds to the passage time of the scanning beam of the step along the angle Δaz between azimuthal cells. The divider 92 represents a pulse counter, in which the transfer pulse is fed back to the installation input of the counter and sets the initial state code to (2 ⁿ -q-1), where n is the bit depth of the counter. From this state to the transfer pulse passes q pulses, so the pulse period of the divider 92 is equal to q periods of the synchronization pulses. The decoder 93 selects one of the states of the divider 92 and gives it to the second input of the fifth circuit And 91 and to the second output of the primary processing unit 34 (a signal for enabling information retrieval PC for the secondary processing unit 33). At the first input of the fifth AND 91 circuit, packets of shear pulses come from the output of the third And 84 circuit, so at the output of the fifth And 91 circuit there will be q-thinned packets of shear pulses used in the angular selector 89 and the second shift register 87 to synchronize the reception and delivery of information .

The operation of the block of Doppler filters 22 (23), Fig 8, is as follows. The output signal from the Doppler frequency amplifier 19 (20), supplied to the second input of the analog-to-digital converter 71, is digitized by it with the cycle of pulses arriving at the first input of the block of Doppler filters 22 (23) from the third output of the exciter 9 (Fig. 11, pos. 78). The period of clock pulses T _in (clock sampling signal) is selected from the condition of providing an unambiguous definition of the frequency shift of the filtered video signal:

1 / T _in > 2f _in = 2 (f _r + f _d2 + Δf _cm / 2).

The digitized signal is fed to N Doppler filters 64 ₁ ... 64 _N Each of the 64 _m filters consists of a reference frequency quadrature generator implemented on a 65t ROM read-only memory, reference quadrature multipliers with a digitized signal (Smart 1 _m and Smart 2 _m ) ( pos. 66 _m and 67 _m ), integrators of the multiplication results Int 2 _m (pos. 68 _m ) and Int 3 _m (pos. 69 _m ). The outputs of the integrators Int 2 _m (pos. 68 _m ) and Int 3 _m (pos. 69 _m ) are the quadrature outputs of the 64 _m Doppler filter output at the m-th output of the Doppler filter block. The accumulation of the signal occurs during T _kg = Q T _in , where Q is the number of accumulated samples of the signal. The delay of the reference signal relative to the positive edge of the synchronization pulse, equal to 2R _max / s, and its duration T _{kg are} determined by firmware ROM 65 _m . The values of quadratures (cosine C (m) and sine S (m) components at a frequency f _m ) of the signal filtered in the 1 / T _kg band are:

where A (q) is the value of the input signal in the q-th sample at the output of the ADC 71,

- номер выборки сигнала.

- signal sample number.

A temporary scan of the reference signal with a frequency f _m = m / 2T _kg recorded in the ROM 65 _m is provided by a linearly increasing code of the fourth counter 63, which is input to the ROM 65 _m . The counter 63 with a zero value set by the pulse arriving at its second input (Fig. 11, pos. 81) counts the clock pulses with a period of T _in arriving at its first input during a single value of the synchronization signal T _LChM (Fig. 11, pos. 79) from the second circuit And 70. The input pulses of the second circuit And 70 are a positive synchronization pulse and clock pulses arriving at its second and first input, respectively. The installation pulse of the fourth counter 63 and the integrators Int 2 _m (pos. 68 _m ) and Int 3 _m (pos. 69 _m ) in the initial position is formed by the first circuit And 61 and the second trigger 62. In this case, the trigger 62 delays the synchronization pulse (Fig. 11, pos. 79) for one period of clock pulses (11, pos. 78). The synchronization pulse arrives at the first input of the first AND 61 circuit, and it is inverse to the second, delayed by one clock cycle. Due to this, the filtering result during the interval T _{Bo is} stored until a new cycle T _LChM .

The synchronizer 11 (Fig. 5) generates a synchronization pulse (Fig. 11, item 79) at the second output, a signal sweep code for the frequency (range) m at the third output, and a control code for the generator of manipulating sequences at the first output. The operation of the synchronizer 11 is as follows. Clock pulses with a period of T _in (11, pos.78) are supplied to the counting (first) inputs of the first 53 and second 56 counters. In the counting mode, they work in turn and are controlled by the first trigger 54. When the logical unit arriving at the second (installation) input of the second counter 56 does not count on the first output of the first trigger 54, the code is set on its second output in accordance with the code received from the second code bus 55. At the same time, a logic zero on the second output of the first trigger 54, entering the second installation input of the first counter 53, allows it to count pulses arriving at its first input. The transfer pulse at the output of the first counter 53 occurs when the counter code passes through the maximum value. This pulse arriving at the first input of the first trigger 54 changes its state in which the second counter 56 is allowed to count, the first counter 53 is prohibited and its code is set in accordance with the code coming from the first code bus 52 to the third input. By setting the corresponding codes on the buses 52 and 55, a calculated synchronization pulse is generated at the output of the first trigger 54 (Fig. 11, item 79) with the required values of T _lchm and T _bo . The duration of Th _bo is chosen equal _to Th _bo ≥2NT _in , where N is the number of Doppler filters in the Doppler filter blocks 22 and 23. The upper value of Th _bo is determined by the necessary time for the return of the GLF generators 39 and 45 in the probe synthesizer 8 to the initial state and the time for issuing the codes settings to the corresponding nodes of the radar (synthesizer of the probing signal 8 and Doppler frequency amplifiers 19, 20) with IDI 12. For this interval of values, select the code on the second code bus 55, in which the least significant bits of the code of the second counter, carrying information about the number of respondent Doppler filter m are zero. The synchronization pulse from the output of the first trigger 54 is supplied to the third counter 57, forming a code used to control the generator of the manipulating sequences 10.

Thus, the proposed monopulse radar with a single transceiver antenna system due to the use of time-frequency isolation of the receive path from the emitted LFM signal, manipulated in frequency according to a tunable discrete-time law, has the lowest peak radiation power, which simplifies the implementation of a highly reliable small-sized transmitter output device, in including semiconductor devices, while reducing the time for viewing the scene in order to search for targets.

Based on the above description and drawings, the proposed device can be manufactured using known components, known in the electronic industry of technological equipment and used on mobile carriers as a radar to detect targets and set their initial coordinates for subsequent classification and tracking.

Sources of information

1. RF patent 2099739 from 12.20.97, IPC G 01 S 13/44. Radar station.

2. A.I. Leonov, K.I. Fomichev. Monopulse radar. - M .: Soviet Radio, 1970 (p. 22. Fig. 1.9., P. 41 fig. 1.22).

3. USSR author's certificate 180795 of 11/15/82, IPC G 01 S 13/44.

4. D. Johnson, J. Johnson, G. Moore. Active Filter Reference. - M: Energoizdat, 1983 (p. 65-67 Fig. 7.5).

5. V. Manasevich. Frequency synthesizers, theory and design. - M.: Communication, 1979 (p. 35, fig. 1.17; p. 190, fig. 4.10, 4.11).

6. V.E. Kolchinsky, I.A. Mandurovsky, M.I. Konstantinovsky. Doppler devices and navigation systems. - M .: Soviet Radio, 1975 (p. 368-370, fig. 11.16).

7. V.A. Likharev. Digital methods and devices in radar. - M.: Soviet Radio, 1973. (p. 189 fig. 2.39; p. 255 fig. 3.17).

8. RF patent 2189048 dated 09/10/2002, IPC G 01 S 13/44, 3/22. Angle selector for surveillance monopulse radar.

9. Product A-038, Guidelines for the technical operation of GU1.000.058 RE1 (l. 20/2).

10. Block DR1-363I Instructions for setting up GU2.068.159 I2 (l.13).

Claims (2)

1. Monopulse radar, which contains serially connected power amplifier, antenna switch, sum-difference converter and antenna block, as well as a pathogen, synchronizer, information processing device (UOI), 2-channel sum-difference receiver, phase detectors of sum and difference channels, quadrature combining unit, angle discriminator and antenna drive, the output of the antenna drive kinematically connected to the antenna unit, the input of the antenna drive connected to the second output of the UOI, the second (information) output The antenna drive od is connected to the sixth input of the IOI, the 2-channel sum-difference receiver contains two-channel high-frequency amplifier, a balanced mixer, and a 2-channel intermediate frequency amplifier (UPCH), a heterodyne input of a balanced mixer, connected in series through two inputs-outputs of the total and difference channels is the third (heterodyne) input of the 2-channel sum-difference receiver, the first and second inputs of the high-frequency amplifier are inputs, and the first and second outputs of the amplifier are intermediate The outputs are the outputs of the sum and difference channels of the 2-channel sum-difference receiver, respectively, the OOI contains a primary processing unit and a secondary processing unit, the first output of the primary processing unit is connected to the first input of the secondary processing unit, respectively, the third, fourth and first outputs of the secondary processing unit are the second, fourth and third output of the UOI, the third input of the UOI is connected to the first input of the primary processing unit, the fourth output of the pathogen is connected to the first inputs of the phase detectors the sum and difference channels, the third output of the synchronizer is connected to the fourth input of the UOI, the first output of the 2-channel sum-difference receiver is connected to the second input of the phase detector of the total channel, the second output of the 2-channel sum-difference receiver is connected to the second input of the phase detector of the difference channel, the output of the quadrature combining unit is connected to the third input of the IOI, characterized in that it is connected in series with a sounding signal synthesizer (SES), a frequency multiplier, switched the transmission filter and a directional coupler, the second output of which is connected to the input of the power amplifier, a series-connected amplifier of the Doppler frequency of the total channel and a block of Doppler filters of the total channel, series-connected amplifier of the Doppler frequency of the differential channel and the block of Doppler filters of the differential channel, polling blocks of the total and difference channels automatic gain control circuit (AGC), the output of which is connected to the third inputs of the Doppler frequency amplifiers a differential and a differential channel, a generator of manipulating sequences, switched filters for the total and differential channels, a speed and drift angle meter and a divider, the third output of the directional coupler is connected to the third (heterodyne) input of the 2-channel total-differential receiver, the first output of the antenna switch through a switched filter the total channel is connected to the first (total) input of the 2-channel total-differential receiver, the second (differential) output of the total-differential converter is connected Through a switched filter of the difference channel with the second (differential) input of the 2-channel total-difference receiver, the output of the phase detector of the total channel is connected to the second input of the amplifier of the Doppler frequency of the total channel, the output of which is additionally connected to the input of the AGC, the output of the phase detector of the difference channel is connected to the second the input of the amplifier Doppler frequency of the differential channel, the second output of the synchronizer is connected to the first input of the synthesizer of the probing signal, the fifth input of the UOI and the third inputs of the block of Doppler filters of the total and difference channels, the third output of the pathogen is connected to the first input of the generator of the manipulating sequences, the input of the synchronizer, with the first inputs of the blocks of Doppler filters of the total and difference channels and the seventh input of the UOI, the first and second outputs of the pathogen are connected respectively to the second and third input of the synthesizer probe signal, the first synchronizer output through the manipulator sequence generator is connected to the sixth input of the probe synthesizer driven by the second (control) input of the switched transmission filter, the second (inverse) output of the manipulating sequence generator is connected to the second (control) inputs of the switched filters of the total and difference channels, the third and fourth outputs of the UOI are connected respectively to the fifth and fourth inputs of the probe signal synthesizer, the first the UOI output is connected to the first (control) inputs of the amplifiers of the Doppler frequency of the total and difference channels, the outputs from the first to the Nth block of Doppler filters of sums the channel are connected respectively to the inputs of the polling unit of the total channel from the second to (N + 1) -th, the outputs from the first to N-th block of Doppler filters of the differential channel are connected respectively to the inputs of the block of polling the difference channel from the second to (N + 1) - d, the third output of the synchronizer is additionally connected to the first inputs of the polling units of the total and differential channels, the output of the polling unit of the differential channel through series-connected angle discriminator and the divider is connected to the eighth input of the UOI, the output of the total polling unit the channel is connected to the input of the quadrature combining unit and the first input of the angle discriminator, the output of the quadrature combining unit is additionally connected to the first input of the divider, the first and second output of the speed and drift angle meter are connected respectively to the first and second input of the UOI, the first, second, fourth and sixth inputs The UOI are connected to the fourth, fifth, second and sixth inputs of the secondary processing unit, respectively, the second output of the secondary processing unit is the first output of the UOI, the fourth input of the primary processing unit is eighth input ECM, ECM seventh input coupled to a third input of the primary processing unit, fifth input of ECM connected to the second input of the primary processing unit, the second output of the primary processing unit is connected to the third input of the secondary processing unit. 2. Monopulse radar according to claim 1, characterized in that the sounding signal synthesizer (SES) consists of 2 channels, each of which contains a linear-frequency-modulated signal generator, phase detector, balanced mixer, directional coupler, low-pass filter and generator controlled by voltage, the signal of one of the channels passes through the third switch to the output of the synthesizer of the probe signal, while the first input of the SES is connected to the first synchronizing inputs of the first and second generators of the signal, the fourth and fifth inputs of the SES are connected to the second inputs of the first and second generators of the linear frequency-modulated signal, respectively, the output of the first generator of the linear frequency-modulated signal in series through the third phase detector, the first low-pass filter and the first voltage-controlled generator, connected to the input of the second directional coupler, the first output of which through the second balanced mixer is connected to the second input of the third phase detector, the second output of the second The coupler through the first switch is connected to the SZS output, the output of the second linearly frequency-modulated signal generator is sequentially through the fourth phase detector, the second low-pass filter and the second voltage-controlled generator connected to the input of the third directional coupler, the first output of which is connected to the second input of the fourth phase detector, the second output of the third directional coupler is connected to the third input of the first switch, the second and third BES th input are connected to first inputs of the second and third balanced mixers, respectively, a sixth input coupled to a first ESS (control) input of the first switch.

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