RU2069003C1 - Digital range finder - Google Patents

Abstract

FIELD: radiolocation. SUBSTANCE: digital range finder includes analog-to-digital converter 1, multiplexers 2, 4, on-line storage 3, squarer 6 built on permanent storage, buffer register 7, storage circuit 8, register-storage circuit 9, unit controlling on-line storage which incorporates flip-flop 10, pulse former 11 and cyclically returnable counter 5 with maximum repetition cycle N, where N is number of readings of analog-to-digital converter fallen within duration of "sliding window" maximum by extent. Storage circuit is manufactured in the form of storage-subtractor. Capacity of on-line storage amounts to N x m digit words, where m is word length of analog-to-digital converter. Range finder form "sliding window" for range from sum of squares of readings or of their moduli. EFFECT: increased reliability of operation of range finder. 4 cl, 3 dwg

Description

 The invention relates to the field of radio electronics and can be used in radar for measuring ranges, in ultrasound diagnostics and in other areas where it is necessary to measure time intervals.

 Known digital tracking distance meters that contain the optimal receiver, ADC and digital shapers discriminating characteristics of the meter.

 The disadvantage of tracking meters in general and indicated in particular is the loss of stability in multi-signal situations.

 With second-order astatism, a tracking meter is able to ensure the absence of dynamic measurement errors only for targets moving at a constant speed.

 Finally, another drawback of tracking rangefinders is their vulnerability to exposure to range-leading interference.

 All this suggests the preference for the use of non-tracking range meters.

 Known non-tracking digital device for measuring range to the target, containing a reference pulse generator, an AND gate, counter, synchronizer, trigger, signal detection device, two delay lines, range register, potential pulse output circuit. The known device is free from the disadvantages inherent in tracking rangefinders, and allows you to discretely measure the range "up to the pulse repetition period of the reference frequency".

 However, to increase the accuracy of measurements, it is necessary to use two-scale reference methods. In addition, the measurement accuracy in this case depends on the parameters of the signal detection device, the quality of which is very stringent.

 Known rangefinder device containing ADCs, registers, random access memory, RAM, detector-meter.

 Being oriented to processing a packet of video pulses, it can in principle be used to measure the range of a single signal, provided that the sampling rate allows us to obtain n ADC samples for the duration of the pulse. The disadvantage of this device is the non-optimal processing of the echo signal.

 The closest in technical essence to the claimed invention is (see A. Likharev, “Digital Methods and Devices in Radar,” M. Sov. Radio, 1973, p. 129 130), a digital rangefinder operating in the “moving window” mode containing, in particular, the ADC, RAM, the RAM control circuit (its presence is implied), a quadrator (functional converter for RAM), a drive (in the original text appears under the name "adder"), a comparison circuit with a threshold, including a digital comparator, on one of the inputs of which the code th voltage. The ADC input is the input of the device. This removable solution allows digital accumulation of a packet of video pulses, weighted according to the law of its envelope.

 The disadvantage is the orientation to video-frequency processing of information, which does not allow to obtain high accuracy of range measurement, which, as you know, can be achieved by moving to determining the delay time at the radio frequency. In addition, the versatility of the prototype device is reduced due to the lack of the ability to control the length of the "moving window".

 The essence of the invention lies in the fact that the composition of the digital rangefinder is additionally introduced two multiplexers, a buffer register, a register-drive; the control unit of the random access memory (BOP) unit includes a trigger, a pulse shaper, a cyclically tunable counter with the largest repetition cycle N, where N is the number of ADC readings falling within the duration of the maximum length of the “window”, the drive is made in the form of a subtractor drive, the capacity of the BOP is N m-bit words, where m is the ADC capacity, and the ADC output is connected to the first input of the first multiplexer, the second input of which receives zero potential, the output of the first multiplexer is connected to the BOP input, as well as the first input of the second multiplexer, the second input of which is connected to the BOP information output, the BOP address inputs are connected to the outputs of the cyclically tunable counter of the BOP control circuit, the window size code is supplied to the information input, the output of the second multiplexer is connected to the input of the address of the quadrator, the information output of which is connected to the information input of the buffer register, the output of which is connected to the first information inputs of the subtractor drive, the output of which is connected inen with the input of the register-drive, the output of which is connected to the second information inputs of the drive-subtractor and is the output of the range finder, the combined inputs of the trigger and the pulse shaper represent the clock input of the range finder, the direct output of the trigger is connected to the clock input of the ADC, and the inverse with the combined count input is cyclically tunable counter, the control inputs of the BOP and the second multiplexer, the output of the pulse shaper is connected to the combined control inputs of the buffer register and register a storage device, the combined control inputs of the first multiplexer and form a drive-subtracter input "reset" ( "Starting distance"), a range finder, the control input is an input squarer "indication" of the device.

 The “Window size” input is intended to control the time length of a window sliding along its range. The “Sign” input is necessary for controlling the operating mode of the range finder and allows you to switch from accumulating the sum of squares of samples to the mode of accumulating modules. The moment of the end of the “Reset” signal is the beginning of the range reference.

 The significance of the differences of the claimed device, in addition to the obvious differences in the hardware solution, lies in the fact that it provides the ability to vary the time length of the sliding window, to switch from the accumulation mode of the sum of squares of samples to the accumulation of the sum of modules of a positive or negative number, which, in turn, allows you to measure the delay time of both video and radio pulses. In addition, the implementation of the drive in the form of a drive-subtractor made it possible to extremely simplify the operation of updating information in a sliding window, since there was no need to constantly transfer the drive from the mode of summing the newly received ADC readings to the mode of subtracting the first and the samples running in the current position of the sliding window.

 Functional diagram of the device is shown in FIG. 1, where the following notation is used: 1 analog-to-digital converter (ADC); 2 first multiplexer; 3 block of random access memory (BOP); 4 second multiplexer; 5 cyclically tunable counter; 6 quadrator, made on the block of read-only memory (ROM); 7 buffer register; 8 drive-subtractor; 9 - drive register; 10 trigger; 11 pulse shaper.

 In the considered version of the technical solution of the range finder, it was assumed that the moving sum of squares is either not compared with the threshold at all, or this comparison is carried out programmatically in subsequent information display devices. In principle, threshold testing can be implemented in hardware. To do this, it is necessary to introduce a comparison circuit with a threshold in the register and the digital comparator into the range finder under consideration, and the threshold voltage code (“Threshold” signal) is supplied to the register information inputs, and its control input is connected to the “Reset” input of the range finder, the register output is connected to the first input of the digital comparator, the second input of which is connected to the combined output of the register-drive and the second information inputs of the drive-subtractor, which together with the output of the digital comparator form range finder output.

The functional diagram of this embodiment of the digital rangefinder is shown in FIG. 2, where in addition to FIG. 1 the following notation is used: 12
register, 13 digital comparator.

 In a number of applications, when a detailed indication of the range sweep is not required, a variant of the digital rangefinder shown in FIG. 1, the composition of which is additionally introduced a maximum search scheme and comparison with the threshold. Its first input is connected to the output of the register-drive, the threshold voltage code (“Threshold” signal) is received at the second input, the circuit output is the output of the range finder, the first control input of the circuit is connected to the “Reset” input of the range finder, and the second control input is direct (or inverse) trigger output.

 When focusing on single-purpose measurements, a possible option for constructing the indicated maximum search scheme and comparing it with a threshold is to execute it as a part of a digital comparator, a counter and four registers, and the threshold voltage code (“Threshold” signal) is supplied to the information inputs of the first register, the output of the first register is connected with the first input of the digital comparator, the second input of which is connected to the combined output of the register-drive, the second information inputs of the drive-subtractor and the input of the second register the output of which is connected to the third input of the digital comparator, the output of which is connected to the combined control inputs of the second and third registers, the input of the third register is connected to the outputs of the counter, the counting input of which is connected to the direct output of the trigger, the output of the third register is connected to the input of the fourth register, the output of which is the circuit output, the combined control inputs of the first and fourth registers and the counter zeroing input are connected to the “Reset” input of the range finder.

 The functional diagram of the digital rangefinder with the described option for constructing the maximum search circuit and comparison with the threshold is shown in FIG. 3, where the following notation is used: 1 analog-to-digital converter (ADC); 2 first multiplexer; 3 block of RAM; 4 second multiplexer; 5 cyclically tunable counter; 6 quadrator; 8 drive-subtractor; 9 register-drive; 10 trigger; 11 - pulse shaper; 12 first register; 13 digital comparator; 14 - second register; 15 counter; 16 third register; 17th fourth register.

 Let us consider the operation of the proposed device using the example of the embodiment shown in FIG. 1.

 The accumulation mode of the voltage modules or their squares is set by the operator.

 The number of accumulated pulses in the "sliding window" is also determined by the operator.

 The size of the accumulation series N in this case can vary from 1 to 16 pulses.

 The operation of the accumulation scheme using the "sliding window" can be reduced to two stages.

Initially, before viewing the distance, external communication devices must generate a reset pulse and apply it to blocks 2 and 8. The duration of the reset pulse τ _c must be at least (N + 4) • 2 / f _t . At the same time, an array "0" with an amount of at least N, where N is the size of the accumulation series, will be recorded in the BOP (node 3). In addition, the multiplexers of the nodes 2 and 3 of the reset pulses are switched to the live broadcast of the logical "0" to their outputs. At the same time, a logical "0" is supplied to the input of node 6 for N + 4 clock cycles of the ADC start-up, which is recorded through the node 7 and the ALU (node 8), which is switched to the live broadcast mode, in the drive register (node 9). After the reset pulse has ended, by the time the ADC is triggered, an array of N logical "0" is recorded in the BOP, the drive register is reset. At the end of the reset pulse, the multiplexer node 2 switches to the translation of the digitized voltages from the ADC output to the BOP input, the multiplexer node 4 switches to the translation of the number codes from the BOP outputs (node 3) to the input of the functional ROM converter (node 6). In addition, ALU (node 8) is put into subtraction mode.

 The second stage of the device’s operation includes the actual accumulation of N squares of modules or modules (depending on the operating mode selected by the operator) of the digitized values of the echo voltage, that is, the formation of a “sliding window” of accumulation.

 After the zeroing pulse ends at the moment the ADC start-up pulse is supplied from the BOP (node 3) using the address code that is installed at that moment at the outputs of the cyclic counter (node 5), the first number (in this case "0") is read by the control signal, which through the multiplexer (node 4) it enters the inputs of the functional converter (node 6), from the outputs of which through the buffer register (node 7) it enters the inputs of the ALU (node 8). ALU subtracts the number stored in the drive register (node 9) from the number received from the buffer register (node 7). The next cycle of the control signal reads from the BOP the number recorded there from the ADC output at the same address (the frequency of the control signal is twice as high as the ADC start frequency). Further, the number read from the BOP along the circuit already described is fed to the ALU input, which subtracts the number stored in the drive register (node 9) from it.

 After N clock cycles of the ADC start (CIC signal) in the storage register (node 9), the sum of the first N digitized voltage values after the reset pulse will be recorded, since at the time of the reset pulse in the BOP (node 3), N numbers equal to "0 "

 Thus, for the first N ADC start pulses from the moment the reset pulse ends, the information recorded in the BOP is completely updated (node 3).

 With the arrival of the N + i ADC start pulse (i≥1) from the sum of the digitized voltages (squares of modules or modules depending on the mode) accumulated in the drive register (node 9), the echo signal digitized for N clocks up to this point is subtracted and added echo signal voltage digitized at the moment of N + i clock.

 Such a construction of the processing scheme makes it possible to form a “sliding window” of the sum of the squares of the modules (or modules) N of the digitized values of the echo signal, which shifts after the accumulation of the first gate in increments of one ADC sample over the entire range.

 It should be noted that with a series of accumulation N = 16 in the case of using a 6-bit ADC (the 6th digit is significant), the sum of the accumulated squares of the digitized voltages can be represented as 14-bit numbers. At the same time, the dynamic range of information taken from the drive register (node 9) can reach 84 dB.

 In the case of accumulation of modules of digitized voltage values under the same conditions, the possible values of the numbers at the output of the drive register do not exceed 9 bits, which corresponds to 54 dB.

 Most black and white monitors allow you to display information in the form of a change in screen brightness with a dynamic range of up to 24 dB. Therefore, it is necessary to take into account the dynamic range of the accumulated values of the digitized voltages when constructing a system for displaying information on indicators.

 The implementation of the digital rangefinder shown in FIG. 2, differs from the considered option in that a comparison scheme with a threshold is additionally introduced.

 In the process of working in the digital comparator 13, the current response of the “sliding window” is compared with a threshold, and if the threshold is exceeded, the necessary attribute is used for its output, which is used by subsequent information processing tools.

 As for the maximum search circuit present in the digital rangefinder embodiment of FIG. 3, then it can also be performed on ESL-series microcircuits, for example, 500.

 The results of the accumulation of squares of samples are compared in a digital comparator 13 with a threshold signal coming from register 12. In the same comparator, the current value of the sum of the squares of samples is compared with the previous value of this amount stored in register 14.

 If the current value exceeds the previous result of the summation, the corresponding signal from the output of the digital comparator is fed to the control inputs of the registers 14, 16. At the same time, the current value of the sum of squares is written to the register 14, and the code of the current reference number coming from the outputs of the counter 15 AUP. Thus, in register 14 the current maximum value of the sum of squares of samples is stored, and in register 16 the ADC reference number corresponding to this maximum. Upon completion of the enumeration of all the squares of the ADC samples in the required range of distance, the impulse of the beginning of the distance arrives at the “Reset” input of the digital range finder. In this case, the output code of the register 16 is entered in the register 17. This will be the information about the delay time of the echo signal. In addition, the next value of the threshold is recorded in register 12.

 The proposed digital rangefinder allows you to measure the delay time of any pulse signal (video frequency, simple radio pulse, chirp signal, etc.), which makes it a universal meter. YYY1 YYY2

Claims (4)

 1. A digital range finder containing an analog-to-digital converter (ADC), a random access memory (BOP) unit, a BOP control unit, a quadrator made on a read-only memory block, and a drive, the ADC input is an input of a digital range finder, characterized in that two multiplexers, a buffer register and a drive register, and the BOP control unit is made in the form of a trigger, a pulse shaper, and a cyclically tunable counter with the largest repetition cycle N, where N is the number of accumulated ADC readings, the drive is made in the form of of a subtractor-subtractor, the BOP capacity is N • m bit words, where m is the ADC bit, and the ADC output is connected to the first input of the first multiplexer, the second input of which is a signal input for entering BOP zeroing codes, the output of the first multiplexer is connected to the BOP information input and the first input of the second multiplexer, the second input of which is connected to the BOP information output, the address inputs of which are connected to the outputs of the cyclically tunable counter, the BOP control unit, the information input of which is the signal input to change the account coefficient, the output of the second multiplexer is connected to the input of the address of the quadrator, the information output of which is connected to the information input of the buffer register, the output of which is connected to the first information inputs of the drive-subtractor, the output of which is connected to the input of the register-drive, the output of which is connected to the second information inputs of the drive-subtractor is the output of the range finder, the combined inputs of the trigger and the pulse shaper are the clock input of the range finder, p the direct trigger output is connected to the ADC clock input, and the inverse one is connected to the counter input of a cyclically tunable counter and the control inputs of the BOP and the second multiplexer, the output of the pulse shaper is connected to the control inputs of the buffer register and the storage register connected to each other, the combined control inputs of the first multiplexer and the drive-subtractor are the input of the signal "Reset" of the range finder, and the control input of the quad is the control input of the range finder.  2. The range finder according to claim 1, characterized in that a comparison unit with a threshold is implemented in it in the form of a register and a digital comparator, the information inputs of the register are the input of the threshold voltage code signal, and the control input is connected to the "Reset" input of the range finder, the output register connected to the first input of the digital comparator, the second input of which is combined with the output of the register-drive and is the output of the range finder.  3. The range finder according to claim 1, characterized in that a maximum search and comparison unit with a threshold is inserted into it, the first input of which is connected to the output of the register-drive, the second input is the input of the threshold voltage code signal, and the output is the output of the range finder, the first control the input of the maximum search unit and the comparison with the threshold is connected to the input "Reset" of the rangefinder, and the second control input with a direct output of the trigger.  4. The range finder according to claim 1, characterized in that a global maximum search and threshold comparison scheme is implemented in the form of a digital comparator, counter and four registers, the information inputs of the first register are the input of the threshold voltage code signal, the output of the first register is connected with the first input of the digital comparator, the second input of which is connected to the output of the register-drive and the input of the second register, the output of which is connected to the third input of the digital comparator, the output of which is connected to I am waiting for the control inputs of the second and third registers, the input of the third register is connected to the outputs of the counter, the counting input of which is connected to the direct output of the trigger, the output of the third register is connected to the input of the fourth register, the output of which is the output of the range finder, the control inputs of the first and fourth registers are interconnected and the counter zeroing input is connected to the “Reset” input of the range finder.

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