RU2022472C1 - Device for checking and error correction in redundant modular code - Google Patents

Abstract

FIELD: computer engineering. SUBSTANCE: device having input code converter 1, output code converter 7, and subtracter 6 is provided in addition with constant comparison gate group unit 2, constant multiplying unit 4, OR gate group unit 3, OR gate unit 5, AND gate units 11, 14, comparison unit 12, flip-flop 13. EFFECT: improved speed due to changing working algorithm, separate operations of comparison of numbers and intervals of error distribution. 1 dwg

Description

 The invention relates to computer technology and can be used in communication systems and information processing, operating with modular codes (codes in the system of residual classes - RNS).

 A device for detecting and correcting errors of arithmetic operations, containing the first and second registers of control bits, the outputs of which are connected to the first inputs of the first and second adders, the second inputs of which are connected to the inputs of the memory blocks, the third, fourth and fifth adders, the third and fourth registers control bits, the outputs of which are connected to the first inputs, respectively, of the first and second registers of the control bits, the outputs of which are connected to the first inputs, respectively the fourth and fifth adders, the second inputs of which are connected to the outputs of the fourth and fifth adders, respectively, and the outputs of the third adder are connected to the inputs of the first and second blocks of modular convolution, the outputs of which are connected to the inputs of the third and fourth registers of control bits [1].

 However, this device has a low speed.

 The closest technical solution to the invention is a device for monitoring errors in a redundant modular code, containing an input code converter, the inputs of which are the corresponding information inputs of the device, a correction calculation unit, the first inputs of which are connected to the first information inputs of the analysis unit, the control outputs of which are control outputs of the device, a unit for converting a number into a chain drill, a subtracter and an output code converter, the outputs being input The code converter is connected to the corresponding first inputs of the subtractor and to the information inputs of the unit for converting the number into a chain drill, the outputs of which are connected to the information inputs of the correction calculator, the outputs of which are connected to the second inputs of the subtractor, the outputs of which are connected to the corresponding second information inputs of the analysis block, the outputs of the output code converter and are the first information outputs of the device, the control outputs of the analysis unit are connected to the corresponding control they are the inputs of the correction calculation unit and the number to chain drill conversion unit, the installation inputs of which are respectively combined and are the first installation inputs of the device, the first and second installation inputs of the analysis unit are the second and third installation inputs of the device, the outputs of the code output converter are the second information outputs of the device [2].

 However, this device has a low speed.

 The aim of the invention is to increase performance.

 An essential distinguishing feature is a block of groups of circuits for comparing with a constant, a block of groups of OR elements, a block of multipliers by a constant, a trigger, and the ones formed between them and existing communication blocks.

 The proposed device uses the following in its work. It is known that the presence of an excess base in the information presented in the RNS allows the detection of errors. Moreover, with a certain amount of excess (control) base, it becomes possible not only to detect, but also to localize and correct the error.

, а полный диапазон P_п=

. Величину Р_и = P_п - P_p назовем избыточным диапазоном. Появление ошибки по одному какому-либо основанию переводит число из рабочего диапазона в избыточный при условии
ρ₁ < ρ₂ < ... < ρ_n < ρ_{n + 1} . (1)
Распределение ошибок в избыточном диапазоне осуществляется вполне определенно и зависит от величины ρ_{n + 1} . При этом если ρ_{n + 1} > ρ_n ˙ ρ_{n + 1} , то существует возможность по величине неправильного числа А, равного

= (A+Δα_iβ_i) mod P_п (2) однозначно определить ошибочное основание и значение ошибки.In the modular code, the number is represented by the set of non-negative residues α ₁ , α ₂ , α ₃ , ..., α _n , α _{n + 1} for the group of coprime bases ρ ₁ , ρ ₂ , ρ ₃ ,. ..., ρ _n , ρ _{n + 1.} Moreover, the working range of numbers P _p =

, and the full range P _p =

. The value of P _and = P _p - P _{p will} be called the excess range. The occurrence of an error for one reason translates the number from the operating range to excessive, provided
ρ ₁ <ρ ₂ <... <ρ _n <ρ _{n + 1} . (1)
The distribution of errors in the redundant range is quite definite and depends on the value of ρ _{n + 1} . Moreover, if ρ _{n + 1} > ρ _n ˙ ρ _{n + 1} , then there is the possibility of the value of the wrong number A equal to

= (A + Δα _i β _i ) mod P _p (2) to uniquely determine the erroneous basis and value of the error.

-Δα_iβ_i) mod P_п
Границы интервалов распределения ошибок можно определить из выражения (2), если в качестве А использовать числа 0 и Р_р - 1, а Δ α изменять от 1 до ρ_{i - 1}.Knowing Δ α _i , we can correct the wrong number
A = (

-Δα _i β _i ) mod P _p
The boundaries of the error distribution intervals can be determined from expression (2), if the numbers 0 and P _p - 1 are used as A, and Δ α is changed from 1 to ρ _{i - 1} .

PRI me R. Let ρ ₁ = 2, ρ ₂ = 3, ρ ₃ = 5 - working grounds. P _{n + 1 is} chosen from the condition ρ _{n + 1} > ρ _n ˙ ρ _{n +1} , i.e. φ _{n +1} = 17, when P _p = 30, P _p = 510.

=[255-284] основание ρ₂ = 3,Δα₂=1 __→

=[340-369]
Δα₂=2 __→

=[170-199] основания ρ₃ = 5,Δα₃=1 __→

=[306-335]
Δα₃=2 __→

=[102-131]
Δα₃=3 __→

=[408-437]
Δα₃=4 __→

=[204-233].The boundaries of the error distribution intervals in the redundant range are determined: base ρ ₁ = 1, Δα ₁ = 1 __ →

= [255-284] base ρ ₂ = 3, Δα ₂ = 1 __ →

= [340-369]
Δα ₂ = 2 __ →

= [170-199] base ρ ₃ = 5, Δα ₃ = 1 __ →

= [306-335]
Δα ₃ = 2 __ →

= [102-131]
Δα ₃ = 3 __ →

= [408-437]
Δα ₃ = 4 __ →

= [204-233].

 Errors on the control base cover the entire redundant range.

= 128 = (0, 2, 3, 9). По принадлежности интервалу Δ

определяют ошибочное основание и величину ошибки Δ α₃ = 2. Производят исправление числа

= 128:
A = (128 - 2,306) mod 510 = 26 = (0, 2, 1, 9).Suppose that as a result of calculations at the output of the RNS to MSS converter, the wrong number is obtained

= 128 = (0, 2, 3, 9). By belonging to the interval Δ

determine the erroneous basis and the magnitude of the error Δ α ₃ = 2. Correct the number

= 128:
A = (128 - 2,306) mod 510 = 26 = (0, 2, 1, 9).

 The drawing shows a functional diagram of the proposed device.

 A device for monitoring and correcting errors in redundant modulator code contains an input code converter 1, a block of 2 groups of comparison elements with a constant, a block of 3 groups of OR elements, a block of 4 multipliers, a block of 5 OR elements, a subtractor 6, an output code converter 7, the first information inputs 8 devices, the first information outputs 9, the second information outputs 10 of the device, the second block of 11 AND elements, the block 12 for comparing with the operating range, the trigger 13, the first block 14 of the AND elements, the input 15 of the installation, the second information inputs 16 troystva.

 The input code converter 1 converts the remainder of the code into a positional code, such as binary. It can be made both in the form of a combinational device that does not require synchronization, and in the form of a multi-cycle device (the necessary synchronization circuits are not shown in the drawing, but their presence for this case is assumed).

(ρ_i-1) комбинационных схем (для примера, приведенного в описании, К = 7), осуществляющих сравнение чисел с выхода преобразователя 1 кода с интервалами распределения ошибок. Каждой схеме сравнения соответствует только один интервал, вполне определенный Δ α_i . Причем при попадании в интервал какой-либо схемы сравнения на ее выходе формируется соответствующее значение Δ α_i , в противном случае на выходе ноль.Block 2 groups of comparison schemes with a constant consists of K =

(ρ _i -1) combinational circuits (for example, given in the description, K = 7) that compare numbers from the output of converter 1 of the code with error distribution intervals. Each comparison scheme corresponds to only one interval, a well-defined Δ α _i . Moreover, if any comparison circuit falls into the interval, the corresponding value Δ α _i is formed at its output, otherwise, the output will be zero.

Block 3 groups of OR elements consists of n groups of log ₂ ] ρ _i - 1 [(ρ _i - 1) -input elements OR when representing Δ α _i values in binary code or (ρ _i - 1) (ρ _i -1) - input elements OR when represented in unitary code.

Block 4 of multipliers by a constant consists of n multipliers modulo P _n , multiplying the value Δ α _i by the corresponding orthogonal basis β _i , which can be performed in a tabular (which is most preferred) or in a summary version.

Block 5 of the OR elements consists of log 2] P _p [n-input OR elements when representing values in binary code or from P _p n-input OR elements when representing in unitary code.

 Subtractor 6 performs the operation of subtraction modulo and can be either tabular or summary type. The output code converter 7 is used to convert the positional code into a corrected modular code. This converter, as well as the input converter 1, can be made in combinational or register form. The second block 11 of the And element is a group of elements that perform the function of the key device, and contains as many And elements as there are bits in the output bus of the subtractor 6.

Block 12 comparison with the operating range is a combinational device, the output of which is equal to logical "1" only when the input number falls into the interval [0, P _p ], otherwise the output is zero.

 Trigger 13 is a well-known functional element that has setup and counting outputs, and when a signal is applied to the setup input, the trigger switches to a single state, when switching from single to zero at the counting input, the trigger switches to the opposite state.

 The first block of AND elements 14 is a group of AND elements, the number of which is determined by the width of the information input of the redundant module.

 The device operates as follows.

A pulse is applied to the input 15 of the device installation, which sets the trigger 13 to a single state, which allows information to pass through the first block of 14 elements I. The number in the modular code α ₁ ¹ , α ₂ ¹ , is fed to the information inputs 8, 16 of the input converter 1. .., α _n ¹ , α ¹ _{n + 1} after the time determined by transients in the converter 1. At its output, the value of the number A is set in the position code, which is sent to the block 2 groups of elements of comparison with a constant. Here are possible options: either the number is correct, i.e. And ¹ <<P _p , or wrong, i.e. And ¹ > R _p . If the number is correct and does not fall into any error distribution interval, then at the outputs of the comparison elements the value "0" is set, which passes through the block of 3 groups of OR elements to the inputs of the block of 4 multipliers, at the outputs of which the values are also equal to "0". These values come through a group of 5 elements OR to the input of the subtracted subtractor 6, at the input of which is reduced the number A ¹ is present. The number A ¹ goes to the comparison unit 12 with the operating range and to the first inputs of the second block of 11 elements I. Since the number A ^{1 is} correct and lies inside the working interval, the unit level is set at the output of the comparison unit 12 with the working range, which allows the passage of the number And ¹ to the information outputs 9 of the device and the input of the output converter 7 of the code, the outputs of which set the correct number And ¹ in the code RNS.

If the number A ^{1 is} erroneous (A ¹ > P _p ), there can be two options: the number A ^{1 is} erroneous for any working reason; The error occurred in an excess basis. Consider the first option. From the output of the input converter 1 of the code, the number goes to the inputs of a block of 2 groups of comparison schemes with a constant. Since the error occurred on one of the working grounds, the number A ¹ falls into the interval of the corresponding comparison element, the output of which sets the value of the error Δ α _i . It, through a block of 3 groups of OR elements, is supplied to the multiplier 4.i by a constant, from the output of which the value Δ α _i β _{i is} fed to the input of the subtracted subtractor 6, at the input of which is reduced the wrong number A ¹ is present. From the output of the subtractor 6, the corrected number goes to the comparison unit 12 with the operating range and to the first inputs of the second block of 11 elements I. The logic level “1” is set at the output of the comparison unit 12, since the number A falls into the working range, which allows the number to pass through a second block of 11 And elements to the first information outputs 9 of the device and the inputs of the output code converter 7.

If the error occurred on an excessive basis ρ _{n + 1} , then the number A1, even if it falls into the interval of some comparison scheme with a constant, is still incorrect at the output of the subtractor 6. It is larger than the operating range P _r , therefore, at the output of the comparison unit 12, the level “0” is set, which prohibits information from passing through the second block 11 of elements I. The transition from a high level to a low one at the counting input of trigger 13 sets the trigger to zero and prohibits the passage of incorrect information on the information input 16 of the redundant module. Since only one reason is erroneous, it is considered that there are no errors on the working grounds, therefore, the correct number A is formed at the output of the input code converter 1, which passes to the information outputs 9 and 10 of the device without correction.

в цепную дробь [a_o, a₁...], соответствующим числу тактов, и максимально может быть равно σ_m=log2

. Даже в случае, если имеют одно контрольное основание ρ_{n + 1} > ρ_n ˙ ρ_{n - 1} , число тактов не меньше четырех. С увеличением величин как рабочих, так и контрольных оснований число тактов возрастает.The advantages of the proposed device compared to the base object. In a base object, performance is determined by the number of decomposition members

into a continued fraction [a _o , a ₁ ...] corresponding to the number of ticks, and can be maximally equal to σ _m = log2

. Even if they have one control base ρ _{n + 1} > ρ _n ˙ ρ _{n - 1} , the number of measures is not less than four. With increasing values of both working and control grounds, the number of ticks increases.

 In the proposed device due to the parallelization of operations comparing the wrong number with the intervals of the distribution of errors, maximum speed is achieved.

Claims (1)

 DEVICE FOR MONITORING AND CORRECTING ERRORS IN REDUNDANT MODULATOR CODE, containing an input code converter, the first inputs of which are the first information inputs of the device, and the output is connected to the first inputs of the subtractor, the output code converter, the outputs of which are the first information outputs of the device, characterized in that, in order to improve the performance of the device, a block of groups of comparison elements, a block of groups of elements OR, a block of multipliers, a block of comparison, a trigger, a block of elements are introduced into it OR and blocks of elements AND, the first inputs of the first block of elements AND are the second information inputs of the device, the outputs are connected to the second inputs of the input code converter, the inputs of the comparison elements of all groups of the block are combined and connected to the output of the input code converter, the outputs of the comparison elements of each group of the block are connected to the corresponding inputs of the corresponding groups of elements OR block, the outputs of which are connected to the inputs of the corresponding multipliers of the block, the outputs of which are connected to the corresponding input OR block of elements, the outputs of which are connected to the second inputs of the calculator, the outputs of the subtractor are connected to the first inputs of the second block of elements AND and the comparison block, the output of which is connected to the second input of the second block of elements AND and the counting input of the trigger, the installation input of which is the input to the installation of the device, the trigger output is connected to the second input of the first block of AND elements, the outputs of the second block of AND elements are connected to the input of the output code converter and are the second information outputs of the device.