RU2003162C1 - Reference-model control system - Google Patents

Abstract

The invention relates to self-adjusting control systems, the quality of transients in which is specified by the differential equation of the reference model. The achievement of the indicated technical effect is achieved by using only one multiplier in each adaptation circuit, which allows to exclude the mutual interference of adaptation channels 1 or

Description

The invention relates to self-adjusting control systems, the quality of transients in which is defined by the differential equation of the reference

models.

Consider a non-stationary system

board

x (n) Ј a, (t) + k (t) (l) kyk (t) u,

I 0

(1)

where x (t), u (t) are the output and input signals of the system;

a ((t), k (t) are non-stationary parameters of the control object;

ki (t), ci (t) are the variable parameters of the regular Jurassic, which are sought on the basis of the second method of A Punov.

Taking into account the equation of the system and the model reference, the expression for the derivative of the Punov function is written in (1)

n +1 -VPLM + 2 2Ayiy, 2 (PniXi + Pn2X2 + ..

I 1

. -I- Pn / iXnXyn + iu -ynu () - ..

n +1

-yiu) + 2 Zkyiy, i 1

(2)

To ensure system stability

n +1 2uTPui + 2 2Aiyiyj 0

i 1

(3)

To this end, we take y) {t), a yh + i (t) yi (t), j 1, n and write (3) in the equivalent form

) uTPui + 2 (u + 1) x (t) Xt) +

+ yi (t) yi (t) 0, (Lo-H) (Я (4)

Inequality (4) will be satisfied if

ky (t) (t) 5 (t) + / o (t) d (t) dtj.

to

{

c (t) ((t) + / (t) dt,

to

where the values o (t), 5 (t) and di (t) have the form 0 (t) pnlЈ + Pu2e (1) + ... + PnnЈ (),

f) x + x (1) + ... + x (n-1) c5i (t) u + u (1) +.,. + u (n 1)

The drawing shows a functional diagram of the system.

The following designations are adopted: control object 1, reference model 2 of the control object, adders 3-7, comparison blocks 8 and 9, amplifiers 10 and 11, integrators 12 and 13, first 14 and second 15 multiplication blocks, amplifier blocks 16-18, third 19 and fourth 20 multiplication blocks, adders 21 and 22.

The system operates as follows.

The input signal u (t) is amplified componentwise in the amplifier unit 18. The amplified components (control signal and derivatives of order-1 order) are fed to

the adder 3 input. The signal from the adder 3 output is fed to the inputs of the reference model 2 and one of the inputs of the multiplier unit 14, the second input of which receives the tuning signal from the output of the adder 4. From the output

of the multiplier unit 14, the signal is fed to the summing input of the comparison unit 8, from the output of which a control signal ui (t) is supplied to the control object 1. In block 9 comparison vector

the signals from the outputs of the reference model 2 and the control object 1, respectively x (t) and xM (t) are compared, scaled in the amplifier block 16 and the received signals are summed in the adder 7, the signal about {) s

the output of which goes to the inputs to

2AoUTPu1 0 UTPuT +

+ (n + 1) y (t) y (t) 0

(5)

In view of the fact that the inequality and equality in (5) must be simultaneously fulfilled simultaneously, the algorithms for changing the parameters have the form

the construction of blocks 20 and 19 of the multipliers, the second inputs of which receive signals di (t) and (5 {t), respectively. The signal 5i (t) is obtained after summing the components of the control vector u (t) in the adder 22. The signal from the output of the multiplier unit 19 after the proportional-integral conversion in the amplifier 10 and the integrator 12 is summed with the initial setting signal W0 in the adder 4 and arrives at the input of a block of 14 multipliers. A signal from the output of the multiplier unit 15 is fed to the subtracting input of the comparison unit 8. The signal from the output of the control object 1 through the amplifier block 17 is fed to the input of the adder 6, and then to the input of the multiplier block 15. In addition, the components from the output of the control object 1 are summed in the adder 21, the received signal (5 {t) is fed to the input of the multiplier unit 20, which is multiplied with the signal o (t), converted in the amplifier 11 and the integrator 13, and summed with the signal К0 in adder 5, the output of which receives a signal

Claims (1)

The claims CONTROL SYSTEM WITH A REFERENCE MODEL, comprising a first multiplication unit connected by a first input to the input of the reference model, and an output to the first input of the first comparison unit, the second input of which is connected to the output of the second multiplication unit, and the output through the control object is connected to the output of the system, the input of the first amplifier unit and the first group of inputs of the second comparison unit, connected by the second group of inputs to the outputs of the reference model, the output of the first adder is connected to the first inputs of the third and fourth multiplication units connected by the outputs to the inputs of the first and second integrators, respectively, characterized in that two amplifiers are introduced into it, the second and third blocks of amplifiers and from the second to the seventh adders, the information inputs of the system are connected to the inputs of the sixth adder and through the second amplification unit - it enters to the second input of the block of 15 multipliers. Thus, when the parameters of the control object 1 of the component matrices A (t) and B (t) are continuously changed, the parameters of the multiplier blocks 14 and 15 change so that x (t) - xM (t). The use of only one multiplication block in each adaptation loop allows us to simplify the system and increase its speed, since interference between adaptation channels is excluded. (56) Gromyko V.D., Sankovsky E, A. Self-tuning systems with a model. M .: Energy, 1974, p. 16. Fig. 2. of the amplifiers are connected to the inputs of the second adder, connected by the output to the output of the first multiplier unit, connected by the second input to the output of the third adder, the outputs of the first amplifier unit are connected to the inputs of the fifth adder, connected by the output to the first input of the second multiplication unit, the second input of which is connected to the output of the fourth adder, the outputs of the second comparison unit through the third amplifier block are connected to the inputs of the first adder, the outputs of the sixth and seventh adders are connected to the second inputs, respectively of the fourth and fourth multiplication units, the outputs of which, through the first and second amplifiers, respectively, are connected to the first inputs of the third and fourth adders connected by the second inputs to the outputs of the first and second integrators, the system outputs are connected to the inputs of the seventh adder. MJ