RU1798917C - Circuit for switch of current - Google Patents

Abstract

The invention relates to a pulse technique, in particular to current switching logic circuits, and can be used in ultrafast integrated circuits for constructing the combinational part of logic circuits. The scheme allows one to realize the function F (xi, X2, x3) X1X2x3 + xsh. SUMMARY OF THE INVENTION: A device comprises seven transistors, one resistor, two current sources, two reference voltage sources, three inputs, one output, five additional transistors, and one additional current source. 1 ill., 1 tab.

Description

The invention relates to pulsed technology, in particular to current switching logic circuits, and can be used in ultrafast integrated circuits to construct a combination part of a logic circuit.

An object of the invention is to enhance the functionality of a circuit.

The invention is illustrated in the drawing, which shows the proposed electrical circuit that implements the function.

Current switching circuit implementing a function

F (X1. X2, X3) X1X2X3 + X1X2

(Fig. 1), it contains seven transistors 1-7, a resistor 8, two current sources 9, 10, two reference voltage sources 11, 12, two inputs 13, 14 and output 15, the first and second transistors 1, 2 made with combined emitters that are connected to the first current source 9, the collector

the first transistor 1 is connected to the emitters of the third 3 and fourth 4 transistors, the collector of the second is 2 emitters of the fifth 5th and sixth of 6 transistors, and the base is the first source of the reference voltage 11, the bases of the fourth 4 and fifth of 5 transistors are combined and connected to the second a reference voltage source 12, the base of the first transistor 1 is connected to a seventh-emitter. 7 and with a second current source 10, the base of the seventh transistor 7 is connected to the first input 13 of the circuit, the bases of the third 3 and sixth. 6 transistors are combined and connected to the second input 14 of the circuit, the collectors of the fourth 4 and sixth 6 transistors are combined and connected to the first end resistor 8 and to the output 15 of the circuit, the collectors of the third 3 and fifth of 5 transistors are combined and connected to the collector of the seventh transistor 7 and the second end of the resistor 8.

Xi

U 00 O

Xi

According to the invention, five transistors 16-20, a current source 21, a third input of the circuit 22 are additionally introduced into the circuit, the emitters of the first 16 and second 17 additional transistors combined and connected to the first additional current source 21, the collector of the first additional transistor 16 connected to the combined emitters the third 18 and fourth 19 additional transistors, the base of the first additional transistor 16 is connected to the emitter of the seventh 7 transistor, the base of the second additional transistor 17 is connected to the first source the reference voltage 11, the base of the third additional transistor 18 - with the base of the fifth 20 additional transistor and with the third input of the circuit 22, and the collector - with the collector of the sixth 6 transistor, the base of the fourth 19 additional transistor connected to the second source of the reference voltage 12, and the collector - with the collectors of the second 17 and fifth of the additional 20, and the third 3 transistors, the emitter of the fifth additional transistor 20 is connected to the emitter of the third 3 transistor. . .. ..:. ; ; The proposed scheme operates as follows. ;

The inputs of the circuit 13, 14, 22 are provided with signals corresponding to a logic zero or one level. The table shows the current paths of the first current source 9 (I) and the additional current source 21 (12) for various combinations of input signals (total combinations 23 8), as well as the value at the output of the circuit (in the case when one of the currents flows through resistor 8, at the output 15 a logical zero level is formed, otherwise a logical unit level).

As follows from the table, the circuit really implements the function, and at the same time no more than one current flows through the resistor 8 (either AND, or (2), i.e., the logic zero level remains constant.

Thus, the proposed scheme, in comparison with the known scheme, makes it possible to realize a function of three variables, i.e. To expand the functionality, the delay remains almost different to the delay of the circuit that implements the function of two variables.

Formulas of the invention

1

A current switching circuit comprising seven transistors, a resistor, two current sources, two reference voltage sources, two inputs and an output, the first and second transistors being made with integrated emitters that are connected to the first current source, the collector of the first transistor is connected to emitters of the third and fourth transistors, the collector of the second with emitters of the fifth and sixth transistors, and the base with the first source of the reference voltage,

the bases of the fourth and fifth transistors are connected to the second source of the reference voltage, the base of the first transistor is connected to the emitter of the seventh and second current source, the base of the seventh transistor is connected to the first input of the circuit, the bases of the third and sixth transistors are connected to the second input of the circuit, collectors of the fourth and the sixth transistors are connected to the first output of the resistor and

to the output of the circuit, the collectors of the third and fifth transistors are connected to the collector of the seventh transistor and the second output of the resistor, with the exception of the fact that, in order to expand the functionality, five transistors are added to the circuit, a current source , the third input of the circuit, and the emitters of the first and second additional transistors are connected to an additional current source,

the collector of the first additional transistor is connected by emitters of the third and fourth additional transistors, the base of the first additional transistor is connected to the emitter of the seventh transistor. the base of the second additional transistor - with the first Reference voltage source, the base of the third additional transistor - with the base of the fifth additional transistor and with the third input

circuit, and the collector with the collector of the sixth transistor, the base of the fourth additional transistor is connected to the second voltage reference source, and the collector is with the collectors of the second and fifth additional and third transistors, the emitter of the fifth additional transistor is connected to the emitter of the third transistor.

Ways of flowing currents of sources And and (2

Note. The current flowing along the collector-emitter path of transistors with the number i is indicated as Tj, and the current flowing through the resistor 8 is indicated as R.

The notation - (Ti + TJ) - means that the current flows in parallel through both transistors (after which it folds again).