RU1795539C - Device for measuring pulse sequences - Google Patents

Abstract

The invention relates to pulse technology and can be used in automation and computer technology to control pulse sequences. The device comprises a multi-channel switch 1, input buses 2, a controlled key 3, a counter 4, a decoder 5. an OR element 6, an And 7 element, a trigger 8. 1 ill.

Description

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The invention relates to the field of electrical engineering, more particularly to pulse technology, and can be used in automation and computer technology to control pulse sequences.

A pulse signal control device is known, comprising a pulse generator, two pulse counters, a multi-channel switch, a comparison unit, a match element, a failure control unit. This device serves to control the sequence of operations in multichannel technological systems.

A disadvantage of the device is the need to synchronize the internal oscillator with the input signals, which reduces the reliability of the device.

The closest in technical essence and the achieved result is a device for controlling the sequence of alternating pulse signals, comprising an AND element, a pulse counter, a multi-channel switch, input buses, an inverter, an OR element, an output bus. This device allows controlling the sequence of alternating asynchronous signals and generates one fault signal, both in the case of a violation of the order of asynchronous signals arriving at the input buses, or when several signals are received instead of one, and also if there is a constant signal on the input buses.

A disadvantage of the device is the inability to identify the input bus number in which the failure occurred.

An object of the invention is to expand the functionality of a device.

This goal is achieved by the fact that in the known device for controlling the sequence of alternating pulse signals containing a multi-channel switch, a pulse counter, the elements AND and OR according to the invention, a controlled key, a trigger and a decoder are introduced, the input of the controlled key being connected to the output of the switch and the control the input is connected to the output of the trigger, the input of which is connected to the output of the element And, and the output of the controlled key is connected to the second input of the element And to the input of the counter, the outputs of which are connected to decoder moves.

Comparative analysis with the prototype showed that the claimed device is distinguished by the presence of a controlled key,

a trigger and a decoder, as well as their links to other elements of the circuit.

Comparison of the claimed solution with other technical solutions of this and

related fields of technology shows that the introduction of these elements with the formation of new functional relationships provides the claimed device with enhanced functionality by fixing the moment of failure of the input pulse sequences, as well as identifying the channel number in which the failure occurred.

So: introduction to the scheme of controlled

5 keys in the indicated connection allows disconnecting pulses from the output of the switch to the counter input at the moment of disruption of the sequence of alternating pulses at the input of the device,

0 - the introduction of a trigger in this connection allows you to record the moment of this violation and stop further operation of the circuit.

- the introduction of the decoder in the specified

5 communication allows to indicate the number of the input bus, i.e. the number of the channel in which the interlace failed.

In addition, the counter, in comparison with the prototype, also has the functions of counting the number of the channel in which the failure occurred, i.e. this element performs an additional function, and in combination with the above elements and their connections, gives the device a new property.

5 The drawing shows a diagram of a device for monitoring pulse sequences.

The device contains a multi-channel switch 1, input buses 2-1, 2-p0 adjustable key 3, counter 4, decoder 5, element OR 6 element And 7-, trigger 8. The first group of inputs of multi-channel switch 1 is connected to input buses 2-1 , 2-p and with the inputs of the element OR 6, and the second

5, the control group of inputs of the switch 1 is connected to the outputs of the counter 4, the output of the switch 1 is connected to the input of the controlled key 3, the output of which is connected to the input of the counter 4 and to the first input of the element AND 7. The second input of the element And 7 is connected to the output of the element OR b, and the output of the And 7 element is connected to the input of the trigger 8, the output of which is connected to the control input of the key 3. The outputs of the counter 4 are connected5 prices with the inputs of the decoder 5.

The device works as follows.

Before starting work, the pulse counter 4 is set to zero by any known method (reset circuit

not shown). Flip-flop 8 is set in a state in which the output opens the controlled key 3 (the trigger transfer circuit is also not shown). The outputs of the pulse counter 4, connected to the control group of inputs of the multichannel switch 1, specify the number of the interrogated input bus. When the pulse counter 4 is set to zero, the signal from the first input bus received at the first input of the multi-channel switch 1 passes to its output and through the open controlled key 3 is fed to the input of the pulse counter 4. At the same time, the signal - the input bus goes to one of the inputs of the OR 6 element, passes to its output and goes to the second input of the And 7 element, while the signal from the output of the controlled key 3 comes to the first input of the And 7 element. A signal is generated at the output of the And 7 element stateless trigger 8, and therefore key 3.

At the end of the input signal, the pulse counter 4 changes its state to the next one, and thereby the next one, i.e. second, input bus. In this case, at the outputs of the pulse counter 4 connected to the corresponding inputs of the decoder 5, a signal is generated in binary code characterizing the number of the previous input bus. If the input signals are correctly alternated, the process repeats.

In case of violation of the sequence of signal alternation, for example, when a signal arrives at the input bus 2-3 instead of the input bus 2-2 to the output of the multi-channel switch 1, the signal does not pass, because The code generated at the outputs of the pulse counter 4, connected to the control inputs of the multi-channel switch 1, connects the input bus 2-2 to the output of the switch. The absence of a signal at the output of the multi-channel switch 1 leads to the fact that the pulse counter 4 does not change its state for subsequent and further passage of signals through the device becomes impossible. In this case, the input of the decoder receives

Claims (1)

The claims A pulse sequence control device comprising a multichannel switch, a pulse counter, AND, OR elements, a decoder, the first group of inputs of a multichannel communication in binary code, characterizing the number of the input bus in which the failure occurred, and the decoder output buses indicate the number of this channel. When two pulses arrive at any of the inputs, instead of one, the signal received a second time on the same input bus does not pass to the output of multi-channel switch 1, since this input is already disabled by the code signal at the outputs of pulse counter 4, however, it passes through OR 6 to the second input of the And 7 element. At the output of the And 7 element, a signal is generated that goes to the input of the trigger 8 and changes its state. The signal from the output of trigger 8 enters the controlled key 3 and closes it, after which further passage of signals through the device becomes impossible. In this case, a signal in binary code comes from the counter outputs to the decoder input, which characterizes the number of the input bus to which the pulse arrived a second time. If there is a constant signal on the monitored input bus, the pulse counter 4 does not change its state, since it is triggered by the trailing edge of the input signal, and therefore does not connect the next input bus to the output of multichannel switch 1. Thus, the presence of a constant signal on the monitored input bus is perceived by the device as the absence of a pulse, and a failure signal is generated similarly. The device does not associate the signal arrival time with any clock frequency: i.e. It is efficient when monitoring asynchronous signals. Thus, the proposed device monitors the correctness of the pulse sequences and indicates the number of the channel in which the failure occurred both in the event of a violation of the sequence of alternating asynchronous signals, and when several signals are received on one of the channels instead of one (interrupted signal or interference), as well as in the presence of on the input buses of a constant signal. the tator is connected to the input buses and to the inputs of the OR element, and the second control group of inputs is connected to the outputs of the counter and the inputs of the decoder, the output of the OR element is connected to the first input of the AND element, characterized in that, in order to expand the functional possibilities 7 1795539; 8 opportunities due to fixing the moment with the output of the switch, controlling failure of the pulse input serial-input - with the trigger output, and the output - with the inputs and the identification of the channel number, in which the pulse counter and the second input there was a failure, the trigger of element And, the output of which is connected to control key, the input of which is connected to the counting input of the trigger.