RU1781623C - Device for measurement of electric values changing in time - Google Patents

Description

tel 1 and analog input of the ADC 8, the information output of the ADC 8 is connected to the information input of the first memory 9, the input of the chip of which is connected to the output of the ADC 8, the address output of the counter of address 13 is connected to the address input of the first 9 and second 10 of the memory.

The information output of the first memory 9 is connected to the input of the approximation block 11, the output of which is connected to the information input of the second memory 10, the information output of the second memory 10 is connected to the information input of the DAC 12, the output of which is connected to the input of the attenuator 5, the output of the pulse generator 16 is connected to the start of the ADC 8, the counting input of the address counter 13 and the input Select the chip of the second memory 10, the second input of the first trigger 14 is connected to the first input of the second trigger 15 and the output Overflow of the address counter 13, the first output of the first trigger 14 nen with an input Write-read of the first memory 9 and the second input of the second trigger 15, Write-read of the second memory 10 is connected to the first output of the second trigger 15, the second output of which is connected to the second output of the first trigger 14 and the input Pulse generator 16,

In FIG. 2 shows the times of switching on and off of individual units of the device, as well as the shape of the electrical signals at their inputs and outputs, Here, to is the trigger start time of trigger 14 and the measured voltage source 6, tt and t2, the moment of the start and end of the measured voltage , tz - the moment of switching the memory 9 from the Record mode to the Reading mode, and the memory 10 - from the Reading mode to the Recording mode, t4 the moment of the end of writing the approximated signal in the memory 10, ts - the moment of the end of the first measurement cycle, 17 - the measured signal the output of the amplifier 1; 18,19,20 and 21 - signals at the outputs 0m and 1 of triggers 14 and 15, 22 - signals at the output of the generator 16, 23 - signals at the output Ready ADC 8, 24 - digital code at the output of ADC 8, 25 - digital code at the output of the approximation block 11; 26, 28 - the main reference signal at the input and output of the low-pass filter; 7.27, 29 - the difference in the measured voltage of the additional reference signal at the input and output of the low-pass filter; 7.30 - the measurement result.

The device operates in two cycles.

In the first cycle, an additional reference value is generated, and in the second, the difference between the measured voltage and the additional reference value is recorded. First cycle. On command from the start block 3, the trigger 14 changes its state, the signal 18 turns on the generator 16 and the pulse train 22 from its output goes to blocks 8, 10 and 13. The pulses received at the start of the ADC 8 enter it into working condition - it starts periodically with a generator frequency to generate a digital code 24, proportional to the instantaneous value of the measured signal 17. This code from the measuring output of the ADC 8 is fed to the information input of the memory 9, at the same time from the output Ready ADC 8 to the input The choice of the crystal of the memory 9 is received electric 23 s pulses shifted in time relative to pulse 22.

5 In addition, from the output 1 of the trigger 14 to the input Read / write memory 9 receives a high signal level 19, and the address input receives the address code from the output of address counter 13. As a result, the memory 9, starting from the moment of time to, works in the mode recording the digital code 24 generated by the ADC 8. The writing of the codes continues until the time ts when the overflow of the counter of block 13 goes to the input 0 of trigger 14 from the output

5 is an electrical signal that changes its state. A low signal level 19 transfers the memory 9 from the Write mode to the Read mode and the information from the output of the memory 9 starts to flow into the approximation block 11,

0 from where, as it is processed, it will be recorded in the memory 10. The signal 25 at the output of the approximation block has the form of a piecewise linear or smooth curve, not amplified by the intrinsic noise of amplifier 1. This

5, the signal is used in the second measurement cycle as an additional reference value. The memory 10 in the time interval to-ta under the action of the signal 20 operates in the Read mode, so that information from it

The 0 output goes to the DAC 13, and then through the attenuator 5 with the attenuation coefficient equal to the gain of the summing amplifier - to the first input of the latter. But, since the beginning of the first cycle in

5 of the memory 10, nothing was recorded, then the analog signal supplied to the input of amplifier 1 turns out to be zero and does not affect the measured signal. At time ts from the output of Block 13 counter overflow

0, an electrical signal is supplied that changes the state of trigger 15. A high level of signal 21 puts the generator 16 into a locked state, as a result of which blocks 8, 10 and 13 are turned off. On this

5, the first measurement cycle ends. In this cycle, blocks 7, 4, and 2 may not be included.

In the second measurement cycle, the device operates similarly to the known one. Upon the command from the start block 3, the analog

recorder 2, then the source of the main reference signal 4, and upon completion of registration of the signal 26, 28 of this source, the trigger 14 and the measured voltage source 6 are turned on, as in the first cycle. From this moment, blocks 5, 7 - 12, 13- 16 also work, as in the first cycle, with the only difference being that from the output of the memory 10 to the input of the ADC 12 and then to the input of the amplifier 1 an additional reference quantity is generated, which is formed in the first cycle, which is subtracted from the measured signal. The resulting difference is amplified and fed through the low-pass filter 7 to the recorder 2, which can be digital or analog. In the first case, it may consist of an ADC and a storage device. Then, to obtain the measurement result, it suffices to sum the codes recorded in it and the memory 10. In the second case, an additional reference value can be taken from the output of the ADC 12. If the second measurement cycle is final, then the input of the ADC 8 should be blocked and amplified the difference of the signals 27 should not be recorded from the memory 9. If it is possible to conduct several repeated measurement cycles, then in them this difference can be registered in the memory 9 and used to correct the approximated signal recorded in the memory 10 in first cycle. As a result of this, the dynamic accuracy of measurements will increase even more, since it is the higher, the smaller the proportion of the recorded difference 29 in the total value of the measured signal 30

Claims (1)

SUMMARY OF THE INVENTION A device for measuring time-varying electrical quantities comprising a summing amplifier, an analog recorder, a trigger unit, a main reference signal source, an attenuator and a voltage source, characterized in that, in order to increase the dynamic accuracy of the measurement, it equipped with a low-pass filter, ADC, first and second storage devices (memory), approximation unit, DAC, address counter, first and second triggers and pulse generator, with the attenuator output connected to the first input of the summing amplifier, the second input of which is connected to the output of the measured voltage source, the third input of the summing amplifier is connected to the output of the main reference signal source, the control input of the main reference signal source is connected to the first output of the trigger unit, the second output of which is connected to the control input of the measured voltage source and the first input of the first trigger, the third output of the trigger unit is connected to the control input of the analog recorder, the analog input the recorder is connected to the output of the low-pass filter, the input of the low-pass filter is connected to the output of the summing amplifier and the analog input of the ADC, the information output of the ADC is connected to the information input of the first memory, the input of which chip is connected to the output of the Ready ADC, address; the output of the address counter is connected to the address input of the first and second memory, the information output of the first memory is connected to the input of the approximation block, the output of the approximation block is connected to the information input of the second memory, the information output of the second memory is connected to the information input of the ADC, the ADC output is connected to the input of the attenuator, the output of the pulse generator is connected to the input of the ADC start, the counting input of the address counter and the input selects the chip of the second memory, the second input of the first trigger is connected to the first input of the second trigger and the output the address counter, the first output of the first trigger is connected to the Write-read input, the first memory and the second input of the second trigger, the Write-read second memory is connected to the first output of the BTOJ trigger, the second output of which is connected to the second output of the first trigger and the input Start pulse generator. U and , g ./ fig 1