RU1499614C - Method for manufacturing field-effect transistors - Google Patents

Abstract

FIELD: semiconductor devices. SUBSTANCE: method involves ion doping of area under gate for preliminary shift of average threshold voltage level

. This value is shifted to U₁ which conforms to equation (U_o+1)≥ U₁>U_o for U in channel transistor and to equation U_o>U₁≥ (U_o+1) for p- channel field-effect transistor; U_o is required voltage. Later on standard processes for manufacturing field-effect transistors are performed. After generation of metal zone threshold voltages are adjusted by X-ray radiation. EFFECT: increased precision of adjustment of threshold voltage, increased good-to-bad ratio of produced field-effect transistors.

Description

 The invention relates to semiconductor technology and can be used for the manufacture of MOS transistors of integrated circuits.

 The aim of the invention is to improve the accuracy of fitting threshold voltages and increase the percentage of yield of MOS transistors.

The limitation of the preliminary shift of the average threshold voltage to 1 V is due to the fact that the spread of their values due to the impact on the process does not exceed this value. In addition, the final radiation fitting of the “shifted” threshold voltage to a predetermined U ₀ at a shift value above 1 V is difficult, since the required radiation doses to the plates increase non-linearly with an increase in the adjustment range and subsequently lead to saturation. That is, with very large doses, the possibilities of radiation fitting are exhausted. Specific examples of the method.

, стравливают в буферном травителе слой фосфорно-силикатного стекла ФСС и наносят слой нелегированного окисла толщиной 0,5 мкм. Методом фотолитографии вскрывают окна к диффузионным областям и поликремнию, наносят слой пиролитического фосфоросиликатного стекла толщиной 0,5 мкм. Методом фотолитографии вскрывают окна к диффузионным областям и поликремнию, наносят слой пиролитического фосфоросиликатного стекла толщиной 0,9 мкм, проводят термообработку при 970^ос (в течение 15 мин, вскрывают вторые окна к диффузионным областям и поликремнию, оплавляют их, освежают контактные окна в буферном травителе и наносят магнетронным напылителем слой алюминия с кремнием толщиной 1,2 мкм.PRI me R 1. On a silicon substrate KDB 12.5 Ohm · cm, orientation <100> grown primary oxide, a thickness of 60 nm, deposited silicon nitride with a thickness of 10 nm and a photolithography method perform drawing of the active areas. Carry out ion doping with boron of inactive regions with energy (E 75 keV and a dose (D) of 1.8 μC / cm ² , silicon nitride is poisoned in freon plasma from inactive regions and a field oxide of 1.0 μm thickness is grown on them. Then they are removed from the active areas of silicon nitride, carry out the primary oxidation of the primary oxide to a thickness of 70 nm and conduct ion doping of the gate regions with boron with E 75 keV and D 0.09 μC / cm ² to shift the threshold voltage to a value of U _1. In the etching buffer, the oxide is etched from the active regions and grown by thermal oxide leniem oxygen in medium supplemented with 1.5-4% of hydrogen chloride at a temperature of 1000 ^C. gate dielectric layer 80 nm thick. The method of photolithography opened contact windows for contacting the polysilicon to silicon and polysilicon, a layer 0.6 microns thick. Polysilicon is doped with phosphorus temperature (Т 900 ^о С to the surface resistance, R _s 15-20 Ohm / □). Using a photolithography method, a polysilicon wiring is formed, the polysilicon is poisoned in freon plasma, the windows are opened under the diffuser in the etchant, they are doped their phosphorus at 900 ^about R _s 30 Ohm /

etch off a layer of phosphor-silicate glass of the FSS in a buffer etchant and apply a layer of undoped oxide with a thickness of 0.5 μm. Using photolithography, windows are opened to the diffusion regions and polysilicon, a layer of pyrolytic phosphorosilicate glass 0.5 μm thick is applied. Window opened by photolithography to diffusion regions and polysilicon, a layer of phosphosilicate glass pyrolytic 0.9 micron thick, heat-treated at 970 ^{° C} (for 15 minutes, the second window is opened to diffusion regions and polysilicon, reflowed them, refreshes the contact holes in a buffer etchant and put a magnetron sputter layer of aluminum with silicon 1.2 microns thick.

-U₀), где U₀ требуемое значение.A metallized wiring pattern is formed by photolithography, the metal is etched in a plasma of carbon tetrachloride, a layer of a passivating dielectric is applied, consisting of a layer of phosphorosilicate glass with a phosphorus content of 2.5-4% and a thickness of 0.6 μm and a layer of undoped oxide with a thickness of 0.4 μm. Photolithography opened windows to contact pads metallized wiring structure and heat-treated at 475 ^C in the steam atmosphere for 30 min. The statistical distribution of the threshold voltages obtained by the devices on the plate is measured and the value (

-U ₀ ), where U _{0 is the} desired value.

In accordance with the value of the latter, the threshold voltage is adjusted to U ₀ by irradiating the plates with X-ray radiation with an energy of X-ray quanta in the range of 20-200 keV.

). Ионным легированием бора проводят легирование кремниевой подложки в активные области через подзатворный диэлектрик (Е 75 кэВ, D 0,07 мкКл/см², доза ионного легирования бором выбирается из следующей зависимости: при Е 60 кэВ доза 0,01 мкКл/см² сдвигает пороговое напряжение на 0,2В для р-канального транзистора), наносят слой поликристаллического кремния (Т 625^оС, толщина 0,6 мкм), легируют поликремний фосфором из жидкого источника PОСl₃ (Т 900^оС, R 10-15 Ом/□), методом фотолитографии формируют рисунок поликремниевой разводки, травят поликремний во фреоновой плазме и ионным легированием бора загоняют примесь в диффузионные области (Е 60 кэВ, доза 800 мкКл/см²). Наносят на структуру слой пиролитического нелегированного окисла (Т 450^оС, толщина 0,5 мкм). Проводят разгонку примеси в диффузионных областях в окислительной среде (Т 1000^оС 5 мин О₂ 25 мин водяной пар 5 мин О₂ 15 мин N₂), методом фотолитографии вскрывают контактные окна в слое окисла к диффузионным областям и поликремнию, наносят слой алюминия с 1% кремния толщиной 1, 2 мкм, методом фотолитографии формируют рисунок металлизированной разводки, травят алюминий в травителе, в состав которого входят фосфорная и уксусная кислоты, проводят термообработку структур при Т 475^оС в среде пара в течение 30 мин. Измеряют среднестатистическое распределение пороговых напряжений, которое должно быть в пределах 0,2-0,7 В, затем определяют величину ΔU

U

. U₀ должно быть в пределах 1,2-1,3 В. В соответcтвии со значением ΔU облучают партии равноценных пластин дозой рентгеновского излучения, подгоняя

на пластинах к значению U₀. В заключении проводят нанесение слоя фосфорно-силикатного стекла ФСС, разложением моносилана с добавкой фосфина при 450^оС в течение 30 мин.PRI me R 2. On a KEF silicon substrate of 7.5 Ohm-cm with orientation <100> Thermal oxidation grows a primary oxide with a thickness of 60 nm, deposit silicon nitride with a thickness of 100 nm and form active regions by photolithography. Inactive regions are doped with phosphorus E 100, D 0.03 μC / cm ² ), silicon nitride is etched off the inactive regions in freon plasma and 1.0 μm thick field oxide is grown. Then removed in hot phosphoric acid to the silicon nitride active regions, the buffer is removed from the etchant primary active areas and grown gate oxide at the oxide (T ¹⁰⁰⁰ ° C, the thickness 1200

) Ion doping of boron, the silicon substrate is doped into active regions through a gate insulator (E 75 keV, D 0.07 μC / cm ² , the dose of ion doping with boron is selected from the following dependence: at E 60 keV, a dose of 0.01 μC / cm ² shifts the threshold voltage at 0,2V for the p-channel transistor) is applied to the polysilicon layer (T 625 ^{° C,} thickness 0.6 mm), polysilicon doped with phosphorus from the liquid source POSl ₃ (T 900 ^{° C,} R 10-15 ohm / □ ), by the method of photolithography, a polysilicon wiring pattern is formed, polysilicon is etched into freons plasma and ion doping of boron drive the impurity into diffusion regions (E 60 keV, dose 800 μC / cm ² ). A layer of pyrolytic undoped oxide is applied to the structure (T 450 ^° C, thickness 0.5 μm). The impurities are dispersed in diffusion regions in an oxidizing medium (Т 1000 ^о С 5 min О ₂ 25 min water vapor 5 min О ₂ 15 min N ₂ ), the contact windows in the oxide layer are opened to the diffusion regions and polysilicon by photolithography, and an aluminum layer is applied with 1% silicon thickness of 1, 2 microns, photolithography patterned metallized wiring etched aluminum etchant, which consists of phosphoric acid and acetic acid, heat-treated structure at T 475 ^C in steam atmosphere for 30 min. Measure the average distribution of threshold voltages, which should be in the range of 0.2-0.7 V, then determine the value of ΔU

U

. U ₀ should be in the range of 1.2-1.3 V. In accordance with the ΔU value, batches of equivalent plates are irradiated with an X-ray dose, adjusting

on the plates to the value of U ₀ . In conclusion performed applying a layer of phosphorus-silicate glass FSS additive decomposition of monosilane and phosphine at 450 ^{° C} for 30 min.

 The invention allows to reduce by 3-3.5 times the spread in the average value of the threshold voltage and to increase the yield of suitable MOS transistors by 25-40%.

Claims (1)

METHOD FOR PRODUCING TIR TRANSISTORS by ed. St. N 1176777, characterized in that, in order to improve the accuracy of the preparation of threshold voltages and increase the percentage of yield of MOS transistors, prior to irradiating the structures with X-ray radiation, ion doping with an impurity in the gate region, a preliminary shift of the average value of the threshold voltage is carried out

to the value

MOS transistors, and U _{0 is the} specified threshold voltage.