RU1268073C - Programmable pulse selector - Google Patents

Description

 The invention relates to a pulse technique and is intended for use in measuring and radio telemetry systems when processing incoming information.

 The aim of the invention is to expand the functionality by enabling the selection of a given pulse from a series of pulses with the issuance of information about the deviation of its duration from predetermined limits by turning on the device with a signal from a pulse from a series of input pulses, the number of which is set by a code from the programming bus, and its subsequent comparison with the lower and upper limits of the deviation from the norm, the values of which are also set by the code from the programming bus.

 Figure 1 presents the functional diagram of the device; figure 2, 3 timing diagrams explaining his work.

 The programmable pulse selector in duration contains an input bus 1, element 2 OR NOT, element 3 AND NOT, inverter 4, a first pulse counter 5, a pulse generator 6, element 7 OR, a second pulse counter 8, a third pulse counter 9, a programming bus 10, the majority element 11, the first 12 and second 13 output buses.

 The input bus 1 is connected to the first input of the AND-NOT element 2, the output of which is connected to the first input of the AND-NOT element 3, the inverter 4 input and the counting input of the first pulse counter 5, the first output of which is connected to the control input of the pulse generator 6, the output of which is connected through the OR element 7 with the counting input of the second pulse counter 8 and directly with the counting input of the third pulse counter 9, and the corresponding information and control inputs of the pulse counters 5, 8 and 9 are connected to the programming bus. The output of the second pulse counter is connected to the second input of the OR element 7 and the first input of the majority element 11, the output of which is connected to the first output bus 12, the second input to the output of the inverter 4, and the third input to the output of the third pulse counter 9, the second output bus 13 and the second the input of element 2 OR NOT, the third input of which is connected to the second output of the first pulse counter 5.

 Programmable pulse selector in duration works as follows.

In the initial state, before the arrival of controlled pulses to the input bus 1, codes from the programming bus 10 are written into the first, second, and third pulse counters, which ensure the formation of a signal in the form of a logical "1" at the first and second outputs of the pulse counter 5 upon receipt of the specified Nth pulse and (N + 1) -th pulse, respectively, at the overflow outputs of counters 8 and 9, respectively, after a time t _min and t _max , which determine the lower and upper values of the limits by the value of the pulse duration. Logical "0" from the first output of the pulse counter 5 prohibits the operation of the pulse generator 6 (Fig.2.6 and 3.6). The potential "0" from the output of the pulse generator 6 blocks the transmission of input pulses 3 AND-NOT (Fig.2.3 and 3.3) to the inputs of the pulse counters 8 and 9. Signals of the logical "0" from the second output of the pulse counter 5 (Fig.2.5 and 3.5) and from the output of the pulse counter 9 (Fig. 2.9 and 3.9) allows the transmission of signals from the input bus 1 (Fig.2.1 and 3.1) in the form of a logical "0" through the element 2 OR-NOT (Fig.2.2 and 3.2). On the output buses 12 (Fig. 2.11 and 3.11) and 13 (Fig.2.9 and 3.9) form the output code "0,0" corresponding to the signal input pulse, the duration of which is less than the lower limit.

After applying a series of similar pulses to the selector, the pulse counter 5 from the specified N-th pulse by the logical "1" signal from the first output (Fig.2.5.1 and 3.5.1) includes a pulse generator 6, pulses from which through the OR element 7 (Fig. 2.7 and 3.7) go to the counting input of the pulse counter 8 and directly to the counting input of the pulse counter 9. From this moment, these pulse counters begin to form the specified limits: lower t _min K ₁ ˙ T ₀ and upper t _max K ₂ ˙ T ₀ , where K ₁ and K ₂ conversion factors to form an overflow signal, respectively, with etchikov pulses 8 and 9; T ₀ pulse period of the pulse generator 6.

 Depending on the duration of the input pulse, three cases of selector operation are possible.

1. If the duration of i _{and the} input specified N-th pulse is greater than the lower, but less than the upper limits, that is, t _min <t _and <<t _max Fig.3.1, the interval t ₁ -t ₄ , then the following occurs. At the output of the overflow of the pulse counter 8, after a time t _min , a logical "1" is formed (Fig.3.8), blocking its further operation (OR element 7 is closed). After the end of the signal under investigation (time t ₄ in Fig. 3.1), a logical "0" from the output of element 2 OR NOT (Fig. 3.2) is blocked by element 3 AND NOT and the receipt of pulses from the pulse generator 6 to the pulse counter 9 is stopped (Fig .3.3). On the output buses 12 and 13, the code is set to "1.0" (Fig.3.11 and 3.9), since at the two inputs of the majority element 11 there are two logical "1" from the outputs of the pulse counter 8 (Fig.3.8) and inverter 4 (Fig. .3.4), therefore, its output is logical "1", and at the output of the pulse counter 9, the state has not changed logical "0". The arrival of the next (N + 1) -th pulse generates a logical "1" signal at the second output of the pulse counter 5 (Fig.3.5.2), which prohibits the further passage of input pulses, and a logical "0" signal from the first output of the pulse counter 5 ( Fig. 3.5.1) turns off the pulse generator 6 (Fig. 3.6). At the outputs of the pulse selector, the code "1.0" is stored until a command is received from programming bus 10.

2. If the duration t _{and the} input specified N-th pulse is greater than the upper limit, ie t _and > t _max (figure 2.1, the interval t ₁ -t ₃ ), then the following occurs. At first, the device works similarly to the previous case. But then the pulse counter 9 manages to work (Fig.2.9), the logical "1" from the output of which closes the element 2 OR-NOT (Fig.2.2), and the code "1.1" is set on the output buses 12 and 13. The operation of the selector on this stops until the next command from the programming bus 10.

3. If the duration of t _{and the} input given pulse is less than the lower limit, that is, t _and <t _min (Fig. 3.1), the interval t ' ₁ -t'' ₁ , then the following occurs. The pulse counters 8 and 9 do not have time to work. At the end of the input pulse, the AND-NOT element 3 is closed by a logical "0" signal from the output of the OR-NOT element 2 (Fig.3.2), and the arrival of the (N + 1) -th input pulse turns off the pulse generator 6. On the output buses when the next command arrives from the programming bus 10, the initial state code "0.0" is stored.

 Thus, the programmable pulse selector in duration selects a predetermined pulse from a series of input pulses with the output of information in the form of a two-bit binary code on the correspondence of its duration to less than the lower limit, in the range between the lower and upper limits, more than the upper limit.

Claims (1)

 A PROGRAMMABLE PULSE SELECTOR FOR DURATION, comprising an input, programming and first output bus, pulse generator, AND-element, first, second and third pulse counters with a variable conversion factor, the counting input of the last of which is connected to the output of the AND-NOT element, and the corresponding the inputs of all pulse counters are connected to the programming bus, characterized in that, in order to expand the functionality by providing the ability to select a given pulse from a series of pulses with the issuance and Information about the deviation of its duration from the set limits, an OR element, an inverter, a majority element and an OR NOT element are introduced into it, the first input of which is connected to the input bus, and the output is with the inverter input, the first input of the AND element and the counting input of the first pulse counter, the first output of which is connected to the control input of the pulse generator, the output of which is connected to the second input of the AND element, the output of which is connected to the first input of the OR element, the output of which is connected to the counting input of the second pulse counter, the output which is connected to the second input of the OR element and to the first input of the majority element, the output of which is connected to the first output bus, the second input to the output of the inverter, and the third input to the output of the third pulse counter, the second output bus and the second input of the OR OR NOT, third input which is connected to the second output of the first pulse counter.

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