PH12020551325A1 - Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache - Google Patents

Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache

Info

Publication number
PH12020551325A1
PH12020551325A1 PH12020551325A PH12020551325A PH12020551325A1 PH 12020551325 A1 PH12020551325 A1 PH 12020551325A1 PH 12020551325 A PH12020551325 A PH 12020551325A PH 12020551325 A PH12020551325 A PH 12020551325A PH 12020551325 A1 PH12020551325 A1 PH 12020551325A1
Authority
PH
Philippines
Prior art keywords
data
layer cache
level cache
computing device
processing unit
Prior art date
Application number
PH12020551325A
Other languages
English (en)
Inventor
Jordi Mola
Original Assignee
Microsoft Technology Licensing Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Technology Licensing Llc filed Critical Microsoft Technology Licensing Llc
Publication of PH12020551325A1 publication Critical patent/PH12020551325A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3636—Debugging of software by tracing the execution of the program
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/3476—Data logging
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0808—Multiuser, multiprocessor or multiprocessing cache systems with cache invalidating means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811—Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3024—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/3471—Address tracing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/885—Monitoring specific for caches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
PH12020551325A 2018-02-23 2020-08-20 Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache PH12020551325A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/904,072 US10496537B2 (en) 2018-02-23 2018-02-23 Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache
PCT/US2019/017737 WO2019164710A1 (en) 2018-02-23 2019-02-13 Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache

Publications (1)

Publication Number Publication Date
PH12020551325A1 true PH12020551325A1 (en) 2021-09-01

Family

ID=65520481

Family Applications (1)

Application Number Title Priority Date Filing Date
PH12020551325A PH12020551325A1 (en) 2018-02-23 2020-08-20 Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache

Country Status (16)

Country Link
US (1) US10496537B2 (https=)
EP (1) EP3740871B1 (https=)
JP (1) JP7221979B2 (https=)
KR (1) KR102645481B1 (https=)
CN (1) CN111742302B (https=)
AU (1) AU2019223883B2 (https=)
BR (1) BR112020013505A2 (https=)
CA (1) CA3088563A1 (https=)
ES (1) ES2927911T3 (https=)
IL (1) IL276652B2 (https=)
MX (1) MX2020008664A (https=)
MY (1) MY203042A (https=)
PH (1) PH12020551325A1 (https=)
SG (1) SG11202007582RA (https=)
WO (1) WO2019164710A1 (https=)
ZA (1) ZA202004083B (https=)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10031834B2 (en) 2016-08-31 2018-07-24 Microsoft Technology Licensing, Llc Cache-based tracing for time travel debugging and analysis
US11042469B2 (en) 2017-08-28 2021-06-22 Microsoft Technology Licensing, Llc Logging trace data for program code execution at an instruction level
US10642737B2 (en) 2018-02-23 2020-05-05 Microsoft Technology Licensing, Llc Logging cache influxes by request to a higher-level cache
WO2021061220A1 (en) * 2019-09-24 2021-04-01 Microsoft Technology Licensing, Llc Logging trace data for program code execution at an instruction level
KR102894139B1 (ko) * 2019-12-20 2025-12-03 에스케이하이닉스 주식회사 데이터 저장 장치 및 그 동작 방법
LU101767B1 (en) 2020-05-05 2021-11-05 Microsoft Technology Licensing Llc Recording a memory value trace for use with a separate cache coherency protocol trace
LU101770B1 (en) * 2020-05-05 2021-11-05 Microsoft Technology Licensing Llc Memory page markings as logging cues for processor-based execution tracing
LU101768B1 (en) * 2020-05-05 2021-11-05 Microsoft Technology Licensing Llc Recording a cache coherency protocol trace for use with a separate memory value trace
US12411774B2 (en) 2021-02-22 2025-09-09 Microsoft Technology Licensing, Llc Treating main memory as a collection of tagged cache lines for trace logging
WO2022177697A1 (en) * 2021-02-22 2022-08-25 Microsoft Technology Licensing, Llc Cache-based trace logging using tags in an upper-level cache
US11561896B2 (en) 2021-02-22 2023-01-24 Microsoft Technology Licensing, Llc Cache-based trace logging using tags in an upper-level cache
US20220269615A1 (en) * 2021-02-22 2022-08-25 Microsoft Technology Licensing, Llc Cache-based trace logging using tags in system memory
LU500061B1 (en) * 2021-04-20 2022-10-20 Microsoft Technology Licensing Llc Processor support for using cache way- locking to simultaneously record plural execution contexts into independent execution traces
US12072803B1 (en) * 2022-06-30 2024-08-27 Advanced Micro Devices, Inc. Systems and methods for tracking data cache miss requests with data cache tags
US12585469B2 (en) 2024-04-04 2026-03-24 Apple Inc. Trace cache access prediction and read enable
US12547409B2 (en) 2024-04-04 2026-02-10 Apple Inc. Trace cache that supports multiple different trace lengths
CN121029641B (zh) * 2025-10-31 2026-03-17 砺算科技(上海)有限公司 处理器及其数据缓存方法、电子设备、存储介质

Family Cites Families (82)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4598364A (en) 1983-06-29 1986-07-01 International Business Machines Corporation Efficient trace method adaptable to multiprocessors
AU3776793A (en) 1992-02-27 1993-09-13 Intel Corporation Dynamic flow instruction cache memory
US5905855A (en) 1997-02-28 1999-05-18 Transmeta Corporation Method and apparatus for correcting errors in computer systems
US6009270A (en) 1997-04-08 1999-12-28 Advanced Micro Devices, Inc. Trace synchronization in a processor
US6167536A (en) 1997-04-08 2000-12-26 Advanced Micro Devices, Inc. Trace cache for a microprocessor-based device
US6094729A (en) 1997-04-08 2000-07-25 Advanced Micro Devices, Inc. Debug interface including a compact trace record storage
US5944841A (en) 1997-04-15 1999-08-31 Advanced Micro Devices, Inc. Microprocessor with built-in instruction tracing capability
US6101524A (en) 1997-10-23 2000-08-08 International Business Machines Corporation Deterministic replay of multithreaded applications
US6513155B1 (en) 1997-12-12 2003-01-28 International Business Machines Corporation Method and system for merging event-based data and sampled data into postprocessed trace output
US6351844B1 (en) 1998-11-05 2002-02-26 Hewlett-Packard Company Method for selecting active code traces for translation in a caching dynamic translator
US6854108B1 (en) 2000-05-11 2005-02-08 International Business Machines Corporation Method and apparatus for deterministic replay of java multithreaded programs on multiprocessors
US7448025B2 (en) 2000-12-29 2008-11-04 Intel Corporation Qualification of event detection by thread ID and thread privilege level
JP2002207613A (ja) 2001-01-12 2002-07-26 Fujitsu Ltd 履歴採取装置及び履歴採取方法
US6634011B1 (en) 2001-02-15 2003-10-14 Silicon Graphics, Inc. Method and apparatus for recording program execution in a microprocessor based integrated circuit
US20020144101A1 (en) 2001-03-30 2002-10-03 Hong Wang Caching DAG traces
US7185234B1 (en) 2001-04-30 2007-02-27 Mips Technologies, Inc. Trace control from hardware and software
US7178133B1 (en) 2001-04-30 2007-02-13 Mips Technologies, Inc. Trace control based on a characteristic of a processor's operating state
US7181728B1 (en) 2001-04-30 2007-02-20 Mips Technologies, Inc. User controlled trace records
US20030079205A1 (en) 2001-10-22 2003-04-24 Takeshi Miyao System and method for managing operating systems
US7051239B2 (en) 2001-12-28 2006-05-23 Hewlett-Packard Development Company, L.P. Method and apparatus for efficiently implementing trace and/or logic analysis mechanisms on a processor chip
US7089400B1 (en) 2002-08-29 2006-08-08 Advanced Micro Devices, Inc. Data speculation based on stack-relative addressing patterns
US20040117690A1 (en) 2002-12-13 2004-06-17 Andersson Anders J. Method and apparatus for using a hardware disk controller for storing processor execution trace information on a storage device
US7284153B2 (en) * 2003-11-17 2007-10-16 International Business Machines Corporation Apparatus, method, and system for logging diagnostic information
US7526757B2 (en) 2004-01-14 2009-04-28 International Business Machines Corporation Method and apparatus for maintaining performance monitoring structures in a page table for use in monitoring performance of a computer program
US20050223364A1 (en) 2004-03-30 2005-10-06 Peri Ramesh V Method and apparatus to compact trace in a trace buffer
US8010337B2 (en) 2004-09-22 2011-08-30 Microsoft Corporation Predicting database system performance
US7447946B2 (en) 2004-11-05 2008-11-04 Arm Limited Storage of trace data within a data processing apparatus
JP4114879B2 (ja) 2005-01-21 2008-07-09 インターナショナル・ビジネス・マシーンズ・コーポレーション トレース情報収集システム、トレース情報収集方法、及びトレース情報収集プログラム
US7640539B2 (en) 2005-04-12 2009-12-29 International Business Machines Corporation Instruction profiling using multiple metrics
US8301868B2 (en) 2005-09-23 2012-10-30 Intel Corporation System to profile and optimize user software in a managed run-time environment
US7877630B1 (en) 2005-09-28 2011-01-25 Oracle America, Inc. Trace based rollback of a speculatively updated cache
US7984281B2 (en) 2005-10-18 2011-07-19 Qualcomm Incorporated Shared interrupt controller for a multi-threaded processor
US9268666B2 (en) 2005-10-21 2016-02-23 Undo Ltd. System and method for debugging of computer programs
US7620938B2 (en) 2005-10-31 2009-11-17 Microsoft Corporation Compressed program recording
US20070106827A1 (en) 2005-11-08 2007-05-10 Boatright Bryan D Centralized interrupt controller
US7461209B2 (en) 2005-12-06 2008-12-02 International Business Machines Corporation Transient cache storage with discard function for disposable data
US20070150881A1 (en) 2005-12-22 2007-06-28 Motorola, Inc. Method and system for run-time cache logging
US20070220361A1 (en) 2006-02-03 2007-09-20 International Business Machines Corporation Method and apparatus for guaranteeing memory bandwidth for trace data
US7958497B1 (en) 2006-06-07 2011-06-07 Replay Solutions, Inc. State synchronization in recording and replaying computer programs
US7676632B2 (en) 2006-07-18 2010-03-09 Via Technologies, Inc. Partial cache way locking
US7472218B2 (en) 2006-09-08 2008-12-30 International Business Machines Corporation Assisted trace facility to improve CPU cache performance
US20080250207A1 (en) 2006-11-14 2008-10-09 Davis Gordon T Design structure for cache maintenance
US20080114964A1 (en) 2006-11-14 2008-05-15 Davis Gordon T Apparatus and Method for Cache Maintenance
US8370806B2 (en) 2006-11-15 2013-02-05 Qualcomm Incorporated Non-intrusive, thread-selective, debugging method and system for a multi-thread digital signal processor
US8261130B2 (en) 2007-03-02 2012-09-04 Infineon Technologies Ag Program code trace signature
US8484516B2 (en) 2007-04-11 2013-07-09 Qualcomm Incorporated Inter-thread trace alignment method and system for a multi-threaded processor
JP5104340B2 (ja) 2007-04-24 2012-12-19 富士通株式会社 計算機装置およびそのキャッシュリカバリ方法
US20090037886A1 (en) 2007-07-30 2009-02-05 Mips Technologies, Inc. Apparatus and method for evaluating a free-running trace stream
CN101446909B (zh) 2007-11-30 2011-12-28 国际商业机器公司 用于管理任务事件的方法和系统
US8078807B2 (en) 2007-12-27 2011-12-13 Intel Corporation Accelerating software lookups by using buffered or ephemeral stores
CN101765093B (zh) * 2008-12-23 2013-06-12 中兴通讯股份有限公司 一种rnc异常呼叫信令自动缓存跟踪方法
US8413122B2 (en) 2009-02-12 2013-04-02 International Business Machines Corporation System and method for demonstrating the correctness of an execution trace in concurrent processing environments
US8402318B2 (en) 2009-03-24 2013-03-19 The Trustees Of Columbia University In The City Of New York Systems and methods for recording and replaying application execution
US8589629B2 (en) 2009-03-27 2013-11-19 Advanced Micro Devices, Inc. Method for way allocation and way locking in a cache
US8140903B2 (en) 2009-04-16 2012-03-20 International Business Machines Corporation Hardware process trace facility
US8423965B2 (en) 2009-06-23 2013-04-16 Microsoft Corporation Tracing of data flow
JP2011013867A (ja) 2009-06-30 2011-01-20 Panasonic Corp データ処理装置、性能評価解析システム
US8719796B2 (en) 2010-01-26 2014-05-06 The Board Of Trustees Of The University Of Illinois Parametric trace slicing
US8468501B2 (en) 2010-04-21 2013-06-18 International Business Machines Corporation Partial recording of a computer program execution for replay
US9015441B2 (en) 2010-04-30 2015-04-21 Microsoft Technology Licensing, Llc Memory usage scanning
US8499200B2 (en) 2010-05-24 2013-07-30 Ncr Corporation Managing code-tracing data
US20120042212A1 (en) 2010-08-10 2012-02-16 Gilbert Laurenti Mixed Mode Processor Tracing
US9645913B2 (en) 2011-08-03 2017-05-09 Daniel Geist Method and apparatus for debugging programs
US20130055033A1 (en) 2011-08-22 2013-02-28 International Business Machines Corporation Hardware-assisted program trace collection with selectable call-signature capture
US8584110B2 (en) 2011-09-30 2013-11-12 International Business Machines Corporation Execution trace truncation
US8612650B1 (en) 2012-03-13 2013-12-17 Western Digital Technologies, Inc. Virtual extension of buffer to reduce buffer overflow during tracing
US9058415B1 (en) 2013-03-15 2015-06-16 Google Inc. Counting events using hardware performance counters and annotated instructions
US9304863B2 (en) 2013-03-15 2016-04-05 International Business Machines Corporation Transactions for checkpointing and reverse execution
US9189360B2 (en) 2013-06-15 2015-11-17 Intel Corporation Processor that records tracing data in non contiguous system memory slices
US9086974B2 (en) 2013-09-26 2015-07-21 International Business Machines Corporation Centralized management of high-contention cache lines in multi-processor computing environments
US9535815B2 (en) 2014-06-04 2017-01-03 Nvidia Corporation System, method, and computer program product for collecting execution statistics for graphics processing unit workloads
US9300320B2 (en) 2014-06-27 2016-03-29 Qualcomm Incorporated System and method for dictionary-based cache-line level code compression for on-chip memories using gradual bit removal
US9875173B2 (en) 2014-06-30 2018-01-23 Microsoft Technology Licensing, Llc Time travel debugging in managed runtime
US9361228B2 (en) 2014-08-05 2016-06-07 Qualcomm Incorporated Cache line compaction of compressed data segments
US9588870B2 (en) 2015-04-06 2017-03-07 Microsoft Technology Licensing, Llc Time travel debugging for browser components
CN104881371B (zh) * 2015-05-29 2018-02-09 清华大学 持久性内存事务处理缓存管理方法与装置
US10509713B2 (en) 2015-08-18 2019-12-17 Telefonaktiebolaget Lm Ericsson (Publ) Observation by a debug host with memory model and timing offset calculation between instruction and data traces of software execution carried on in a debug target having a main memory and a cache arrangement
US9767237B2 (en) 2015-11-13 2017-09-19 Mentor Graphics Corporation Target capture and replay in emulation
US9569338B1 (en) 2015-12-02 2017-02-14 International Business Machines Corporation Fingerprint-initiated trace extraction
US10031834B2 (en) 2016-08-31 2018-07-24 Microsoft Technology Licensing, Llc Cache-based tracing for time travel debugging and analysis
US10031833B2 (en) 2016-08-31 2018-07-24 Microsoft Technology Licensing, Llc Cache-based tracing for time travel debugging and analysis
US10642737B2 (en) 2018-02-23 2020-05-05 Microsoft Technology Licensing, Llc Logging cache influxes by request to a higher-level cache

Also Published As

Publication number Publication date
JP7221979B2 (ja) 2023-02-14
IL276652B2 (en) 2023-09-01
US10496537B2 (en) 2019-12-03
AU2019223883A1 (en) 2020-07-23
EP3740871B1 (en) 2022-08-24
RU2020131078A3 (https=) 2022-03-23
MY203042A (en) 2024-06-05
AU2019223883B2 (en) 2023-07-13
ZA202004083B (en) 2021-09-29
BR112020013505A2 (pt) 2020-12-01
JP2021515312A (ja) 2021-06-17
CN111742302B (zh) 2025-08-26
EP3740871A1 (en) 2020-11-25
KR102645481B1 (ko) 2024-03-07
SG11202007582RA (en) 2020-09-29
WO2019164710A1 (en) 2019-08-29
US20190266090A1 (en) 2019-08-29
KR20200123187A (ko) 2020-10-28
CA3088563A1 (en) 2019-08-29
IL276652B1 (en) 2023-05-01
ES2927911T3 (es) 2022-11-11
MX2020008664A (es) 2020-09-22
CN111742302A (zh) 2020-10-02
RU2020131078A (ru) 2022-03-23
IL276652A (en) 2020-09-30

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