NZ514367A

NZ514367A - Identification system

Info

Publication number: NZ514367A
Application number: NZ514367A
Authority: NZ
Inventors: Terrence Ketih Ashwin
Original assignee: Konisa Ltd
Priority date: 1999-03-02
Filing date: 2000-03-01
Publication date: 2003-05-30
Also published as: JP2002538555A; NO20014264D0; IL145232A0; CA2365535A1; CZ20013173A3; BR0008722A; AU2685300A; WO2000052636A2; NO20014264L; KR20010104367A; MXPA01008817A; HUP0203404A2; PL350326A1; EP1157358A2; WO2000052636A3

Abstract

An electronic tag (10) is provided which includes processor means and transmitter circuitry (26). The processor means, which is typically a micro-controller (16), is programmed to provide a modulation control signal which includes unique identification data which at least identifies the tag (10) but may include further data. The transmitter circuitry (26) is connected to the processor means and to an antenna (29) for transmission of the unique identification data. The transmitter circuitry (26) is powered by the modulation control signal. Preferably, the transmitter circuitry (26) is exclusively powered by the modulation control signal of the processor means. The invention extends to a receiver (12) for receiving a transmission from the tag (10) and to a system including a plurality of receivers (12) and tags (10). The invention also extends to a method of communicating data from an electronic tag (10) which includes driving transmitter circuitry (26) of the tag with a modulation control signal which substantially powers the transmitter circuitry (26).

Description

<div class="application article clearfix" id="description"> WO 00/52636 PCT/IB00/00220 IDENTIFICATION SYSTEM THIS INVENTION relates to electronic tags. It also relates to a method of communicating data from an electronic tag, to an identification system, and to a receiver for receiving a transmission from 5 the electronic tag. According to the invention, there is provided an electronic tag which includes processor means programmed to provide a modulation control signal which includes unique identification data which at least identifies 10 the tag; and transmitter circuitry connected to the processor means and to an antenna for transmission of the unique identification data, the transmitter circuitry being powered by the modulation control signal. Preferably, the transmitter circuitry is exclusively powered 15 by the modulation control signal of the processor means. Accordingly, the transmitter circuitry is not connected to another source of power but merely to ground and to the processor means. Thus, when the modulation signal is at 0 volts, the transmitter circuitry receives no power resulting in no transmission at all thereby enhancing the low 20 power consumption characteristics of the electronic tag. There is thus no carrier wave and the output or identification signal is thus a pulsed wave switched between 0 volts and its maximum amplitude. CONFIRMATION COPY WO 00/52636 PCT/IB00/00220 2 The transmitter circuitry may include passive components and a transistor defining oscillation circuitry directly driven by the processor means. The transistor in combination with the passive components may form an integral part of the transmitter circuitry which 5 is powered up by the modulation signal. The processor means may be configured to provide the modulation control signal with a first part followed by a second part. The first part may include at least one high pulse of such a duration so as to provide sufficient power to the transmitter circuitry at least partially 10 to stabilize it for transmission of the second part. The second part may include data defined in a plurality of pulses which are of a substantially lesser duration. The signal transmitted by the transmitter circuitry of the tag resembles a combination of an amplitude modulated signal and a pulse width modulated signal. The amplitude modulation of the 15 transmitter under control of the processor means is typically between about 0 % and about 100%. Accordingly, the power consumed by the transmitter whilst data is not being transmitter is substantially reduced. It is however to be appreciated that the transmitter circuitry may modulate the amplitude of the identification signal at any percentage 20 between 0 % and 100 % thereby representing a plurality of values or levels and not merely two levels of "1 "s and "0"s. The modulation control signal may include a plurality of high pulses that, in combination, provide an identification signal to a tag receiver for receiving a transmission from the electronic tag. The high 25 pulses are typically about 60 microseconds in duration with a 50 % duty cycle. It is however to be appreciated that the duty cycle and/or the duration may differ in various embodiments of the invention. WO 00/52636 PCT/IB00/00220 3 Thus, the high part of the modulation signal may perform a dual function. Firstly, it may power up the transmitter circuitry between, preferably, a totally switched off or dormant state, to an operative state in which it has stabilized sufficiently to transmit the second part comprising a pulse train of pulses of a substantially shorter duration. Secondly, the first part allows the receiver to distinguish a transmission from the tag from any other transmission e.g. an interference signal or the like from another source. Each pulse of the second part of the modulation signal may include a start portion for identifying a start of a bit and a data portion for identifying a state of the bit of data. The duration of the data portion may selectively define a high and a low state of the bit under control of the processor means. The pulse width may be defined as the sum of the start and data portions. The high state of the bit is typically defined by a shorter data portion during which the oscillator circuitry is switched off and the low state of the bit is defined by a longer data portion during which the oscillator circuitry is switched off. The shorter pulse may be used to mark or identify the start of a bit after which the transmitter circuitry is switched off totally. The time interval or duration until the transmitter circuitry is switched on again defines the high or low state of the bit. The amount of power required to transmit a high bit and a low bit is substantially the same since power is only consumed to identify the start of a bit of data. WO 00/52636 PCT/IBOO/00220 4 The processor means is typically a micro-controller which includes an internal RC oscillator on which the modulation control signal is dependent and the micro-controller is arranged to enter a sleep mode between data transmissions thereby to reduce power consumption. 5 Accordingly, the transmitter circuitry, under control of the processor means may be arranged periodically to transmit the identification signal is bursts at a predetermined time interval, for example about 1s. Preferably, the identification signal has a duty cycle of about 50 %. Data is typically transmitted in a digital fashion as a series 10 of "1"s and "0"s. Typically, a "0" is transmitted by a transmitter on time being about 10 microseconds followed by an off time of equal duration, and a "1" is transmitted by the transmitter being on about 5 microseconds followed by an off time of equal duration so that the signal has a 50 % duty cycle. It is however to be appreciated that any two 15 different transmission time intervals, controlled by the transmitter processor may be used to communicate a "1" or a "0". Further, the duty cycle of the pulses may vary. Further in accordance with the invention, there is provided an identification system which includes 20 a plurality of electronic tags, each tag including processor means programmed to provide a modulation control signal which includes unique identification data which at least identifies the tag; and transmitter circuitry connected to the processor means and 25 to an antenna for transmission of the unique identification data, the transmitter circuitry being substantially powered by the modulation control signal; and WO 00/52636 PCT/1B00/00220 5 at least one electronic tag receiver configured to receive a transmission from the tag. The transmitter circuitry of the electronic tag may be exclusively powered by the modulation control signal of the processor 5 means. The transmitter circuitry may include passive components and a transistor directly driven by the processor means. The transistor in combination with the passive components may form an integral part of the transmitter circuitry which is powered up by the modulation 10 control signal. The processor means may be configured to provide the modulation control signal with a first part followed by a second part, the first part including at least one high pulse of such a duration so as to provide sufficient power to the transmitter circuitry at least partially to 15 stabilize for transmission of the second part which includes data defined in a plurality of pulses which are of a substantially lesser duration. The first part of the modulation control signal may include a plurality of high pulses that, in combination, provide an identification signal to signal detection means of the electronic tag receiver for 20 receiving a transmission from the electronic tag. Each pulse of the second part of the modulation signal may include a start portion for identifying a start of a bit and a data portion for identifying a state of the bit of data, the duration of the data portion WO 00/52636 PCT/IB00/00220 6 selectively defining a high and a low state of the bit under control of the processor means. The high bit may be defined by a shorter data portion during which the transmitter circuitry is switched off and the low bit is defined 5 by a longer data portion during which the transmitter circuitry is switched off. Still further in accordance with the invention, there is provided a method of communicating data from an electronic tag, the method including driving transmitter circuitry of the tag with a 10 modulation control signal which substantially powers the transmitter circuitry. Typically, the modulation control signal exclusively powers the transmitter circuitry. The transmitter circuitry may include an oscillator which is 15 arranged to oscillate at its fundamental frequency when data is being transmitted and stop oscillating when data is not transmitted. Accordingly, the method may include selectively modulating a fundamental frequency of the oscillator when data is being transmitted and disabling the oscillator when data is not being transmitted. 20 The modulation control signal may include a first part followed by a second part, the first part including at least one high pulse of such a duration so as to provide sufficient power to the transmitter circuitry at least partially to stabilize it for transmission of the second WO 00/52636 PCT/IB00/00220 7 part which includes data defined in a plurality of pulses which are of a substantially lesser duration. The first part of the modulation control signal may include a plurality of high pulses that, in combination, provide an identification 5 signal to a tag receiver for receiving a transmission from the electronic tag. Each pulse of the second part of the modulation signal may include a start portion for identifying a start of a bit and a data portion for identifying a state of the bit of data, the duration of the data portion 10 selectively defining a high and a low state of the bit under control of the processor means. The high bit may be defined by a shorter data portion during which the modulation control signal is switched off and the low bit may defined by a longer data portion during which the modulation control 15 signal is switched off. The processor means is preferably a micro-controller which includes an internal RC oscillator on which the modulation control signal is dependent and the micro-controller is arranged to enter a sleep mode between data transmissions thereby to reduce power consumption. The 20 micro-controller may define a transmitter processor which is typically a PIC 12C509 or the like, which is programmed with appropriate software to execute the method of controlling the transmitter. Still further in accordance with the invention, there is provided a receiver for receiving a transmission from one of a plurality of WO 00/52636 PCT/IB00/00220 8 electronic tags, the transmission including a first part and a second part and the receiver including detection circuitry for detecting the first part and the second part of the transmission, the first part including at least one high pulse in 5 response to which the receiver monitors reception of the second part which includes data defined in a plurality of pulses which are of a substantially lesser duration; and timing means for timing the duration of each of the pulses in the second part and selectively generating a high or a low output defining a 10 bit dependent upon the duration of the pulse. The receiver may include pulse width detection circuitry for decoding the identification signal. The receiver may include receiver circuitry connected to an antenna for receiving the 15 identification signal from at least one electronic tag; demodulation circuitry connected to the receiver circuitry for demodulating the identification signal; amplification circuitry connected to the demodulation circuitry via a capacitive link; and 20 receiver processor circuitry connected to the amplification circuitry for processing the identification signal after demodulation thereof. The receiver may include a repeater transmitter for retransmitting the identification signal to a central control unit. Typically, each tag is attached to an item of value, e.g. a personal computer or 25 other valuable item, located in a particular zone and a receiver monitors the transmission of identification signals in the zone. The central control WO 00/52636 PCT/IB00/00220 9 unit may thus be in wireless communication with a plurality of zones each of which include a receiver monitoring associated tags located on valuable items or equipment in the zone. The invention is now described, by way of example, with 5 reference to the accompanying diagrammatic drawings. In the drawings, Figure 1 shows a schematic circuit diagram of a electronic tag in accordance with the invention; Figure 2 shows a schematic circuit diagram of a receiver, also in 10 accordance with the invention; Figure 3 shows a flow chart of a method of controlling transmission of data via the tag of Figure 1; Figure 4 shows an example of a burst of data transmitted by the transmitter; and 15 Figure 5 shows a flow chart of a method of decoding data by the receiver of Figure 2. Referring to the drawings, an identification system, in accordance with the invention, is provided which includes a plurality of transmitters which are in the form of electronic tags 10 (also in 20 accordance with the invention and only one of which is shown in the drawings), each of which is associated with at least one receiver 12 (see Figure 2). Typically, valuable items or equipment to be monitored in a selected zone, e.g. computers in a particular office area, are each fitted with a tag 10 and the receiver 12 is located in the zone to monitor 25 signals received from the tag 10. The receiver 12 forms part of a network of receivers which may be installed in a particular building or the WO 00/52636 PCT/IBOO/00220 10 like. Each receiver 12 communicates via its repeater transmitter 14 to a central control unit (not shown). The central control unit may thus monitor and record authorised and/or unauthorised removal of the equipment. 5 Each tag 10 includes transmitter processor means in the form of a micro-controller 16 with associated support circuitry 18, and a long-life lithium battery 20. Selected I/O ports of the micro-controller 16 are connected to a connection terminal 22 via which resident software to control the method of transmission of data is programmed 10 into the micro-controller 16. In use, a reed switch 24 is selectively enabled to toggle the micro-controller 16 into various states or modes of operation. In one mode of operation, the reed switch 24 may function as a sensing means, for example, to sense movement or the like. In another mode of operation, the reed switch 24 may function as data 15 input means for feeding data into on-board memory of the microcontroller 16, e.g. data to uniquely identify the tag 10. The microcontroller 16 controls operation of transmitter circuitry 26 which transmits data, sourced from the micro-controller 16, to the receiver 12. As can clearly be seen from the schematic circuit diagram 20 shown in Figure 1, the micro-controller has one of its output ports connected directly to a transistor 25 of the transmitter circuitry 26. The transmitter circuitry 26 also includes associated passive components 27 which, in combination, define oscillator circuitry. Further, the transmitter circuitry 26 is not connected to the battery 20 but merely to ground and 25 is powered exclusively by the modulation control signal from the microcontroller via line 28. Thus, the transmitter circuitry 26 is toggled between an "on" state in which it transmits a pulse via its antenna 29 WO 00/52636 PCT/IBOO/00220 11 and an "off" state in which it receives no power at all and is thus switched off completely. In order to allow the transmitter circuitry 26 to stabilize for transmission of data, the micro-controller 16 feeds three pulses (part of 5 one pulse 31 being shown in Figure 4), each pulse having a high portion of between about 20 and about 70 microseconds, typically about 60 microsecond, and a duty cycle of 50 %, to the transmitter circuitry via line 28. In particular, the modulation control signal generated by software of the micro-controller 16 has a first part followed by a second 10 part. The first part includes the three high pulses of about 60 microsecond duration which are generated by the routine "pulse 4" in Table 2. As shown by arrow 150 in Table 2, the "pulse 4" subroutine (see arrow 152) is called three times. The high part of the modulation signal performs a dual function. Firstly, it powers up the transmitter 1 5 circuitry 26 between, preferably, a totally switched off or dormant state, to an operative state in which it has stabilized sufficiently to transmit the second part comprising a pulse train of pulses of a substantially shorter duration. Secondly, the first part allows the receiver to distinguish a transmission from the tag from any other transmission e.g. an 20 interference signal or the like from another source. The micro-controller 16 controls transmission of unique identification data in the second part of the modulation control signal by means of a method, also in accordance with the invention, carried out in its resident software. The method used by the micro-controller 16 is set 25 out in Table 2 (see arrow 154). In particular, the micro-controller 16 controls the transmitter circuitry 26 in such a fashion so that its transmitted or identification signal is both amplitude modulated and a WO 00/52636 PCT/IBO0/00220 12 pulse width modulated. The amplitude modulation of the transmitted signal varies between about 0% and about 100% modulation when representing both "1" and "0" (see Figure 3). The transmitted signal has a 50% duty cycle and a "1" is transmitted, for example, by a pulse with 5 a 5 microseconds "on" time followed by a 5 microsecond "off" time resulting in a total pulse width of 10 microseconds (see Figure 4). A "0", on the other hand, is transmitted by a pulse with an "on" time of 10 microseconds and an "off" time of 10 microseconds resulting in a total pulse width of 20 microseconds. The total duration of the pulse, i.e. 10 either 10 microseconds or 20 microseconds, that determines the state of a bit (see arrow 156 and following in Table 2). A plurality of pulses are transmitted in a burst of data and the burst of data is typically transmitted by the tag 10 periodically at a time interval of about 1 second. It is however to be appreciated that the pulses of the second 15 part need not necessarily have a 50 % duty cycle since the high state of the pulse 33 (see Figure 4) acts as a marker or start portion identifying the start of a bit. Thereafter, a data portion defines the state of the bit, the duration 35 of the data portion being the total width of the pulse including its "off". In the present embodiment, the data portion 35 20 defines a high or low state of the bit by a 10 microsecond transmitter circuitry "off" time and a 20 microsecond transmitter circuitry "off" time respectively (see Figure 3). When the receiver 12 receives a transmission from the tag 10, it determines the total length or duration of the pulse and assigns a "1" or "0" as shown in Figure 5. 25 Typically, the micro-controller 16 includes a counter which has its count reset upon installation of the battery 20 and thereafter increments its count each time the transmitter circuitry 26 transmits a burst of data. Data from the micro-controller 16 is fed to the transmitter WO 00/52636 PCT/IBOO/00220 13 circuitry 26 via line 28. It is to be appreciated that the data transmitted by the tag 10 may include a value of the count, unique identification data for identifying the tag 10, data sensed by the reed switch 24, or any other data. 5 The micro-controller 16 of the tag 10 does not use a crystal oscillator to control its operation but uses an internal RC oscillator provided in the chip. It is believed that the power consumption of the tag 10 is thereby reduced and start-up delays are faster. Accordingly, in order further to reduce the power consumption of the tag 10, the tag 10 10 is dormant or asleep between each burst of data which it transmits. In order to achieve this, a second sleep or stand-by RC oscillator provided in the micro-controller 16, is used. As shown in block 30, after the predetermined time interval, typically about 0.7 to about 1s (see arrow 158 in Table 2) has lapsed, the micro-controller 16 is instructed 15 to start/wake-up. Thereafter, the unique identification code and other data to be transmitted by the tag 10 is set up as shown in block 32, whereafter the data is configured in a serial form as shown in block 34 where the next/first byte of the remaining bytes (designated by X) is fed to the transmitter circuitry 26 as shown in block 36. The micro-20 controller 16 then (see block 38) analyses each bit in the serial string. If the bit is at logic "1", the transmitter circuitry 26 is activated to transmit a pulse which is high for 5 microseconds as shown in block 40 and, thereafter, a low of 5 microseconds is implemented as shown is block 42 to ensure that the transmitted signal has a 50% duty cycle and 25 a total pulse width of 10 microseconds. However, if the bit is at logic "0", the transmitter circuitry 26 is then instructed to transmit a pulse which is high for 10 microseconds as shown is block 44 followed by a low of 10 microseconds, as shown in block 46, providing a 50% duty WO 00/52636 PCT/IB00/00220 14 cycle and a total pulse width of 20 microseconds when a "0" is transmitted. If all the bits of the byte have been transmitted, as shown in block 48, then the micro-controller 16 is instructed to increment its 5 pointer to the next byte as shown in block 50 (see also arrow 154 in Table 2). If, however, all 8 bits of the byte have not been transmitted, then the micro-controller 16 is instructed to fetch the next bit as shown in block 52 and the procedure as set out above is repeated. As shown in block 54, if the last byte to be sent in the burst has been sent, then 10 the micro-controller 16 goes into a sleep or dormant mode (see block 55) for the predetermined time interval. However, if the last byte has not been sent, then the micro-controller 16 fetches the next byte as shown in block 34. Referring in particular to Figure 2 of the drawings, the 15 receiver 12 includes a receiver processor 56 defined by a receiver microcontroller 58, for example, a PIC 16F84 or the like. Selected I/O ports of the receiver micro-controller 58 are connected to I/O terminals 60 to allow resident software to be programmed into the micro-controller 58 by an external device such as a PC or the like. The receiver micro-20 controller 58 is connected via line 62 to the repeater transmitter 14 which is substantially similar to the transmitter circuitry 10. The repeater transmitter 14 includes a transistor 64 which is selectively switched on and off by the receiver micro-controller 58 to generate "1"s and "0"s thereby repeating a signal received by the receiver 12 to the central 25 monitoring or control unit. As in the case of the transmitter circuitry 26, the transmitter 14 sources its operational power directly from a WO 00/52636 PCT/IB00/00220 15 modulation control signal provided via an output port of the microcontroller 58 via line 62. The identification signal transmitted by the tag 10 is received by receiver circuitry 68 which has its output signal fed into an 5 RF amplifier 74 and into demodulation circuitry 70 via line 72. The demodulation circuitry 70 has its output connected, via a decoupling capacitor 76, to amplification circuitry generally indicated by reference numeral 78 which comprises a series of operational amplifiers. An output stage of the operational amplifiers is connected via line 80 to a 10 port of the receiver micro-controller 58. Power to the various components of the receiver 1 2 is provided by a power supply unit 82. Selected I/O ports of the receiver micro-controller 58 are connected to a programming terminal 84 in which appropriate software to control the method of operation of the receiver 12 is fed into the 15 receiver micro-controller 58. The method of controlling the receiver 12 is set out in Table 1 and described in more detail below. Referring in particular to Figure 5 of the drawings, the receiver software first includes the method of resetting the bit/byte information as shown in block 86. The initialization of the bit/byte 20 information and various other operating parameters is generally indicated by arrow 160 and following in Table 1. Arrow 162 marks the start of the routine where the ports of the micro-controller 58 are initialized. The software implementing the method then waits for a high input as shown in block 88. When a high input is received, the duration of the pulse is 25 monitored. In particular, the routine "HIG1" (see arrow 164 in Table 1) determines the duration for which the pulse is high and the routine WO 00/52636 PCT/IB00/00220 16 "HIG2" determines the duration for which the pulse is low (see arrow 166). The sum of the high and low durations is then calculated to check if the total duration is within an acceptable range which is typically between about 50 and about 70 microseconds. Thus, the time duration 5 or interval between the pulses is counted or determined until a next high is received as shown in block 90. If the interval is 10 microseconds (i.e a five microsecond high followed by a five microsecond low) as shown in block 92, then the incoming bit of the burst of data received from the tag 10 is a "1" as shown in block 94. Thereafter the bit counter is 10 incremented by one as shown in block 96 and if it is the last bit of the count (see block 98) then the bit/byte is reset as shown by line 100 leading into block 86. If, however, the interval is not equal to 10 microseconds, then the interval is timed to determine whether or not it is equal to about 20 microseconds (i.e. 10 microsecond high followed by 15 a 10 microsecond low). If the delay is equal to about 20 microseconds, then the bit is recognized as a "0" as shown in block 104 and, once again, the bit counter is incremented as shown in block 96. However, if the interval is not equal to 20 microseconds then the method includes resetting the bits/byte as shown by line 106 leading to the block 86. 20 The routine for recognizing a "1" or a "0" is generally indicated by arrow 168 in Table 1. Table 1 also includes various other routines, e.g. an RS 232 routine, for feeding data to other devices. It is to be appreciated that the receiver micro-controller 58 may include a variety of additional routines to allow communication of data received from the tag 10 to be 25 communicated to other devices. The inventor believes that the invention, as illustrated, provides an identification system including a method of communicating data from the tag 10 to the receiver 12 which has reduced power WO 00/52636 PCT/IB00/00220 17 consumption characteristics. The features of the invention that enhance the low power consumption characteristics include the powering of the transmitter circuitry 26 by means of the modulation control signal and the arrangement in which the state of a bit is determined by the "off" time of the transmitter circuitry 26. Power consumption of the tag 10 is also substantially reduced when the tag 10 is in its sleep or dormant mode. WO 00/52636 PCT/IB00/00220 18 TABLE 1 ds5000 dev system Capetown with dave update check for freq and stat less than 64 current program START SEQUENCE CORRECTED FOR ERRORS AND SPEED INCREASE BIT 1 OF DATA CORRECTED DECREASE START FRAME HIGH AND LOW ADD CHECK FOR CHECKSUM list p = 16f84,f = inhx8m CONFIG 3FF1H INDIR = 0 FSR = 4 PORTA =5 PORTB = 6 TRlSA = 85h TRISB = 86h TMRO =1 STATUS=3 PCL= 2 OPTN = 81h INTCON = OB RPO EQU 5 TEMP2 EQU 11h TEMPI EQU 12h TIMER1 EQU 13h VALUEX EQU 14h DIGIT 1 EQU 15h DIGIT2 EQU 16h DIGIT3 EQU 17h ASCII EQU 18h VALUE EQU 19h TEMP equ 20h CHAR EQU 21 h TIMER VALUE TEMP .TEMP TEMP TEMP TEMP ;TEMP ;Temporary storage location .-Character storage location DIGITS EQU 22h VALUE1 EQU 23h VALUE2 EQU 24h VALUE3 EQU 25h VALUE4 EQU 26h VALUE5 EQU 27h VALUE6 EQU 28h VALUE7 EQU 29h VALUE8 EQU 2Ah VALUE9 EQU 2Bh VALUE10 EQU 2Ch VALUE11 EQU 2Dh VALUE! 2 EQU 2 Eh VALUE13 EQU 2Fh VALUE14 EQU 30h CALB EQU 31h CALA EQU 32h DLINE EQU 33h I60 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 19 CHECK1 EQU 36h CHECK2 EQU 37h CHECK3 EQU 38h CHECKX EQU 39h CSUM EQU 3Ah CSUM2 EQU 3Bh DAT EQU PORTB CNTRL EQU PORTA E EQU 3 RW EQU 2 RS EQU 1 C EQU 0 W EQU 0 F EQU 1 P EQU 0 ;CHECK SUM I62 START CLRF DLINE CLRF CHECK1 call LCDInit call LCDInit CALL LCDInit BCF PORTB.O .-MAIN .'SETUP TIMER/COUNTER movlw OPTN movwf FSR movlw OOh ;20h = counter + no prescaler movwf INDIR clr TMRO bcf STATUS.RPO clrf PORTA clrf PORTB ,Configure ports A and D to outputs bsf STATUS, RPO .-Select Register page 1 movlw B'OOOOOOOO' .-Set lower 4 bits in PORTB movwf TRISB ;as outputs movlw B'00000011' ;Set port.a as outputs movwf TRISA bcf STATUS, RPO ;Select Register page 0 clrf PORTA ;clear port_a MOVLW .5 MOVWF TEMP2 MOVLW .10 MOVWF TIMER1 MOVLW .100 MOVWF TEMPI SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 zxc INCF INCF INCF CALL DECFSZ GOTO TEMPI ,F TEMPI ,F TEMPI ,F BEEP TEMP2.1 ZXC 20 CLRF PORTA MAIN SSA BCF BCF BCF NOP CLRF PORTB. 1 P0RTB.4 PORTA.O CSUM ;B 0 BTFSS GOTO BSF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF CHECK 1,1 HIG1 PORTB,4 .5,-WAS 20 TEMP2 .10 TIMER1 .100 TEMPI ;T0 OPEN DOOR UN REMARK ;XXC CALL DECFSZ GOTO BEEP TEMP2,1 XXC ;RTR1 ;RTR ;RTR2 MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF DECFSZ GOTO DECFSZ GOTO DECFSZ GOTO BCF CLRF CLRF .50 TIMER 1 .200 CHECK2 .200 TEMPI TEMPI ,F RTR2 CHECK2 RTR TIMER1 RTR1 P0RTB.4 CHECK1 CHECKX ;100 = 3sec HIG1 I64 HWW1 BTFSS GOTO CLRF PORTA.O HIG1 TEMPI NOP SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 21 NOP NOP INCFSZ TEMPI ,F GOTO HWZ1 GOTO HIG1 HWZ1 BTFSC PORTA.O GOTO HWW1 ;wait for HIGH ; BTFSC TEMPI ,3 ;8 ; GOTO HIG2 BTFSC TEMPI ,4 ;16 GOTO HIG2 BTFSC TEMPI.5 ;32 GOTO HIG2 BTFSC TEMPI ,6 ;64 GOTO HIG2 BTFSC TEMPI ,7 ;128 GOTO HIG2 GOTO HIG1 HIG2 HWW2 HIG3 HWW3 CLRF NOP NOP INCFSZ TEMPI NOP TEMPI ,F HWZ2 BTFSS HWZ3 BTFSC 166 GOTO HWZ2 GOTO HIG1 PORTA.O GOTO HWW2 wait for HIGH BTFSC TEMPI ,3 ;8 GOTO HIG3 BTFSC TEMPI ,4 ;16 GOTO HIG3 BTFSC TEMPI ,5 ;32 GOTO HIG3 BTFSC TEMPI .6 ;64 GOTO HIG3 BTFSC TEMPI ,7 ;128 GOTO HIG3 GOTO HIG1 CLRF TEMPI NOP NOP NOP INCFSZ TEMPI,F GOTO HWZ3 GOTO HIG1 PORTA.O GOTO HWW3 ;wait for HIGH BTFSC TEMPI ,3 ;8 GOTO HIG4 BTFSC TEMPI ,4 ;16 GOTO HIG4 BTFSC TEMPI ,5 ;32 GOTO HIG4 BTFSC TEMPI ,6 ;64 GOTO HIG4 BTFSC TEMPI ,7 ;128 GOTO HIG4 GOTO HIG1 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 22 HIG4 CLRF TEMPI HWW4 NOP NOP NOP INCFSZ TEMPI,F GOTO HWZ4 GOTO HIG1 HWZ4 BTFSS PORTA.O GOTO HWW4 ;wait for HIGH BTFSC TEMPI ,3 ;8 GOTO HIG5 BTFSC TEMPI .4 ;16 GOTO HIG5 BTFSC TEMPI ,5 ;32 GOTO HIG5 BTFSC TEMPI ,6 ;64 GOTO HIG5 BTFSC TEMPI ,7 ;128 GOTO HIG5 GOTO HIG1 HIG5 CLRF TEMPI HWW5 NOP NOP NOP INCFSZ TEMPI ,F GOTO HWZ5 GOTO HIG1 HWZ5 BTFSC PORTA.O GOTO HWW5 .wait for HIGH BTFSC TEMPI,8 ;8 REPETER ONLY GOTO HIG6 BTFSC TEMPI ,4 ;16 GOTO HIG6 BTFSC TEMPI ,5 ;32 GOTO HIG6 BTFSC TEMPI ,6 ;64 GOTO HIG6 BTFSC TEMPI ,7 ;128 GOTO HIG6 GOTO HIG1 HIG6 CLRF TEMPI HWW6 NOP NOP NOP INCFSZ TEMPI,F GOTO HWZ6 GOTO HIG1 HWZ6 BTFSS PORTA.O GOTO HWW6 ,-wait for HIGH BTFSC TEMPI ,3 ;8 GOTO HIG7 BTFSC TEMPI ,4 ;16 GOTO HIG7 BTFSC TEMPI ,5 ;32 GOTO HIG7 BTFSC TEMPI ,6 ;64 GOTO HIG7 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 23 HIG7 BTFSC GOTO GOTO TEMPI ,7 HIG7 HIG1 ;128 'END* ;SX1 ;LX1 ;NOE CLRF BTFSC GOTO INCF MOVLW MOVWF DECFSZ GOTO GOTO BTFSS GOTO GOTO VALUE1 PORTA.O SX1 VALUE1 .200 VALUE2 VALUE2.F NOE ENDF PORTA.O LX1 SX1 ;ENDF GOTO SKIPP NOP CLRF VALUE1 CALL MOVF MOVWF WAITD TIMER1.W VALUE1 CALL MOVF MOVWF WAITD TIMERI.W VALUE2 CALL MOVF MOVWF WAITD TIMERI.W VALUE3 CALL MOVF MOVWF WAITD TIMERI.W VALUE4 CALL MOVF MOVWF CALL MOVF MOVWF WAITD TIMERI.W VALUES WAITD TIMERI.W VALUE6 CALL MOVF MOVWF WAITD TIMERI.W VALUE7 SUBSTITUTE SHEET (RULE 26) WO 00/52636 CALL MOVF MOVWF CALL MOVF MOVWF CALL MOVF MOVWF CALL MOVF MOVWF CALL MOVF MOVWF CALL MOVF MOVWF CALL MOVF MOVWF CALL MOVF MOVWF CALL MOVF MOVWF CALL MOVF MOVWF MOVLW MOVWF ;CHECK DATA goto MOVF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF PCT/IBOO/00220 24 WAITD TIMERI.W VALUE8 WAITD TIMERI.W VALUE9 WAITD TIMERI.W VALUE10 WAITD TIMERI.W VALUE11 WAITD TIMERI.W VALUE12 WAITD TIMERI.W VALUE13 WAITD TIMERI.W VALUE14 WAITD TIMERI.W VALUE15 WAITD TIMERI.W VALUE16 WAITD ,-CHECK SUM TIMERI.W CSUM .98 ;REC ID VALUE15 tst7 VALUE1.W VALUE2.W VALUE3.W VALUE4.W VALUE5.W VALUE6.W VALUE7.W VALUE8.W VALUE9.W VALUE10.W VALUE11.W VALUE! 2,W VALUE13.W SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IBOO/0O22O 25 ADDWF VALUE14.W ADDWF VALUE15.W MOVWF CSUM2 MOVF CSUM.W ;CHECK SUM SUBWF CSUM2.W MOVWF TEMPI BTFSC TEMPI ,0 GOTO OUT ; BTFSC TEMPI, 1 ; GOTO OUT ; BTFSC TEMPI ,2 GOTO OUT BTFSC TEMPI ,3 GOTO OUT BTFSC TEMPI .4 GOTO OUT BTFSC TEMPI ,5 GOTO OUT BTFSC TEMPI ,6 GOTO OUT BTFSC TEMPI ,7 GOTO OUT MOVF CSUM2.W ;CHECK SUM SUBWF CSUM.W MOVWF TEMPI BTFSC TEMPI ,0 GOTO OUT BTFSC TEMPI, 1 GOTO OUT BTFSC TEMPI ,2 GOTO OUT BTFSC TEMPI,3 GOTO OUT BTFSC TEMPI ,4 GOTO OUT BTFSC TEMPI ,5 GOTO OUT BTFSC TEMPI,6 GOTO OUT BTFSC TEMPI ,7 GOTO OUT MOVF VALUE2,W ;CHECK STAT AND FREQ MOVWF TEMPI BTFSC TEMPI,6 GOTO OUT BTFSC TEMPI ,7 GOTO OUT MOVF VALUE3.W ;CHECK STA AND FREQ MOVWF TEMPI BTFSC TEMPI ,6 GOTO OUT BTFSC TEMPI ,7 GOTO OUT SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IBOO/00220 26 tst7 KKK goto tsp7 ;look for P OR Q MOVLW SUBWF VALUE MOVWF BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO .80 16,W TEMPI TEMPI .0 OUT ;REM = TEMPI, 1 OUT TEMPI ,2 OUT TEMPI ,3 OUT TEMPI ,4 OUT TEMPI ,5 OUT TEMPI ,6 OUT TEMPI ,7 OUT ,-TURN ON 10 PORTB 0 PIN 6 MOVW .84 MOVWF TEMPI BTFSC TEMPI ,0 GOTO KKK BTFSC TEMPI, 1 GOTO KKK BTFSC TEMPI ,2 GOTO KKK BTFSC TEMPI ,3 GOTO KKK BTFSC TEMPI .4 GOTO KKK BTFSC TEMPI ,5 GOTO KKK BTFSC TEMPI ,6 GOTO KKK BTFSC TEMPI ,7 GOTO KKK INCF CHECK1 GOTO KKD MOVLW .69 SUBWF VALUE1 ,W MOVWF TEMPI BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC TEMPI .0 KKS TEMPI,1 KKS TEMPI ,2 KKS TEMPI ,3 ;skip looking for P or Q ;was 80h less bitO ;LOOK FOR P ONLY ;P,Q.R,S ;T .-remark ;WAS KKL ;remark .WAS KKL SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 27 KKO KKL GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO INCF GOTO KKS TEMPI ,4 KKS TEMPI .5 KKS TEMPI ,6 KKS TEMPI,7 KKS CHECKX KKD KKS CLRF CLRF CHECK1 CHECKX ;RTR1 ;RTR ;RTR2 BSF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF DECFSZ GOTO DECFSZ GOTO DECFSZ GOTO P0RTB.4 .5 TEMP2 .20 TIMER1 .200 TEMPI .50 TIMER1 .200 CHECK2 .200 TEMPI TEMPI ,F RTR2 CHECK2 RTR TIMER1 RTR1 100 = 3sec ;check for alarm on OKD MOVLW SUBWF VALUE3 MOVWF BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO ;was 49 50 ,W TEMPI TEMPI,0 OUT3 ;WAS 1 TEMPI,1 OUT3 TEMPI ,2 OUT3 TEMPI ,3 OUT3 TEMPI ,4 OUT3 TEMPI ,5 OUT3 TEMPI ,6 OUT3 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IBO0/00220 28 BTFSC GOTO TEMPI ,7 OUT3 CLRF GOTO CHECK1 OUT2 ;WAS 1 OUT2 .ALARM ON BEEP MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF .5 TEMP2 .10 TIMER1 .100 TEMPI ZXC1 INCF INCF INCF CALL DECFSZ GOTO TEMPI ,F TEMPI ,F TEMPI ,F BEEP TEMP2.1 ZXC1 MOVLW MOVWF MOVLW MOVWF CALL GOTO .200 TIMER1 .100 TEMPI BEEP SKIPP OUT1 OUT3 ;NOT SEEN A T ;SEEN UNIT NOT A T SO SET OFF ALARM IF SEEN MORE THAN 4 TIMES ;WAS 3 BTFSS INCF BTFSS GOTO OUT3 NOP GOTO OUT2 MOVLW MOVWF MOVLW MOVWF CALL GOTO CHECK 1,3 CHECK 1.F CHECK 1,3 .10 TIMER1 .20 TEMPI BEEP SKIP ;SET OFF ALARM ;was a 5 TIC ;was a 10 OUT ,-VALUE NOT RIGHT RETURN AND READ AGAIN MOVLW MOVWF MOVLW .200 TIMER1 .100 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 29 ; MOVWF TEMPI ; CALL BEEP GOTO MAIN SKIPP OUTV BSF GOTO PORTB, 1 GKL .FOR NO DISPLAY GKL ;SEND ONLY ALARM DATA BTFSS GOTO PORTA, 1 TX2 MOVLW SUBWF VALUE3 MOVWF BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO GOTO .50 ,W TEMPI TEMPI ,0 TX1 TEMPI, 1 TX1 TEMPI,2 TX1 TEMPI ,3 TX1 TEMPI ,4 TX1 TEMPI ,5 TX1 TEMPI ,6 TX1 TEMPI ,7 TX1 TX2 ;was 2A = T TX1 GOTO MAIN TX2 ;PC VERSION FOR DS5000 MOVLW 65h CALL TXDATA MOVLW 65h CALL TXDATA MOVLW .33 CALL TXDATA MOVLW .42 CALL TXDATA SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 MOVLW CALL MOVF CALL MOVF CALL MOVF CALL MOVLW CALL MOVLW CALL MOVLW CALL MOVF CALL MOVF MOVLW CALL MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVLW CALL MOVLW CALL MOVLW CALL MOVLW CALL BSF .42 ;* TXDATA VALUE 1,W TXDATA VALUE2.W TXDATA VALUE3.W TXDATA .65 TXDATA .66 TXDATA .67 TXDATA VALUE4.W TXDATA VALUE5.W .48 TXDATA VALUE6.W TXDATA VALUE7.W TXDATA VALUEB.W TXDATA VALUE1 ,W TXDATA VALUE9.W TXDATA VALUE10.W TXDATA VALUE11.W TXDATA VALUE12.W TXDATA VALUE13.W TXDATA VALUE14.W TXDATA VALUE15,W TXDATA VALUE16,W TXDATA .48 TXDATA OAh TXDATA ODh TXDATA 80h TXDATA PORTB,2 SUBSTITUTE SHEET (RULE 26) WO 00/52636 31 TERRYX MOVLW .01 MOVWF CHECK3 TERRYY ; GOTO MAIN ; GOTO NOTX ;tx data on MOVF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF MOVWF VALUE1,0 VALUE2.0 VALUE3.0 VALUE4.0 VALUE5.0 VALUE6.0 VALUE7.0 VALUE8.0 VALUE9.0 VALUE10.0 VALUE11,0 VALUE! 2,0 VALUE13.0 VALUE! 4,0 VALUE15.0 CSUM MOVLW 20h .was 20 MOVWF TEMP! movlw 20h movwf TEMP CALL pulse4 MOVLW 20h MOVWF TEMP! MOVLW 20h ;WAS 20 AND START MOVWF TEMP CALL pulse4 movlw 20h movwf TEMP call pulse4 MOVLW .04 ;TX ON TIME MOVWF TEMP! movf VALUE 1,0 ;was 10h movwf TEMP call pulse movf VALUE2.0 movwf TEMP call pulse PCT/IB00/00220 SUBSTITUTE SHEET (RULE 26) WO 00/52636 32 movlw movf movwf call movf movwf call movf movwf call movf movwf call .50 VALUE3.0 TEMP pulse VALUE4.0 TEMP pulse VALUES,0 TEMP pulse VALUE6,0 TEMP movf movwf call movf movwf call movf movwf call movf movwf call VALUE7.0 TEMP pulse VALUE8.0 TEMP pulse VALUE9.0 TEMP pulse VALUEIO.O TEMP pulse movf movwf call movf movwf call movf movwf call movf movwf call movf movwf call movf movlw movwf call VALUE11,0 TEMP pulse VALUE! 2,0 TEMP pulse VALUE13.0 TEMP pulse VALUE! 4,0 TEMP pulse VALUE! 5,0 TEMP pulse VALUE! 6,0 .83 TEMP pulse MOVF CSUM.O PCT/IB00/00220 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 33 MOVWF TEMP CALL pulse call pulse5 DECFSZ GOTO CHECK3.F TERRYY NOTX MOVLW CALL MOVLW CALL MOVLW CALL MOVLW CALL MOVLW CALL MOVF CALL MOVF CALL MOVF CALL 65h XXDATA 65h XXDATA .33 XXDATA .42 XXDATA .42 XXDATA VALUE1,W XXDATA VALUE2.W XXDATA VALUE3.W XXDATA MOVLW CALL MOVLW CALL MOVLW CALL .65 XXDATA .66 XXDATA .67 XXDATA MOVF CALL VALUE4,W XXDATA MOVF MOVLW CALL MOVF CALL MOVF CALL MOVF CALL VALUE5.W .48 XXDATA VALUE6.W XXDATA VALUE7.W XXDATA VALUE8.W XXDATA MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVF CALL MOVF VALUE! ,W XXDATA VALUE9.W XXDATA VALUE!0,W XXDATA VALUE!!,W XXDATA VALUE!2,W XXDATA VALUE!3,W SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IBO0/00220 34 CALL MOVF CALL MOVF CALL MOVF CALL MOVLW CALL XXDATA VALUE14,W XXDATA VALUE15,W XXDATA VALUE16rW XXDATA .48 XXDATA MOVLW CALL MOVLW CALL MOVLW CALL MOVLW CALL OAh XXDATA ODh XXDATA 80h XXDATA 80h XXDATA BCF PORTB.2 GOTO MAIN pulse BTFSS CALL BTFSC call BTFSS CALL BTFSC call BTFSS CALL BTFSC call BTFSS CALL BTFSC call BTFSS CALL BTFSC call BTFSS CALL BTFSC call TEMP,0 puise3 TEMP,0 pulse2 TEMP.1 pulse3 TEMP.1 pulse2 TEMP,2 pulse3 TEMP.2 pulse2 TEMP.3 pulse3 TEMP,3 pulse2 TEMP.4 pulse3 TEMP.4 pulse2 TEMP.5 pulse3 TEMP.5 pulse2 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 BTFSS CALL BTFSC call BTFSS CALL BTFSC call ; CALL return pulse6 clrwdt TEMP,6 pulse3 TEMP,6 pulse2 TEMP,7 pulse5 TEMP.7 pulse6 pulse5 35 MOVF TEMPI ,W movwf TIMER 1 bsf PORTB.3 ;on foR 3 6 9 12 ETC. diiig NOP NOP NOP nop nop nop nop ;new nop nop nop decfsz TIMER1,1 goto diiig BCF PORTB,3 ;cycle 46 turn off MOVLW .22 ;was 18 MOVWF TIMER1 TNY2 DECFSZ TIMER1.1 GOTO TNY2 RETURN pulse2 clrwdt MOVF TEMPI ,W movwf TIMER1 bsf PORTB.3 ;on foR 3 6 9 12 ETC. ddgf NOP NOP NOP NOP NOP NOP NOP SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 nop nop nop 36 decfsz goto BCF MOVLW MOVWF TNY1 DECFSZ GOTO TIMER1.1 ddgf PORTB.3 .17 TIMER1 TIMER1.1 TNY1 ;cycl 46 turn off ;WAS 13 RETURN pulse5 clrwdt digg MOVF movwf TIMER1 bsf NOP NOP NOP decfsz goto BCF NOP NOP NOP NOP NOP NOP TEMPI ,W PORTB.3 TIMER1.1 digg PORTB.3 ;on foR 3 6 9 12 ETC. ;cycle 46 turn off RETURN pulse 3 clrwdt MOVF movwf bsf digpp NOP NOP NOP decfsz goto BCF TEMPI ,W TIMER1 PORTB.3 TIMER1.1 digpp PORTB.3 ;on foR 3 6 9 12 ETC. .-cycle 46 turn off MOVLW MOVWF TNY4 NOP NOP NOP DECFSZ GOTO .3 TIMER1 TIMER1.1 TNY4 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IBOO/00220 return 37 pulse4 digph digf clrwdt MOVF movwf NOP NOP NOP NOP bsf NOP NOP NOP decfsz goto BCF NOP NOP NOP decfsz TEMP.1 goto digf NOP NOP RETURN TEMPI ,W TIMER 1 ;1 2 CYCLES PORTB.3 TIMER1.1 digph PORTB.3 ;on for 46us ;cycle 46 turn off TXDATA MOVWF call nop nop nop nop nop BTFSS CALL BTFSC call TEMP PPSE2 TEMP.O PPSE2 TEMP.O PPSE3 BTFSS CALL BTFSC call TEMP.1 PPSE2 TEMP.1 PPSE3 BTFSS CALL BTFSC call TEMP.2 PPSE2 TEMP.2 PPSE3 BTFSS CALL BTFSC call TEMP.3 PPSE2 TEMP.3 PPSE3 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IBOO/00220 return 38 BTFSS CALL BTFSC call TEMP.4 PPSE2 TEMP.4 PPSE3 BTFSS CALL BTFSC call TEMP.5 PPSE2 TEMP.5 PPSE3 BTFSS CALL BTFSC call TEMP.6 PPSE2 TEMP.6 PPSE3 BTFSS CALL BTFSC call TEMP.7 PPSE2 TEMP.7 PPSE3 CALL call PPSE3 PPSE3 XXDATA MOVWF TEMP call call call call call PPSE3 PPSE3 PPSE3 PPSE3 PPSE3 call nop nop nop nop nop XPSE2 ;was2 BTFSS CALL BTFSC call TEMP.O XPSE2 TEMP.O XPSE3 BTFSS CALL BTFSC call TEMP.1 XPSE2 TEMP.1 XPSE3 BTFSS CALL BTFSC call TEMP.2 XPSE2 TEMP.2 XPSE3 BTFSS CALL TEMP.3 XPSE2 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 39 BTFSC TEMP.3 call XPSE3 BTFSS TEMP,4 CALL XPSE2 BTFSC TEMP.4 call XPSE3 BTFSS TEMP.5 CALL XPSE2 BTFSC TEMP.5 call XPSE3 BTFSS TEMP.6 CALL XPSE2 BTFSC TEMP.6 call XPSE3 BTFSS TEMP.7 CALL XPSE2 BTFSC TEMP.7 call XPSE3 CALL call CALL XPSE3 XPSE3 XPSE2 ;was3 return PPSE2 clrwdt MOVLW movwf bsf dighh decfsz goto NOP NOP NOP RETURN PPSE3 clrwdt .7 TEMPI PORTB.2 TEMPI ,1 dighh ;on foR 3 6 9 12 ETC. diggh MOVLW movwf bcf decfsz goto NOP NOP NOP .7 TEMPI PORTB.2 TEMPI,1 diggh ;on foR 3 6 9 12 ETC. RETURN XPSE2 cirwdt MOVLW .7 movwf TEMPI bcf PORTB.2 ;was bsf on foR 3 6 9 12 ETC. SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IBOO/00220 40 Xighh decfsz goto NOP NOP NOP RETURN XPSE3 TEMPI,1 Xighh clrwdt MOVLW movwf bsf Xiggh decfsz goto NOP NOP NOP RETURN .7 TEMPI PORTB.2 TEMPI,1 Xiggh ;was bcf on foR 3 6 9 12 ETC. BEEP DS2 SD2 SD3 movf movwf BSF decfsz goto BCF movf movwf decfsz goto DECFSZ GOTO return TEMPI ,W TEMP PORTB, 1 TEMP.F SD2 PORTB, 1 TEMPI,W TEMP TEMP.F SD3 TIMER1.F DS2 ;WAS1 WAITD CLRF CALL BTFSC BSF CALL BTFSC BSF CALL BTFSC BSF CALL BTFSC BSF CALL BTFSC BSF CALL BTFSC BSF TIMER1 WAITDD TEMPI ,3 TIMER1.0 WAITDD TEMPI,3 TIMER1.1 WAITDD TEMPI ,3 TIMER1.2 WAITDD TEMPI ,3 TIMER1.3 WAITDD TEMPI ,3 TIMER1,4 WAITDD TEMPI ,3 TIMER1.5 168 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IBOO/00220 41 CALL BTFSC BSF CALL BTFSC BSF WAITDD TEMPI ,3 TIMER1.6 WAITDD TEMPI ,3 TIMER1.7 RETURN WAITDD CLRF TEMPI S1 incf TEMPI ,F NOP NOP NOP NOP NOP NOP BTFSC PORTA.O GOTO SI nop nop nop nop INCFSZ TEMPI.F GOTO LL1 GOTO HH1 LL1 BTFSS PORTA.O GOTO L1 HH1 RETURN ASC2 MOVLW 20h ; CALL TXDATA MOVLW .48 MOVWF ASCII RPT4 INCF DIGIT 1 DECFSZ ASCII.F GOTO RPT4 MOVLW .48 MOVWF ASCII MOVF DIGITl.W call TXDATA RPT5 INCF DIGIT2 DECFSZ ASCII,F GOTO RPT5 LI SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 42 RPT6 MOVLW MOVWF MOVF call INCF DECFSZ GOTO MOVF call .48 ASCII DIGIT2.W TXDATA DIGIT3 ASCII.F RPT6 DIGIT3.W TXDATA MOVLW CALL 20h TXDATA ASC RETURN MOVLW MOVWF ■48 ASCII RPT1 RPT2 RPT3 INCF DECFSZ GOTO MOVLW MOVWF MOVF call INCF DECFSZ GOTO MOVLW MOVWF MOVF call INCF DECFSZ GOTO MOVF call RETURN DIGIT1 ASCII.F RPT1 .48 ASCII DIGITI.W SendChar DIGIT2 ASCII.F RPT2 .48 ASCII DIGIT2.W SendChar DIGIT3 ASCII.F RPT3 DIGIT3,W SendChar ASCI MOVWF MOVF call RETURN CONVERT CLRF CLRF CLRF MOVWF DIGIT 1 DIGITI.W SendChar DIGIT1 DIGIT2 DIGIT3 VALUE SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 43 D1 D2 D3 CALL D1 CALL D2 CALL D3 RETURN movlw .100 subwf VALUE.W BTFSS STATUS.C RETLW 0 MOVWF VALUE INCF D1GIT1.F GOTO D1 movlw .10 subwf VALUE.W BTFSS STATUS.C RETLW 0 MOVWF VALUE INCF DIGIT2.F GOTO D2 movlw .1 subwf VALUE.W BTFSS STATUS.C RENTLW 0 MOVWF VALUE INCF DIGIT3.F GOTO D3 .BALANCE IN VALUEA ;BALANCE IN VALUEA .BALANCE IN VALUEA CLRLCD return SetupDelay return SendChar return SendCmd return BusyCheck return LCDInit SLP return END SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 44 TABLE 2 ;T140798 current project ADD START PULSE TO DECRESE TO 48uS INCREASE START PULSE TO 200uS SET INPUT TO BE AT CENTRE FRAME 100BAUD list p= 12C509,f = inhx8m IDLOCS 0000H .CONFIG OOOEH ;OOOEH for int 4 meg ;OOODH FOR EXT 4 MEG XTAL ,001 EH FOR MCLR ON EXT PIN 4 + INT OSC ;001DH FOR MCLR ON EXT PIN 4 TO VSS + EXT XTAL ;000CH FOR EXT 32KHZ IDLOCS 0000H STATUS=3 OSCCAL=5 ;12C509 INDIR = 0 FSR = 4 PORTA = 6 ;PORTB = 6 ;TRISA = 85h ;TRISB = 86h ;OPTN = 81h TMRO =1 ;WAS 5 VAL1 =08h VALO = 09h DIGIT5 = lOh DJGIT6= 11h DIGIT7 = 12h DIGIT8=13h DIGIT2= 14h DIGIT3= 15h DIGIT4=16h DIGIT 1 = 17h DIGIT9= 18h DIGIT10 = 19h DIGIT11 =1Ah DIGIT12 = 1Bh DIGIT13 = 1Ch DIGIT14=1Dh DIGIT15 = 1Eh VAL4= IFh SPARE=0Fh TERRY2 = OEh VAL5 = ODh VAL2 = 0Ch TERRY = 0Bh VAL3 = OAh ;code to send ;delay/repeat SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 45 start ORG 0 MOVWF ORG 0 MOVWF OSCCAL OSCCAL ;SETUP PORT DDR MOVLW 3EH TRIS PORTA WAKE BCF MOVLW OPTION PORTA.O 004FH .all INPUTS EXEPT FOR 10 1 ;WAS OF 4F DEFALT IS SLOW WAS OOADH FOR NO UP ON PIN CHANGE BTFSS GOTO BSF CALL BCF PORTA.2 CHECK STATUS.5 SET UP STATUS,5 .FIXED SETUP loop INCFSZ DIGIT8.1 GOTO OOT INCFSZ DIGIT7,1 ; GOTO OOT ; INCFSZ DIGIT6.1 GOTO OOT INCFSZ DIGIT5.1 GOTO OOT OOT NOP BTFSS TERRY,7 ;IF 0 GOTO X GOTO OUTA MOVLW 14h MOVWF TERRY OUTA BTFSS TERRY,6 GOTO OUTB MOVLW 14h MOVWF TERRY OUTB BTFSS TERRY,5 GOTO OUTC MOVLW 14h MOVWF TERRY OUTC BTFSC TERRY GOTO ALLOK BTFSC TERRY,6 GOTO ALLOK BTFSC TERRY.5 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 46 GOTO BTFSC GOTO BTFSC GOTO MOVLW MOVWF ALLOK TERRY ,4 ALLOK TERRY.3 ALLOK 14h TERRY ALLOK •WAS HERE BTFSS GOTO PORTA.2 CHECK ;»«****TO HERE NEXT CLRWDT ; BTFSS GOTO PSD CLRF BSF CALL BCF MOVLW SUBWF MOVWF BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO GOTO MOVLW MOVWF PORTA.2 NEXT PORTA STATUS.5 CSUM STATUS.5 .48 DIGIT15.W VAL1 VAL1.0 TX1 VAL1.1 TX1 VAL1.2 TX1 VAL1.3 TX1 VAL1.4 TX1 VAL1.5 TX1 VAL1.6 TX1 VAL1.7 TX1 TX2 20h VAL5 .FIXED SETUP 'CHECK SUM FOR DATA ,*was 20 AND 11 movlw 20h SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 movwf CALL MOVLW MOVWF MOVLW MOVWF CALL movlw movwf call MOVLW MOVWF movf MOVWF call movf movwf call movf movwf call movf movwf call movf movwf call movf movwf call movf movwf call movf movwf call movf movwf call movf movwf call movf movwf call 47 VAL1 pulse4 20h VAL5 20h VAL1 pulse4 20h VAL1 pulse4 .04 VAL5 -150 ;WAS 20 AND START ;was 04 TX ON TIME DIGIT1.0 VAL1 pulse DIGIT2.0 VAL1 pulse DIGIT3.0 VAL1 pulse ;DIGIT1 .-period of tx I54 ; + -1 on io change DIGIT4.0 ,-inc on io change VAL1 pulse DIGIT5.0 ;inc on tx 1 VAL1 pulse DIGIT6.0 ;inc on tx 2 VAL1 pulse blGIT7,0 ;inc on tx 3 VAL1 pulse DIGIT8.0 VAL1 pulse DIGITS),0 VAL1 pulse DIGIT10.0 VAL1 pulse DIGIT11.0 VAL1 pulse SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 nop nop nop nop nop nop nop nop nop nop 48 movf movwf call DIGIT12.0 VAL1 pulse movf movwf call DIGIT13.0 VAL1 pulse movf movwf call DIGIT14,0 VAL1 pulse movf movwf call DIGIT15,0 VAL1 pulse movlw movwf call .80 VAL1 pulse movf movwf call TERRY2.0 VAL1 pulse call pulse5 .-SLEEP MODE AFTER CODE TX2 clrwdt MOVF PORTA.O MOVWF VAL1 sleep nop MOVF VAL1,0 MOVWF PORTA clrwdt RETURN ZERO NOP MOVWF VAL1 BTFSS VAL1.7 ;IF 0 GOTO X GOTO OUTX SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IBOO/00220 49 CLRF VAL1 INCF VAL1.1 OUTX BTFSS VAL1.6 GOTO 0UTX2 CLRF VAL1 INCF VAL1.1 OUTX2 RETURN ;PROC FOR OUTPUT CODE pulse BTFSS VAL1.0 CALL pulse3 BTFSC VAL1.0 call pulse2 BTFSS VAL1.1 CALL pulse3 BTFSC VAL1.1 call pulse2 BTFSS VAL1.2 CALL pulse3 BTFSC VAL1,2 call pulse2 BTFSS VAL1.3 CALL pulse3 BTFSC VAL1.3 call pulse2 BTFSS VAL1.4 CALL pulse3 BTFSC VAL1.4 call pulse2 BTFSS VAL1.5 CALL pulse3 BTFSC VAL1.5 call pulse2 BTFSS VAL1.6 CALL pulse3 BTFSC VAL1.6 call pulse2 BTFSS VAL1.7 CALL pulse5 BTFSC VAL1.7 call pulse6 ; CALL pulse5 return pulse6 clrwdt SUBSTITUTE SHEET (RULE 26} WO 00/52636 PCT/IB00/00220 50 MOVLW THAN 4 MOVF movwf bsf diiig NOP NOP NOP ;NEW CHECK POWER NOP decfsz VAL0.1 goto diiig BCF PORTA.O .-cycle 46 turn off nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop RETURN pulse2 clrwdt MOVF wovwf bsf dighh NOP NOP NOP .ALSO NEW CHECK POWER NOP decfsz VAL0.1 goto dighh BCF PORTA.O .-cycle 46 turn off NOP NOP NOP NOP ; NOP NOP .20 ;TEST OF RANGE BUT STILL SHOULD BE BIGGER VAL5.W VALO PORTA.O ;on foR 3 6 9 12 ETC. VAL5.W VALO PORTA.O ;on foR 3 6 9 12 ETC. SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 ; nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop RETURN pulse5 clrwdt MOVLW MOVF movwf bsf digg decfsz goto BCF RETURN pulse3 clrwdt MOVF movwf bsf digpp decfsz goto BCF nop nop nop nop nop nop RETURN puise4 clrwdt MOVF movwf NOP NOP bsf 51 .10 ;TEST OF RANGE VAL5.W VALO PORTA.O ;on foR 3 6 9 12 ETC. VAL0.1 d'99 PORTA.O ;cycle 46 turn off VAL5.W VALO PORTA.O ;on foR 3 6 9 12 ETC. VAL0.1 digpp PORTA.O ;cycle 46 turn off VAL5.W VALO I52 ;12 CYCLES PORTA.O ;on for 46us SUBSTITUTE SHEET (RULE 26) WO 00/52636 52 PCT/IB00/00220 digph digf decfsz goto BCF decfsz goto NOP VAL0.1 digph PORTAfO VAL1.1 digf RETURN ;*«»»«MOVED T0 HERE CHECK ;COUNTER MODE ;cycie 46 turn off TT2 KK1 KK2 TT3 MOVLW SUBWF MOVWF BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO GOTO .48 DIGIT15,W VAL1 VAL1.7 TT1 VAL1.6 TT1 VAL1,5 TT1 VAL1.4 TT1 VAL1.3 TT1 VAL1.2 TTl VAL1.1 TT1 VAL1.0 TT3 TT2 BTFSC GOTO BTFSC GOTO MOVLW MOVWF INCF INCF BTFSS GOTO BTFSS GOTO CLRF DECF GOTO BTFSC GOTO PORTA.2 KK1 SPARE.O KK1 Olh SPARE DIGIT3.1 DIGIT4.1 PORTA.2 KK2 SPARE.O KK2 SPARE DIGIT3.1 NEXT PORTA.2 NEXT ;WAS PORTA, 1 .BTFSC = BIT = 0 NEXT INSTRUCTION SKIPPED .WAS DIGIT4 ;WAS PORTA,1 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 53 . MOVLW IFh MOVWF TERRY MOVF VAL4.W SUBWF DIGIT4.W MOVWF VAL1 BTFSC VAL1.7 GOTO TT1 BTFSC VAL1.6 GOTO TT1 BTFSC VAL1.5 GOTO TT1 BTFSC VAL1.4 GOTO TT1 BTFSC VAL1.3 GOTO TT1 BTFSC VAL1.2 GOTO TT1 BTFSC VAL1.1 GOTO TT1 BTFSC VAL1.0 GOTO TT1 TT1 MOVLW MOVWF CLRF 16h TERRY VAL4 BTFSC PORTA.2 ♦♦•••program MODE OFF* GOTO NEXT ;IO IS NOW LOW SO SET UP DATA CLRF VAL1 ;WSB BTFSS GOTO PORTA.2 WSB PM1 PM2 CLRWDT MOVLW MOVWF MOVLW MOVWF CLRWDT DECFSZ GOTO DECFSZ GOTO .20 VAL3 .23:23 VAL2 VAL2.1 PM2 VAL3.1 PM1 ;we must now wait 4500 us WAS 10-25-23-45 .'reusable values are vail val5 va!2 val3 B11 B12 MOVLW MOVLW MOVLW MOVWF CLRWDT DECFSZ .46:45 VAL3 .46 VAL2 VAL2.1 .-reusable values are vad va!5 val3 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 54 goto b12 decfsz val3.1 goto b11 btfsc porta.2 bsf val1.0 : bcf porta.o movlw .46 movwf val3 b21 movlw .46 movwf val2 b22 clrwdt decfsz val2.1 goto b22 decfsz val3.1 goto b21 btfsc porta.2 bsf val1.1 • bsf porta.o movlw .46 movwf val3 b31 movlw .46 movwf val2 b32 clrwdt decfsz val2.1 goto b32 decfsz val3.1 goto b31 btfsc porta.2 bsf val1.2 • bcf porta.o movlw .46 movwf val3 b41 movlw .46 movwf val2 b42 clrwdt decfsz val2.1 goto b42 decfsz val3.1 goto b41 btfsc porta.2 bfs val1.3 • bfs porta.o movlw .46 movwf val3 b51 movlw .46 movwf val2 b52 clrwdt decfsz val2.1 goto b52 decfsz val3.1 goto b51 btfsc porta.2 reusable values are vail val5 val2 val3 .-reusable values are vail val5 val2 val3 .-reusable values are vail val5 val2 val3 reusable values are vail val5 val2 val3 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 55 BSF VAL1,4 • BCF PORTA.O MOVLW .46 MOVWF VAL3 B61 MOVLW .46 MOVWF VAL2 B62 CLRWDT DECFSZ VAL2.1 GOTO B62 DECFSZ VAL3.1 GOTO B61 BTFSC PORTA,2 BSF VAL1.5 t BSF PORTA.O MOVLW .46 MOVWF VAL3 B71 MOVLW .46 MOVWF VAL2 B72 CLRWDT DECFSZ VAL2,1 GOTO B72 DECFSZ VAL3.1 GOTO B71 BTFSC PORTA.2 BSF VAL1.6 ■ BCF PORTA.O MOVLW .46 MOVWF VAL3 B81 MOVLW .46 MOVWF VAL2 B82 CLRWDT DECFSZ VAL2.1 GOTO B82 DECFSZ VAL3.1 GOTO B81 BTFSC PORTA.2 BSF VAL1.7 ■" BCF PORTA.O ; INCF TERRY, 1 BTFSC TERRY ,4 GOTO SSM MOVLW 14h MOVWF TERRY SSM MOVF TERRY ,0 MOVWF FSR MOVF VAL1,0 MOVWF INDIR INCF TERRY, 1 ; CLRF DIGIT5 CLRF DIGIT6 .reusable values are vail val5 val3 reusable values are vail val5 val2 val3 reusable values are vail val5 val2 val3 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 56 CLRF CLRF DIG1T7 OIGIT8 MOVF MOVWF VAL1,0 DIGIT4 MOVLW SUBWF DIGIT5, MOVWF BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSC GOTO .48 W VAL1 VAL1,0 TX1 VAL1.1 TX1 VAL1,2 TX1 VAL1.3 TX1 VAL1,4 TX1 VAL1,5 TX1 VAL1.6 TX1 VAL1.7 TX1 GOTO tx2 ;TX1 GOTO .» • » » » EN.D ORG SET UP NEXT 200h MOVF MOVWF DIGIT2.0 VAL5 ;3,4,5 GOTO OUT3 ;NO PRIOR SETUP MODE ***»REMOVE **** BTFSC GOTO BTFSC GOTO BTFSS GOTO BTFSS GOTO VAL5.7 OUT3 VAL5.6 OUT3 VAL5.5 OUT3 VAL5.4 OUT3 BTFSC GOTO BTFSC GOTO BTFSC VAL5.3 OUT1C VAL5.2 OUT1C VAL5.1 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 57 GOTO OUT1C BTFSC VAL5.0 GOTO OUT1C MOVLW 004FH ;was 004FH for no pull ups OPTION GOTO 0UT4 OUT1C BTFSC GOTO BTFSC GOTO BTFSC GOTO BTFSS GOTO MOVLW OPTION GOTO VAL5,3 OUT1B VAL5.2 OUT1B VAL5.1 OUT1B VAL5.0 OUT1B 004EH ; 0UT4 OUT IB BTFSC GOTO BTFSC GOTO BTFSS GOTO BTFSC GOTO MOVLW OPTION GOTO VAL5.3 OUT1A VAL5.2 OUT1A VAL5.1 OUT1A VAL5.0 OUT1A 004DH ; 0UT4 OUT1A BTFSC GOTO BTFSC GOTO BTFSS GOTO BTFSS GOTO MOVLW OPTION GOTO VAL5.3 OUT1 VAL5.2 OUT1 VAL5.1 OUT1 VAL5.0 OUT1 004CH ;16 OUT! BTFSC VAL5.3 GOTO OUT2 BTFSS VAL5.2 GOTO OUT2 BTFSC VAL5.1 GOTO OUT2 BTFSC VALB.O GOTO OUT2 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 MOVLW OPTION GOTO OUT 2 BTFSC GOTO BTFSS GOTO BTFSC GOTO BTFSS GOTO MOVLW OPTION GOTO OUT3 BTFSC GOTO BTFSS GOTO BTFSS GOTO BTFSC GOTO MOVLW OPTION GOTO OUT5 .RESET TAG MOVLW OPTION MOVLW SLOW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF 58 004BH ;16 0UT4 VAL5.3 OUT3 VAL5.2 OUT3 VAL5.1 OUT3 VAL5.0 OUT3 004AH ;32 0UT4 VAL5.3 OUT5 VAL5.2 OUT5 VAL5.1 OUT5 VAL5.0 OUT5 0049H 0UT4 ;WAS 0049H 004DH ;OE 2SEC OB= 13FAST OOODH FOR 1 PER SEC AND OOOFH FOR SLOW .50 ;WAS 50 OA 2SEC OD = 13FAST OBH FOR 1 PER SEC AND 09H FOR DIGIT2 ;SPEED .50 DIGIT3 .SWITCH .00 DIG1T4 .COUNTER .00 DIGIT5 ;AGE .00 DIGIT6 ; .00 DIGIT7 ; .00 DIGIT8 ; .48 DIGIT1 .DATA 1 .48 DIGIT9 :data 2 .48 DIGIT10 .48 DIGIT! 1 SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 59 MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF MOVLW MOVWF .48 DIGIT"! 2 .48 DIGIT13 .48 DIGIT14 .65 DIGIT15 .80 DIGIT16 14h TERRY 0UT4 INCFSZ DIGIT8.1 GOTO OOTA INCFSZ DIGIT7.1 GOTO OOTA INCFSZ DIGIT6.1 GOTO OOTA INCFSZ DIGIT5.1 GOTO OOTA OOTA RETURN CSUM MOVF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF ADDWF MOVWF digit1.0 DIGIT2.0 DIGIT3.0 DIGIT4.0 DIGIT5.0 DIGIT6.0 DIGIT7.0 DIGIT8.0 DIGIT9.0 DIGIT 10,0 DIGIT11.0 DIGIT12.0 DIGIT13.0 DIGIT14.0 DIGIT 15,0 terry2 RETURN end SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 60 </div>

Claims

<div class="application article clearfix printTableText" id="claims"> CLAIMS:

1. An electronic tag which includes processor means programmed to provide a modulation control signal which includes unique identification data which at least identifies 5 the tag; and transmitter circuitry connected to the processor means and to an antenna for transmission of the unique identification data, the transmitter circuitry being powered by the modulation control signal.

2. An electronic tag as claimed in Claim 1, in which the 10 transmitter circuitry is exclusively powered by the modulation control signal of the processor means.

3. An electronic tag as claimed in Claim 1 or Claim 2, in which the transmitter circuitry includes passive components and a transistor defining oscillation circuitry directly driven by the processor means, the 15 transistor in combination with the passive components forming an integral part of the transmitter circuitry which is powered up by the modulation signal.

4. An electronic tag as claimed in any one of the preceding claims, in which the processor means is configured to provide the 20 modulation control signal with a first part followed by a second part, the first part including at least one high pulse of such a duration so as to provide sufficient power to the transmitter circuitry at least partially to stabilize it for transmission of the second part which includes data defined in a plurality of pulses which are of a substantially lesser 25 duration. SUBSTITUTE SHEET (RULE 26) WO 00/52636 PCT/IB00/00220 61

5. An electronic tag as claimed in Claim 4, in which the first part of the modulation control signal includes a plurality of high pulses that, in combination, provide an identification signal to a tag receiver for receiving a transmission from the electronic tag. 5

6. An electronic tag as claimed in Claim 4 or Claim 5, in which each pulse of the second part of the modulation signal includes a start portion for identifying a start of a bit and a data portion for identifying a state of the bit of data, the duration of the data portion selectively defining a high and a low state of the bit under control of the processor 10 means.

7. An electronic tag as claimed in Claim 6, in which the high state of the bit is defined by a shorter data portion during which the oscillator circuitry is switched off and the low state of the bit is defined by a longer data portion during which the oscillator circuitry is switched 15 off.

8. An electronic tag as claimed in any one of the preceding claims, in which the processor means is a micro-controller which includes an internal RC oscillator on which the modulation control signal is dependent and the micro-controller is arranged to enter a sleep mode 20 between data transmissions thereby to reduce power consumption.

9. An identification system which includes a plurality of electronic tags, each tag including processor means programmed to provide a modulation control signal which includes unique identification data which at least 25 identifies the tag; and SUBSTITUTE SHEET (RULE 26) m;SA' PR0pE«TY OFFICE OF N.Z. , 0 1 OCT 2002 62 I received transmitter circuitry connected to the processor means and to an antenna for transmission of the unique identification data, the transmitter circuitry being substantially powered by the modulation control signal; and at least one electronic tag receiver configured to receive a transmission from the tag.

10. An identification system as claimed in claim 9, in which the transmitter circuitry of the electronic tag is exclusively powered by the modulation control signal of the processor means.

11. An identification system as claimed in Claim 9 or Claim 10, in which the transmitter circuitry includes passive components and a transistor directly driven by the processor means, the transistor in combination with the passive components forming an integral part of the transmitter circuitry which is powered up by the modulation control signal.

12. An identification system as claimed in any one of the preceding claims 9 to 11 inclusive, in which the processor means is configured to provide the modulation control signal with a first part followed by a second part, the first part including at least one high pulse of such a duration so as to provide sufficient power to the transmitter circuitry at least partially to stabilize for transmission of the second part which includes data defined in a plurality of pulses which are of a substantially lesser duration. 4 3® INTELLECTUAL PROPERTY OFFICE OF N.Z. 63 n 1 OCT 2002 received

13. An identification system as claimed in Claim 12, in which the first part of the modulation control signal includes a plurality of high pulses that, in combination, provide an identification signal to signal detection means of the electronic tag receiver for receiving a transmission from the electronic tag.

14. An identification system as claimed in Claim 12 or Claim 13, in which each pulse of the second part of the modulation signal includes a start portion for identifying a start of a bit and a data portion for identifying a state of the bit of data, the duration of the data portion selectively defining a high and a low state of the bit under control of the processor means.

15. An identification system as claimed in Claim 14, in which the high bit is defined by a shorter data portion during which the transmitter circuitry is switched off and the low bit is defined by a longer data portion during which the transmitter circuitry is switched off.

16. A method of communicating data from an electronic tag, the method including transmitting a modulation control signal which includes unique identification data identifying the tag; and driving transmitter circuitry of the tag with the modulation control signal which substantially powers the transmitter circuitry. 64

17. A method as claimed in Claim 16, in which the modulation control signal exclusively powers the transmitter circuitry.

18. A method as claimed in Claim 16 or Claim 17, which includes selectively modulating a fundamental frequency of an oscillator 5 when data is transmitted and disabling the oscillator when data is not being transmitted.

1 9. A method as claimed in any one of the preceding claims 16 to 18 inclusive, in which the modulation control signal includes a first part followed by a second part, the first part including at least one high pulse of such a duration so as to provide sufficient power to the transmitter circuitry at least to partially stabilize it for transmission of the second part which includes data defined in a plurality of pulses which are of a substantially lesser duration.

20. A method as claimed in Claim 19, in which the first part of the modulation control signal includes a plurality of high pulses that, in combination, provide an identification signal to a tag receiver for receiving a transmission from the electronic tag.

21. A method as claimed in Claim 19 or Claim 20, in which each pulse of the second part of the modulation signal includes a start portion 20 for identifying a start of a bit and a data portion for identifying a state of the bit of data, the duration of the data portion selectively defining a high and a low state of the bit under control of the processor means. 10 AMENDED SHEET \ 65

22. A method as claimed in Claim 21, in which the high bit is defined by a shorter data portion during which the modulation control signal is switched off and the low bit is defined by a longer data portion during which the modulation control signal is switched off.

23. A method as claimed in any one of the preceding claims 16 to 22 inclusive, in which the processor means is a micro-controller which includes an internal RC oscillator on which the modulation control signal is dependent and the micro-controller is arranged to enter a sleep mode between data transmissions thereby to reduce power consumption. 10

24. A new electronic tag, substantially as herein described and illustrated.

25. A new system, substantially as herein described and illustrated.

26. A new method of reducing power consumption in an electronic tag, substantially as herein described and illustrated.

27. A new receiver, substantially as herein described and illustrated. AMENDED SHEET </div>